2473 lines
48 KiB
C
2473 lines
48 KiB
C
/*++
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Copyright (c) 1995 Microsoft Corporation
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Module Name:
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disasm.c
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Abstract:
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This file contains the x86 disassmbler invoked by "!bde.u <16:16 address>"
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Author:
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Barry Bond (BarryBo)
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Revision History:
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09-May-1995 Barry Bond (BarryBo) Created
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15-Jan-1996 Neil Sandlin (NeilSa) Merged with vdmexts
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32 bit segments fixes
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--*/
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#include <precomp.h>
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#pragma hdrstop
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WORD gSelector = 0;
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ULONG gOffset = 0;
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int gMode = 0;
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VOID
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u(
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CMD_ARGLIST
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) {
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VDMCONTEXT ThreadContext;
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WORD selector;
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ULONG offset;
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int mode;
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char rgchOutput[128];
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char rgchExtra[128];
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BYTE rgbInstruction[64];
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CHAR sym_text[255];
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CHAR sym_prev[255] = "";
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DWORD dist;
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int cb;
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int i;
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int j;
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int count=10;
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ULONG Base;
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SELECTORINFO si;
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ULONG BPNum;
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UCHAR BPData;
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BOOL bIsBP;
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CMD_INIT();
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mode = GetContext( &ThreadContext );
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if (!GetNextToken()) {
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if (!gSelector && !gOffset) {
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selector = (WORD) ThreadContext.SegCs;
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offset = ThreadContext.Eip;
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} else {
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mode = gMode;
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selector = gSelector;
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offset = gOffset;
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}
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} else if (!ParseIntelAddress(&mode, &selector, &offset)) {
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return;
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}
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if (GetNextToken()) {
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count = (int) EXPRESSION(lpArgumentString);
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if (count > 1000) {
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PRINTF("Count too large - ignored\n");
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count=10;
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}
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}
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if ( mode != PROT_MODE && mode != V86_MODE) {
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PRINTF(" Disassembly of flat mode code not allowed.\n");
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return;
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}
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LoadBreakPointCache();
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Base = GetInfoFromSelector( selector, mode, &si ) + GetIntelBase();
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for (i=0; i<count; ++i) {
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if (FindSymbol(selector, offset, sym_text, &dist, BEFORE, mode )) {
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if (_stricmp(sym_text, sym_prev)) {
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if ( dist == 0 ) {
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PRINTF("%s:\n", sym_text );
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} else {
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PRINTF("%s+0x%lx:\n", sym_text, dist );
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}
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strcpy(sym_prev, sym_text);
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}
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}
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cb = sizeof(rgbInstruction);
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if ((DWORD)(offset+cb) >= si.Limit)
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cb -= offset+cb-si.Limit;
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if (!READMEM((LPVOID)(Base+offset), rgbInstruction, cb)) {
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PRINTF("%04x:%08x: <Error Reading Memory>\n", selector, offset);
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return;
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}
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if (bIsBP = IsVdmBreakPoint(selector,
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offset,
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mode==PROT_MODE,
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&BPNum,
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&BPData)) {
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rgbInstruction[0] = BPData;
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}
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cb = unassemble_one(rgbInstruction,
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si.bBig,
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selector, offset,
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rgchOutput,
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rgchExtra,
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&ThreadContext,
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mode);
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gOffset += cb;
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if (offset > 0xffff) {
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PRINTF("%04x:%08x ", selector, offset);
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} else {
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PRINTF("%04x:%04x ", selector, offset);
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}
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for (j=0; j<cb; ++j)
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PRINTF("%02x", rgbInstruction[j]);
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for (; j<8; ++j)
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PRINTF(" ");
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PRINTF("%s\t%s", rgchOutput, rgchExtra);
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if (bIsBP) {
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PRINTF("; BP%d",BPNum);
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}
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PRINTF("\n");
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offset+=cb;
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}
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}
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typedef struct _ADDR {
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ULONG sOff;
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USHORT sSeg;
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} ADDR;
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LPBYTE checkprefixes(LPBYTE);
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void AppendPrefixes(void);
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void DisplayAddress(int mod, int rm, int sOff, int size);
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int DisplayBOP(void);
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#define modrmB 1
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#define modrmW 2
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#define reg1B 3
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#define reg1W 4
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#define reg2B 5
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#define reg2W 6
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#define eeeControl 7
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#define eeeDebug 8
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#define eeeTest 9
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#define regSeg 10
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#define ALreg 11
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#define AHreg 12
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#define BLreg 13
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#define BHreg 14
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#define CLreg 15
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#define CHreg 16
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#define DLreg 17
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#define DHreg 18
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#define AXreg 19
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#define BXreg 20
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#define CXreg 21
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#define DXreg 22
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#define SIreg 23
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#define DIreg 24
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#define SPreg 25
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#define BPreg 26
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#define CSreg 27
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#define SSreg 28
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#define DSreg 29
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#define ESreg 30
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#define FSreg 31
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#define GSreg 32
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#define ImmB 33
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#define ImmBEnter 34
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#define ImmBS 35
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#define ImmW 36
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#define ImmW1 37
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#define jmpB 38
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#define jmpW 39
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#define memB 40
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#define memW 41
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#define memD 42
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#define indirmodrmW 43
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#define indirFARmodrmW 44
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#define memB1 45
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int DmodrmB(LPBYTE);
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int DmodrmW(LPBYTE);
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int Dreg1B(LPBYTE);
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int Dreg1W(LPBYTE);
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int Dreg2B(LPBYTE);
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int Dreg2W(LPBYTE);
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int DeeeControl(LPBYTE);
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int DeeeDebug(LPBYTE);
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int DeeeTest(LPBYTE);
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int DregSeg(LPBYTE);
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int DALreg(LPBYTE);
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int DAHreg(LPBYTE);
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int DBLreg(LPBYTE);
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int DBHreg(LPBYTE);
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int DCLreg(LPBYTE);
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int DCHreg(LPBYTE);
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int DDLreg(LPBYTE);
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int DDHreg(LPBYTE);
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int DAXreg(LPBYTE);
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int DBXreg(LPBYTE);
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int DCXreg(LPBYTE);
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int DDXreg(LPBYTE);
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int DSIreg(LPBYTE);
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int DDIreg(LPBYTE);
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int DSPreg(LPBYTE);
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int DBPreg(LPBYTE);
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int DCSreg(LPBYTE);
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int DSSreg(LPBYTE);
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int DDSreg(LPBYTE);
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int DESreg(LPBYTE);
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int DFSreg(LPBYTE);
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int DGSreg(LPBYTE);
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int DImmB(LPBYTE);
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int DImmBEnter(LPBYTE);
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int DImmBS(LPBYTE);
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int DImmW(LPBYTE);
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int DImmW1(LPBYTE); // immediate-16 for 1-byte instructions
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int DjmpB(LPBYTE);
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int DjmpW(LPBYTE);
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int DmemB(LPBYTE);
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int DmemB1(LPBYTE);
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int DmemW(LPBYTE);
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int DmemD(LPBYTE);
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int DindirmodrmW(LPBYTE);
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int DindirFARmodrmW(LPBYTE);
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struct {
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int (*pfn)(LPBYTE);
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} rgpfn[] = {
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0, // 0th entry is reserved
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DmodrmB,
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DmodrmW,
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Dreg1B,
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Dreg1W,
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Dreg2B,
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Dreg2W,
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DeeeControl,
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DeeeDebug,
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DeeeTest,
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DregSeg,
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DALreg,
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DAHreg,
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DBLreg,
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DBHreg,
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DCLreg,
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DCHreg,
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DDLreg,
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DDHreg,
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DAXreg,
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DBXreg,
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DCXreg,
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DDXreg,
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DSIreg,
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DDIreg,
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DSPreg,
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DBPreg,
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DCSreg,
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DSSreg,
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DDSreg,
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DESreg,
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DFSreg,
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DGSreg,
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DImmB,
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DImmBEnter,
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DImmBS,
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DImmW,
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DImmW1, // immediate-16 for 1-byte instructions
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DjmpB,
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DjmpW,
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DmemB,
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DmemW,
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DmemD,
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DindirmodrmW,
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DindirFARmodrmW,
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DmemB1
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};
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VDMCONTEXT *g_pThreadContext;
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int g_mode;
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char *g_pchOutput; // the disassembled instruction
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char *g_pchExtra; // contents of memory (if any) modified by this instr.
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int prefixes;
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//NOTE: if first byte = 0x0f, then the instruction is two bytes long
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char *szRegsB[] = {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"};
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char *szRegsW[] = {"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"};
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char *szRegsD[] = {"eax","ecx","edx","ebx","esp","ebp","esi","edi"};
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char *szRegsSeg[] = {"es", "cs", "ss", "ds", "fs", "gs", "(bad)", "(bad)"};
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char *szMod[] = {"[bx+si", "[bx+di", "[bp+si", "[bp+di", "[si", "[di", "[bp", "[bx"};
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#define PREFIX_REPZ 1
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#define PREFIX_REPNZ 2
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#define PREFIX_LOCK 4
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#define PREFIX_CS 8
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#define PREFIX_SS 0x10
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#define PREFIX_DS 0x20
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#define PREFIX_ES 0x40
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#define PREFIX_FS 0x80
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#define PREFIX_GS 0x100
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#define PREFIX_DATA 0x200
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#define PREFIX_ADR 0x400
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#define PREFIX_FWAIT 0x800
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#define GROUP_1B -1
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#define GROUP_1WS -2
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#define GROUP_1W -3
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#define GROUP_2B -4
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#define GROUP_2W -5
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#define GROUP_2B_1 -6
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#define GROUP_2W_1 -7
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#define GROUP_2B_CL -8
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#define GROUP_2W_CL -9
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#define GROUP_3B -10
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#define GROUP_3W -11
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#define GROUP_4 -12
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#define GROUP_5 -13
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#define GROUP_6 -14
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#define GROUP_7 -15
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#define GROUP_8 -16
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#define FLOATCODE -51
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#define FLOAT FLOATCODE
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// WARNING: This list must remain in sync with the szInstructions[] array
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#define szAdc 1
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#define szAdd 2
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#define szAnd 3
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#define szBad 4
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#define szCmp 5
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#define szDec 6
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#define szIn 7
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#define szInc 8
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#define szJmp 9
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#define szMov 10
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#define szOr 11
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#define szOut 12
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#define szRcl 13
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#define szRcr 14
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#define szRol 15
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#define szRor 16
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#define szSar 17
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#define szSbb 18
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#define szShl 19
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#define szShr 20
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#define szSub 21
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#define szTest 22
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#define szPop 23
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#define szPush 24
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#define szXchg 25
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#define szXor 26
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#define szDaa 27
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#define szDas 28
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#define szPusha 29
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#define szPopa 30
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#define szBound 31
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#define szArpl 32
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#define szAaa 33
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#define szAas 34
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#define szImul 35
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#define szIdiv 36
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#define szJo 37
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#define szJno 38
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#define szJb 39
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#define szJae 40
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#define szJe 41
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#define szJne 42
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#define szJbe 43
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#define szJa 44
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#define szJs 45
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#define szJns 46
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#define szJp 47
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#define szJnp 48
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#define szJl 49
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#define szJnl 50
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#define szJle 51
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#define szJg 52
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#define szNop 53
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#define szLea 54
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#define szCbw 55
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#define szCwd 56
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#define szCall 57
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#define szPushf 58
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#define szPopf 59
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#define szSahf 60
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#define szLahf 61
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#define szMovsb 62
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#define szMovsw 63
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#define szCmpsb 64
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#define szCmpsw 65
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#define szStosb 66
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#define szStosw 67
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#define szLodsb 68
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#define szLodsw 69
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#define szScasb 70
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#define szScasw 71
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#define szRetn 72
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#define szLes 73
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#define szLds 74
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#define szEnter 75
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#define szLeave 76
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#define szRetf 77
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#define szInt3 78
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#define szInt 79
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#define szInto 80
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#define szIret 81
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#define szAam 82
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#define szAad 83
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#define szXlat 84
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#define szLoopne 85
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#define szLoope 86
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#define szLoop 87
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#define szJcxz 88
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#define szHalt 89
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#define szCmc 90
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#define szClc 91
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#define szStc 92
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#define szCli 93
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#define szSti 94
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#define szCld 95
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#define szStd 96
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#define szLar 97
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#define szLsl 98
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#define szClts 99
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#define szSeto 100
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#define szSetno 101
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#define szSetb 102
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#define szSetae 103
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#define szSete 104
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#define szSetne 105
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#define szSetbe 106
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#define szSeta 107
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#define szSets 108
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#define szSetns 109
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#define szSetp 110
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#define szSetnp 111
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#define szSetl 112
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#define szSetge 113
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#define szSetle 114
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#define szSetg 115
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#define szBt 116
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#define szShld 117
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#define szBts 118
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#define szShrd 119
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#define szShdr 120
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#define szLss 121
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#define szBtr 122
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#define szLfs 123
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#define szLgs 124
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#define szMovzx 125
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#define szBtc 126
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#define szBsf 127
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#define szBsr 128
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#define szMovsx 129
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#define szNot 130
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#define szNeg 131
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#define szMul 132
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#define szDiv 133
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#define szSldt 134
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#define szStr 135
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#define szLldt 136
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#define szLtr 137
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#define szVerr 138
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#define szVerw 139
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#define szSgdt 140
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#define szSidt 141
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#define szLgdt 142
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#define szLidt 143
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#define szSmsw 144
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#define szLmsw 145
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// WARNING: This must stay in sync with the #define list above
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char *szInstructions[] = {
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"", //used to indicate groups
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"adc",
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"add",
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"and",
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"(bad)",
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"cmp",
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"dec",
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"in",
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"inc",
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"jmp",
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// 10
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"mov",
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"or",
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"out",
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"rcl",
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"rcr",
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"rol",
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"ror",
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"sar",
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"sbb",
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"shl",
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// 20
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"shr",
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"sub",
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"test",
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"pop",
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"push",
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"xchg",
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"xor",
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"daa",
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"das",
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"pusha",
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// 30
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"popa",
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"bound",
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"arpl",
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"aaa",
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"aas",
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"imul",
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"idiv",
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"jo",
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"jno",
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"jb",
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// 40
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"jae",
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"je",
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"jne",
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"jbe",
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"ja",
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"js",
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"jns",
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"jp",
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"jnp",
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"jl",
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// 50
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"jnl",
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"jle",
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"jg",
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"nop",
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"lea",
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"cbw",
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"cwd",
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"call",
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"pushf",
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"popf",
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// 60
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"sahf",
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"lahf",
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"movsb",
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"movsw",
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"cmpsb",
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"cmpsw",
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"stosb",
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"stosw",
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"lodsb",
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"lodsw",
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// 70
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"scasb",
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"scasw",
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"retn",
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"les",
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"lds",
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"enter",
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"leave",
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"retf",
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"int3",
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"int",
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// 80
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"into",
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"iret",
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"aam",
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"aad",
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"xlat",
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"loopne",
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"loope",
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"loop",
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|
"jcxz",
|
|
"halt",
|
|
// 90
|
|
"cmc",
|
|
"clc",
|
|
"stc",
|
|
"cli",
|
|
"sti",
|
|
"cld",
|
|
"std",
|
|
"lar",
|
|
"lsl",
|
|
"clts",
|
|
// 100
|
|
"seto",
|
|
"setno",
|
|
"setb",
|
|
"setae",
|
|
"sete",
|
|
"setne",
|
|
"setbe",
|
|
"seta",
|
|
"sets",
|
|
"setns",
|
|
// 110
|
|
"setp",
|
|
"setnp",
|
|
"setl",
|
|
"setge",
|
|
"setle",
|
|
"setg",
|
|
"bt",
|
|
"shld",
|
|
"bts",
|
|
"shrd",
|
|
// 120
|
|
"shdr",
|
|
"lss",
|
|
"btr",
|
|
"lfs",
|
|
"lgs",
|
|
"movzx",
|
|
"btc",
|
|
"bsf",
|
|
"bsr",
|
|
"movsx",
|
|
// 130
|
|
"not",
|
|
"neg",
|
|
"mul",
|
|
"div",
|
|
"sldt",
|
|
"str",
|
|
"lldt",
|
|
"ltr",
|
|
"verr",
|
|
"verw",
|
|
// 140
|
|
"sgdt",
|
|
"sidt",
|
|
"lgdt",
|
|
"lidt",
|
|
"smsw",
|
|
"lmsw"
|
|
};
|
|
|
|
struct dis {
|
|
int szName;
|
|
char iPart1;
|
|
char iPart2;
|
|
char iPart3;
|
|
};
|
|
|
|
struct dis dis386[] = {
|
|
// 0
|
|
{ szAdd, modrmB, reg1B },
|
|
{ szAdd, modrmW, reg1W },
|
|
{ szAdd, reg1B, modrmB },
|
|
{ szAdd, reg1W, modrmW },
|
|
{ szAdd, ALreg, ImmB },
|
|
{ szAdd, AXreg, ImmW },
|
|
{ szPush, ESreg },
|
|
{ szPop, ESreg},
|
|
// 8
|
|
{ szOr, modrmB, reg1B },
|
|
{ szOr, modrmW, reg1W },
|
|
{ szOr, reg1B, modrmB },
|
|
{ szOr, reg1W, modrmW },
|
|
{ szOr, ALreg, ImmB },
|
|
{ szOr, AXreg, ImmW },
|
|
{ szPush, CSreg },
|
|
{ szBad }, // 0x0f is the 2-byte instr prefix
|
|
// 10
|
|
{ szAdc, modrmB, reg1B },
|
|
{ szAdc, modrmW, reg1W },
|
|
{ szAdc, reg1B, modrmB },
|
|
{ szAdc, reg1W, modrmW },
|
|
{ szAdc, ALreg, ImmB },
|
|
{ szAdc, AXreg, ImmW },
|
|
{ szPush, SSreg },
|
|
{ szPop, SSreg },
|
|
// 18
|
|
{ szSbb, modrmB, reg1B },
|
|
{ szSbb, modrmW, reg1W },
|
|
{ szSbb, reg1B, modrmB },
|
|
{ szSbb, reg1W, modrmW },
|
|
{ szSbb, ALreg, ImmB },
|
|
{ szSbb, AXreg, ImmW },
|
|
{ szPush, DSreg },
|
|
{ szPop, DSreg },
|
|
// 20
|
|
{ szAnd, modrmB, reg1B },
|
|
{ szAnd, modrmW, reg1W },
|
|
{ szAnd, reg1B, modrmB },
|
|
{ szAnd, reg1W, modrmW },
|
|
{ szAnd, ALreg, ImmB },
|
|
{ szAnd, AXreg, ImmW },
|
|
{ szBad }, // ES override prefix
|
|
{ szDaa },
|
|
// 28
|
|
{ szSub, modrmB, reg1B },
|
|
{ szSub, modrmW, reg1W },
|
|
{ szSub, reg1B, modrmB },
|
|
{ szSub, reg1W, modrmW },
|
|
{ szSub, ALreg, ImmB },
|
|
{ szSub, AXreg, ImmW },
|
|
{ szBad }, // CS override prefix
|
|
{ szDas },
|
|
// 30
|
|
{ szXor, modrmB, reg1B },
|
|
{ szXor, modrmW, reg1W },
|
|
{ szXor, reg1B, modrmB },
|
|
{ szXor, reg1W, modrmW },
|
|
{ szXor, ALreg, ImmB },
|
|
{ szXor, AXreg, ImmW },
|
|
{ szBad}, // SS override prefix
|
|
{ szAaa },
|
|
// 38
|
|
{ szCmp, modrmB, reg1B },
|
|
{ szCmp, modrmW, reg1W },
|
|
{ szCmp, reg1B, modrmB },
|
|
{ szCmp, reg1W, modrmW },
|
|
{ szCmp, ALreg, ImmB },
|
|
{ szCmp, AXreg, ImmW },
|
|
{ szBad },
|
|
{ szAas },
|
|
// 40
|
|
{ szInc, AXreg },
|
|
{ szInc, CXreg },
|
|
{ szInc, DXreg },
|
|
{ szInc, BXreg },
|
|
{ szInc, SPreg },
|
|
{ szInc, BPreg },
|
|
{ szInc, SIreg },
|
|
{ szInc, DIreg },
|
|
// 48
|
|
{ szDec, AXreg },
|
|
{ szDec, CXreg },
|
|
{ szDec, DXreg },
|
|
{ szDec, BXreg },
|
|
{ szDec, SPreg },
|
|
{ szDec, BPreg },
|
|
{ szDec, SIreg },
|
|
{ szDec, DIreg },
|
|
// 50
|
|
{ szPush, AXreg },
|
|
{ szPush, CXreg },
|
|
{ szPush, DXreg },
|
|
{ szPush, BXreg },
|
|
{ szPush, SPreg },
|
|
{ szPush, BPreg },
|
|
{ szPush, SIreg },
|
|
{ szPush, DIreg },
|
|
// 58
|
|
{ szPop, AXreg },
|
|
{ szPop, CXreg },
|
|
{ szPop, DXreg },
|
|
{ szPop, BXreg },
|
|
{ szPop, SPreg },
|
|
{ szPop, BPreg },
|
|
{ szPop, SIreg },
|
|
{ szPop, DIreg },
|
|
// 60
|
|
{ szPusha },
|
|
{ szPopa },
|
|
{ szBound, reg1W, modrmW },
|
|
{ szArpl, reg1W, reg2W },
|
|
{ szBad }, // FS segment override
|
|
{ szBad }, // GS segment override
|
|
{ szBad }, // op size prefix
|
|
{ szBad }, // addr size prefix
|
|
// 68
|
|
{ szPush, ImmW},
|
|
{ szImul, reg1W, modrmW },
|
|
{ szPush, ImmBS},
|
|
{ szImul, reg1B, modrmB },
|
|
{ szIn, ImmB, DXreg },
|
|
{ szIn, ImmW, DXreg },
|
|
{ szOut, ImmB, DXreg },
|
|
{ szOut, ImmW, DXreg },
|
|
// 70
|
|
{ szJo, jmpB },
|
|
{ szJno, jmpB },
|
|
{ szJb, jmpB },
|
|
{ szJae, jmpB },
|
|
{ szJe, jmpB },
|
|
{ szJne, jmpB },
|
|
{ szJbe, jmpB },
|
|
{ szJa, jmpB },
|
|
// 78
|
|
{ szJs, jmpB },
|
|
{ szJns, jmpB },
|
|
{ szJp, jmpB },
|
|
{ szJnp, jmpB },
|
|
{ szJl, jmpB },
|
|
{ szJnl, jmpB },
|
|
{ szJle, jmpB },
|
|
{ szJg, jmpB },
|
|
// 80
|
|
{ GROUP_1B },
|
|
{ GROUP_1W },
|
|
{ szBad },
|
|
{ GROUP_1WS },
|
|
{ szTest, reg1B, modrmB },
|
|
{ szTest, reg1W, modrmW },
|
|
{ szXchg, reg1B, modrmB },
|
|
{ szXchg, reg1W, modrmW },
|
|
// 88
|
|
{ szMov, modrmB, reg1B },
|
|
{ szMov, modrmW, reg1W },
|
|
{ szMov, reg1B, modrmB },
|
|
{ szMov, reg1W, modrmW },
|
|
{ szMov, modrmW, regSeg },
|
|
{ szLea, reg1W, modrmW },
|
|
{ szMov, regSeg, modrmW },
|
|
{ szPop, modrmW },
|
|
// 90
|
|
{ szNop },
|
|
{ szXchg, AXreg, CXreg },
|
|
{ szXchg, AXreg, DXreg },
|
|
{ szXchg, AXreg, BXreg },
|
|
{ szXchg, AXreg, SPreg },
|
|
{ szXchg, AXreg, BPreg },
|
|
{ szXchg, AXreg, SIreg },
|
|
{ szXchg, AXreg, DIreg },
|
|
// 98
|
|
{ szCbw },
|
|
{ szCwd },
|
|
{ szCall, memD },
|
|
{ szBad },
|
|
{ szPushf },
|
|
{ szPopf },
|
|
{ szSahf },
|
|
{ szLahf },
|
|
// a0
|
|
{ szMov, ALreg, memB },
|
|
{ szMov, AXreg, memW },
|
|
{ szMov, memB, ALreg },
|
|
{ szMov, memW, AXreg },
|
|
{ szMovsb },
|
|
{ szMovsw },
|
|
{ szCmpsb },
|
|
{ szCmpsw },
|
|
// a8
|
|
{ szTest, ALreg, ImmB },
|
|
{ szTest, AXreg, ImmW },
|
|
{ szStosb },
|
|
{ szStosw },
|
|
{ szLodsb },
|
|
{ szLodsw },
|
|
{ szScasb },
|
|
{ szScasw },
|
|
// b0
|
|
{ szMov, ALreg, ImmB },
|
|
{ szMov, CLreg, ImmB },
|
|
{ szMov, DLreg, ImmB },
|
|
{ szMov, BLreg, ImmB },
|
|
{ szMov, AHreg, ImmB },
|
|
{ szMov, CHreg, ImmB },
|
|
{ szMov, DHreg, ImmB },
|
|
{ szMov, BHreg, ImmB },
|
|
// b8
|
|
{ szMov, AXreg, ImmW },
|
|
{ szMov, CXreg, ImmW },
|
|
{ szMov, DXreg, ImmW },
|
|
{ szMov, BXreg, ImmW },
|
|
{ szMov, SPreg, ImmW },
|
|
{ szMov, BPreg, ImmW },
|
|
{ szMov, SIreg, ImmW },
|
|
{ szMov, DIreg, ImmW },
|
|
// c0
|
|
{ GROUP_2B },
|
|
{ GROUP_2W },
|
|
{ szRetn, ImmW },
|
|
{ szRetn },
|
|
{ szLes, reg1W, modrmW },
|
|
{ szLds, reg1W, modrmW },
|
|
{ szMov, modrmB, ImmB },
|
|
{ szMov, modrmW, ImmW },
|
|
// c8
|
|
{ szEnter, ImmW, ImmBEnter },
|
|
{ szLeave },
|
|
{ szRetf, ImmW1 },
|
|
{ szRetf },
|
|
{ szInt3 },
|
|
{ szInt, ImmB },
|
|
{ szInto },
|
|
{ szIret },
|
|
// d0
|
|
{ GROUP_2B_1 },
|
|
{ GROUP_2W_1 },
|
|
{ GROUP_2B_CL },
|
|
{ GROUP_2W_CL },
|
|
{ szAam, ImmB },
|
|
{ szAad, ImmB },
|
|
{ szBad },
|
|
{ szXlat },
|
|
// d8
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
{ FLOAT },
|
|
// e0
|
|
{ szLoopne, jmpB },
|
|
{ szLoope, jmpB },
|
|
{ szLoop, jmpB },
|
|
{ szJcxz, jmpB },
|
|
{ szIn, ALreg, memB1 },
|
|
{ szIn, AXreg, memB1 },
|
|
{ szOut, memB1, ALreg },
|
|
{ szOut, memB1, AXreg },
|
|
// e8
|
|
{ szCall, jmpW },
|
|
{ szJmp, jmpW },
|
|
{ szJmp, memD },
|
|
{ szJmp, jmpB },
|
|
{ szIn, ALreg, DXreg },
|
|
{ szIn, AXreg, DXreg },
|
|
{ szOut, DXreg, ALreg },
|
|
{ szOut, DXreg, AXreg },
|
|
// f0
|
|
{ szBad }, // lock prefix
|
|
{ szBad },
|
|
{ szBad }, // repne prefix
|
|
{ szBad }, // repz prefix
|
|
{ szHalt },
|
|
{ szCmc },
|
|
{ GROUP_3B },
|
|
{ GROUP_3W },
|
|
// f8
|
|
{ szClc },
|
|
{ szStc },
|
|
{ szCli },
|
|
{ szSti },
|
|
{ szCld },
|
|
{ szStd },
|
|
{ GROUP_4 },
|
|
{ GROUP_5 },
|
|
};
|
|
|
|
|
|
struct dis dis386_2[] = {
|
|
// 00
|
|
{ GROUP_6 },
|
|
{ GROUP_7 },
|
|
{ szLar, reg1W, modrmW },
|
|
{ szLsl, reg1W, modrmW },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szClts },
|
|
{ szBad },
|
|
// 08
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 10
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 18
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 20
|
|
{ szMov, reg2W, eeeControl },
|
|
{ szMov, reg2W, eeeDebug },
|
|
{ szMov, eeeControl, reg2W },
|
|
{ szMov, eeeDebug, reg2W },
|
|
{ szMov, reg2W, eeeTest },
|
|
{ szBad },
|
|
{ szMov, eeeTest, reg2W },
|
|
{ szBad },
|
|
// 28
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 30
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 38
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 40
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 48
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 50
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 58
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 60
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 68
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 70
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 78
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// 80
|
|
{ szJo, jmpW },
|
|
{ szJno, jmpW },
|
|
{ szJb, jmpW },
|
|
{ szJae, jmpW },
|
|
{ szJe, jmpW },
|
|
{ szJne, jmpW },
|
|
{ szJbe, jmpW },
|
|
{ szJa, jmpW },
|
|
// 88
|
|
{ szJs, jmpW },
|
|
{ szJns, jmpW },
|
|
{ szJp, jmpW },
|
|
{ szJnp, jmpW },
|
|
{ szJl, jmpW },
|
|
{ szJnl, jmpW },
|
|
{ szJle, jmpW },
|
|
{ szJg, jmpW },
|
|
// 90
|
|
{ szSeto, modrmB },
|
|
{ szSetno, modrmB },
|
|
{ szSetb, modrmB },
|
|
{ szSetae, modrmB },
|
|
{ szSete, modrmB },
|
|
{ szSetne, modrmB },
|
|
{ szSetbe, modrmB },
|
|
{ szSeta, modrmB },
|
|
// 98
|
|
{ szSets, modrmB },
|
|
{ szSetns, modrmB },
|
|
{ szSetp, modrmB },
|
|
{ szSetnp, modrmB },
|
|
{ szSetl, modrmB },
|
|
{ szSetge, modrmB },
|
|
{ szSetle, modrmB },
|
|
{ szSetg, modrmB },
|
|
// a0
|
|
{ szPush, FSreg },
|
|
{ szPop, FSreg },
|
|
{ szBad },
|
|
{ szBt, modrmW, reg1W },
|
|
{ szShld, reg1W, modrmW, ImmB },
|
|
{ szShld, reg1W, modrmW, CLreg },
|
|
{ szBad },
|
|
{ szBad },
|
|
// a8
|
|
{ szPush, GSreg },
|
|
{ szPop, GSreg },
|
|
{ szBad },
|
|
{ szBts, modrmW, reg1W },
|
|
{ szShrd, reg1W, modrmW, ImmB },
|
|
{ szShdr, reg1W, modrmW, CLreg },
|
|
{ szBad },
|
|
{ szImul, reg1W, modrmW },
|
|
// b0
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szLss, reg1W, modrmW },
|
|
{ szBtr, modrmW, reg1W },
|
|
{ szLfs, reg1W, modrmW },
|
|
{ szLgs, reg1W, modrmW },
|
|
{ szMovzx, reg1B, modrmB },
|
|
{ szMovzx, reg1W, modrmW },
|
|
// b8
|
|
{ szBad },
|
|
{ szBad },
|
|
{ GROUP_8 },
|
|
{ szBtc, modrmW, reg1W },
|
|
{ szBsf, reg1W, modrmW },
|
|
{ szBsr, reg1W, modrmW },
|
|
{ szMovsx, reg1B, modrmB },
|
|
{ szMovsx, reg1W, modrmW },
|
|
// c0
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// c8
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// d0
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// d8
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// e0
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// e8
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// f0
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
// f8
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
};
|
|
|
|
struct dis dis386_groups[][8] = {
|
|
// GROUP_1B
|
|
{
|
|
{ szAdd, modrmB, ImmB },
|
|
{ szOr, modrmB, ImmB },
|
|
{ szAdc, modrmB, ImmB },
|
|
{ szSbb, modrmB, ImmB },
|
|
{ szAnd, modrmB, ImmB },
|
|
{ szSub, modrmB, ImmB },
|
|
{ szXor, modrmB, ImmB },
|
|
{ szCmp, modrmB, ImmB }
|
|
},
|
|
// GROUP_1WS
|
|
{
|
|
{ szAdd, modrmW, ImmBS },
|
|
{ szOr, modrmW, ImmBS },
|
|
{ szAdc, modrmW, ImmBS },
|
|
{ szSbb, modrmW, ImmBS },
|
|
{ szAnd, modrmW, ImmBS },
|
|
{ szSub, modrmW, ImmBS },
|
|
{ szXor, modrmW, ImmBS },
|
|
{ szCmp, modrmW, ImmBS }
|
|
},
|
|
// GROUP_1W
|
|
{
|
|
{ szAdd, modrmW, ImmW },
|
|
{ szOr, modrmW, ImmW },
|
|
{ szAdc, modrmW, ImmW },
|
|
{ szSbb, modrmW, ImmW },
|
|
{ szAnd, modrmW, ImmW },
|
|
{ szSub, modrmW, ImmW },
|
|
{ szXor, modrmW, ImmW },
|
|
{ szCmp, modrmW, ImmW }
|
|
},
|
|
// GROUP_2B
|
|
{
|
|
{ szRol, modrmB, ImmB },
|
|
{ szRor, modrmB, ImmB },
|
|
{ szRcl, modrmB, ImmB },
|
|
{ szRcr, modrmB, ImmB },
|
|
{ szShl, modrmB, ImmB },
|
|
{ szShr, modrmB, ImmB },
|
|
{ szBad },
|
|
{ szSar, modrmB, ImmB }
|
|
},
|
|
// GROUP_2W
|
|
{
|
|
{ szRol, modrmW, ImmB },
|
|
{ szRor, modrmW, ImmB },
|
|
{ szRcl, modrmW, ImmB },
|
|
{ szRcr, modrmW, ImmB },
|
|
{ szShl, modrmW, ImmB },
|
|
{ szShr, modrmW, ImmB },
|
|
{ szBad },
|
|
{ szSar, modrmW, ImmB }
|
|
},
|
|
// GROUP_2B_1
|
|
{
|
|
{ szRol, modrmB },
|
|
{ szRor, modrmB },
|
|
{ szRcl, modrmB },
|
|
{ szRcr, modrmB },
|
|
{ szShl, modrmB },
|
|
{ szShr, modrmB },
|
|
{ szBad },
|
|
{ szSar, modrmB }
|
|
},
|
|
// GROUP_2W_1
|
|
{
|
|
{ szRol, modrmW },
|
|
{ szRor, modrmW },
|
|
{ szRcl, modrmW },
|
|
{ szRcr, modrmW },
|
|
{ szShl, modrmW },
|
|
{ szShr, modrmW },
|
|
{ szBad },
|
|
{ szSar, modrmW }
|
|
},
|
|
// GROUP_2B_CL
|
|
{
|
|
{ szRol, modrmB, CLreg },
|
|
{ szRor, modrmB, CLreg },
|
|
{ szRcl, modrmB, CLreg },
|
|
{ szRcr, modrmB, CLreg },
|
|
{ szShl, modrmB, CLreg },
|
|
{ szShr, modrmB, CLreg },
|
|
{ szBad },
|
|
{ szSar, modrmB, CLreg }
|
|
},
|
|
// GROUP_2W_CL
|
|
{
|
|
{ szRol, modrmW, CLreg },
|
|
{ szRor, modrmW, CLreg },
|
|
{ szRcl, modrmW, CLreg },
|
|
{ szRcr, modrmW, CLreg },
|
|
{ szShl, modrmW, CLreg },
|
|
{ szShr, modrmW, CLreg },
|
|
{ szBad },
|
|
{ szSar, modrmW, CLreg }
|
|
},
|
|
// GROUP_3B
|
|
{
|
|
{ szTest, modrmB, ImmB },
|
|
{ szBad },
|
|
{ szNot, modrmB },
|
|
{ szNeg, modrmB },
|
|
{ szMul, ALreg, modrmB },
|
|
{ szImul, ALreg, modrmB },
|
|
{ szDiv, ALreg, modrmB },
|
|
{ szIdiv, ALreg, modrmB }
|
|
},
|
|
// GROUP_3W
|
|
{
|
|
{ szTest, modrmW, ImmW },
|
|
{ szBad },
|
|
{ szNot, modrmW },
|
|
{ szNeg, modrmW },
|
|
{ szMul, AXreg, modrmW },
|
|
{ szImul, AXreg, modrmW },
|
|
{ szDiv, AXreg, modrmW },
|
|
{ szIdiv, AXreg, modrmW }
|
|
},
|
|
// GROUP_4
|
|
{
|
|
{ szInc, modrmB },
|
|
{ szDec, modrmB },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad }
|
|
},
|
|
// GROUP_5
|
|
{
|
|
{ szInc, modrmW },
|
|
{ szDec, modrmW },
|
|
{ szCall, indirmodrmW },
|
|
{ szCall, indirFARmodrmW },
|
|
{ szJmp, indirmodrmW },
|
|
{ szJmp, indirFARmodrmW },
|
|
{ szPush, modrmW },
|
|
{ szBad }
|
|
},
|
|
// GROUP_6
|
|
{
|
|
{ szSldt, modrmW },
|
|
{ szStr, modrmW },
|
|
{ szLldt, modrmW },
|
|
{ szLtr, modrmW },
|
|
{ szVerr, modrmW },
|
|
{ szVerw, modrmW },
|
|
{ szBad },
|
|
{ szBad }
|
|
},
|
|
// GROUP_7
|
|
{
|
|
{ szSgdt, modrmW },
|
|
{ szSidt, modrmW },
|
|
{ szLgdt, modrmW },
|
|
{ szLidt, modrmW },
|
|
{ szSmsw, modrmW },
|
|
{ szBad },
|
|
{ szLmsw, modrmW },
|
|
{ szBad }
|
|
},
|
|
// GROUP_8
|
|
{
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBad },
|
|
{ szBt, modrmW, ImmB },
|
|
{ szBts, modrmW, ImmB },
|
|
{ szBtr, modrmW, ImmB },
|
|
{ szBtc, modrmW, ImmB }
|
|
}
|
|
};
|
|
|
|
UCHAR OpcodeSize;
|
|
BYTE *pData;
|
|
ADDR g_InstrAddr;
|
|
BOOL bBig;
|
|
|
|
void AppendString(char *str)
|
|
{
|
|
strcpy(g_pchOutput, (str));
|
|
g_pchOutput+=strlen(g_pchOutput);
|
|
}
|
|
|
|
void ExtraString(char *str)
|
|
{
|
|
strcpy(g_pchExtra, (str));
|
|
g_pchExtra+=strlen(g_pchExtra);
|
|
}
|
|
|
|
#define AppendChar(c) {*g_pchOutput++ = (c);}
|
|
#define AppendNumber(d) {_ultoa((ULONG)d,g_pchOutput, 16); g_pchOutput+=strlen(g_pchOutput);}
|
|
|
|
#define ExtraChar(c) {*g_pchExtra++ = (c);}
|
|
#define ExtraNumber(d) {_ultoa((ULONG)d,g_pchExtra, 16); g_pchExtra+=strlen(g_pchExtra);}
|
|
#define OPERAND_32 ((prefixes & PREFIX_DATA) ^ bBig)
|
|
#define ADDR_32 ((prefixes & PREFIX_ADR) ^ bBig)
|
|
|
|
int unassemble_one(
|
|
BYTE *pInstrStart, // instruction to decode (can be local buffer)
|
|
BOOL bDefaultBig,
|
|
WORD wInstrSeg, // selector of instruction
|
|
DWORD dwInstrOff, // offset of instruction
|
|
char *pchOutput, // [out] disassembled instruction
|
|
char *pchExtra, // [out] extra info (ie. "es:[53]=1234")
|
|
// (can be NULL)
|
|
VDMCONTEXT *pThreadContext,
|
|
int mode
|
|
) {
|
|
int i;
|
|
int cb;
|
|
BYTE *pInstr = pInstrStart;
|
|
struct dis *pszDecode;
|
|
|
|
g_pThreadContext = pThreadContext;
|
|
g_mode = mode;
|
|
|
|
g_pchOutput = pchOutput;
|
|
g_InstrAddr.sSeg = wInstrSeg;
|
|
g_InstrAddr.sOff = dwInstrOff;
|
|
bBig = bDefaultBig;
|
|
|
|
gMode = mode;
|
|
gSelector = wInstrSeg;
|
|
gOffset = dwInstrOff;
|
|
|
|
if (pchExtra)
|
|
*pchExtra = '\0';
|
|
|
|
g_pchExtra = pchExtra;
|
|
|
|
if (*(UNALIGNED USHORT*)pInstr == 0xc4c4) {
|
|
pData = pInstr;
|
|
pData+=2;
|
|
return DisplayBOP();
|
|
}
|
|
|
|
pInstr = checkprefixes(pInstr);
|
|
|
|
OpcodeSize = 1;
|
|
|
|
if (*pInstr == 0x0f) {
|
|
OpcodeSize++;
|
|
pInstr++;
|
|
pszDecode = &dis386_2[*pInstr];
|
|
} else {
|
|
pszDecode = &dis386[*pInstr];
|
|
}
|
|
|
|
if (prefixes & PREFIX_REPZ)
|
|
AppendString("repz ");
|
|
if (prefixes & PREFIX_REPNZ)
|
|
AppendString("repnz ");
|
|
if (prefixes & PREFIX_LOCK)
|
|
AppendString("lock ");
|
|
if ((prefixes & PREFIX_FWAIT) && ((*pInstr < 0xd8) || (*pInstr > 0xdf))) {
|
|
/* fwait not followed by floating point instruction */
|
|
AppendString("fwait");
|
|
return (1);
|
|
}
|
|
|
|
pInstr++;
|
|
pData = pInstr;
|
|
if (pszDecode->szName < 0) { // found a GROUP_ or FLOAT entry...
|
|
i = (-pszDecode->szName)-1;
|
|
if (pszDecode->szName == FLOATCODE) {
|
|
AppendString("*float* ");
|
|
//Later: mputs("Floating point instructions NYI\n");
|
|
return 1;
|
|
} else {
|
|
pszDecode = &dis386_groups[i][(*pInstr>>3)&7];
|
|
}
|
|
}
|
|
|
|
AppendString(szInstructions[pszDecode->szName]);
|
|
|
|
if (pszDecode->iPart1) {
|
|
|
|
AppendChar('\t');
|
|
|
|
i = (*(rgpfn[pszDecode->iPart1].pfn))(pInstr);
|
|
|
|
if (pszDecode->iPart2) {
|
|
|
|
AppendString(", ");
|
|
i+=(*(rgpfn[pszDecode->iPart2].pfn))(pInstr);
|
|
|
|
if (pszDecode->iPart3) {
|
|
|
|
AppendString(", ");
|
|
i+=(*(rgpfn[pszDecode->iPart3].pfn))(pInstr);
|
|
|
|
}
|
|
}
|
|
|
|
pInstr+=i;
|
|
}
|
|
|
|
AppendChar('\0');
|
|
cb = pInstr - pInstrStart; // return length of instruction
|
|
|
|
return cb;
|
|
}
|
|
|
|
BOOL safe_read_byte(
|
|
ADDR addr,
|
|
BYTE *pb
|
|
) {
|
|
ULONG Base;
|
|
|
|
*pb = 0xbb;
|
|
Base = GetInfoFromSelector( addr.sSeg, g_mode, NULL );
|
|
if (Base == (ULONG)-1 || Base == 0) {
|
|
return FALSE;
|
|
}
|
|
|
|
Base += GetIntelBase();
|
|
|
|
return READMEM((LPVOID)(Base+(ULONG)addr.sOff), pb, 1);
|
|
}
|
|
|
|
BOOL safe_read_short(
|
|
ADDR addr,
|
|
SHORT *ps
|
|
) {
|
|
ULONG Base;
|
|
|
|
Base = GetInfoFromSelector( addr.sSeg, g_mode, NULL );
|
|
if (Base == (ULONG)-1 || Base == 0) {
|
|
return FALSE;
|
|
}
|
|
|
|
Base += GetIntelBase();
|
|
|
|
return READMEM((LPVOID)(Base+(ULONG)addr.sOff), ps, 2);
|
|
}
|
|
|
|
BOOL safe_read_long(
|
|
ADDR addr,
|
|
LONG *pl
|
|
) {
|
|
ULONG Base;
|
|
|
|
Base = GetInfoFromSelector( addr.sSeg, g_mode, NULL );
|
|
if (Base == (ULONG)-1 || Base == 0) {
|
|
return FALSE;
|
|
}
|
|
|
|
Base += GetIntelBase();
|
|
|
|
return READMEM((LPVOID)(Base+(ULONG)addr.sOff), pl, 4);
|
|
}
|
|
|
|
|
|
int Dreg1B(LPBYTE lpB)
|
|
{
|
|
BYTE b = (*lpB >> 3) & 7;
|
|
|
|
AppendString(szRegsB[b]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int Dreg1W(LPBYTE lpB)
|
|
{
|
|
BYTE b = (*lpB >> 3) & 7;
|
|
|
|
if (OPERAND_32)
|
|
AppendString(szRegsD[b]);
|
|
else
|
|
AppendString(szRegsW[b]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int Dreg2B(LPBYTE lpB)
|
|
{
|
|
BYTE b = *lpB & 7;
|
|
|
|
AppendString(szRegsB[b]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int Dreg2W(LPBYTE lpB)
|
|
{
|
|
BYTE b = *lpB & 7;
|
|
|
|
if (OPERAND_32)
|
|
AppendString(szRegsD[b]);
|
|
else
|
|
AppendString(szRegsW[b]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DmodrmB(LPBYTE lpB)
|
|
{
|
|
BYTE rm = *lpB & 0x07;
|
|
BYTE mod = *lpB >> 6;
|
|
unsigned short num;
|
|
int iRet;
|
|
|
|
pData++; // skip past mod r/m
|
|
if (mod == 3) {
|
|
AppendPrefixes();
|
|
AppendString(szRegsB[rm]);
|
|
return 1;
|
|
}
|
|
|
|
iRet = 0;
|
|
AppendString("byte ptr ");
|
|
AppendPrefixes();
|
|
AppendString(szMod[rm]);
|
|
AppendChar('+');
|
|
|
|
switch (mod) {
|
|
case 0:
|
|
if (rm == 6) {
|
|
g_pchOutput-=3; // back up over the 'BP+'
|
|
num = *((UNALIGNED USHORT*)pData);
|
|
AppendNumber(num);
|
|
pData+=2;
|
|
iRet = 3;
|
|
} else {
|
|
num = 0;
|
|
g_pchOutput--;
|
|
iRet = 1;
|
|
}
|
|
break;
|
|
|
|
case 1:
|
|
num = *pData;
|
|
AppendNumber(num);
|
|
pData++;
|
|
iRet = 2;
|
|
break;
|
|
|
|
case 2:
|
|
num = *((UNALIGNED USHORT*)pData);
|
|
AppendNumber(num);
|
|
pData += 2;
|
|
iRet = 3;
|
|
break;
|
|
}
|
|
|
|
AppendChar(']');
|
|
|
|
DisplayAddress(mod, rm, num, 1);
|
|
|
|
return iRet;
|
|
}
|
|
|
|
int DmodrmW(LPBYTE lpB)
|
|
{
|
|
BYTE rm = *lpB & 0x07;
|
|
BYTE mod = *lpB >> 6;
|
|
ULONG num;
|
|
int iRet;
|
|
|
|
pData++; // skip past mod r/m
|
|
AppendPrefixes();
|
|
|
|
if (mod == 3) {
|
|
if (OPERAND_32)
|
|
AppendString(szRegsD[rm]);
|
|
else
|
|
AppendString(szRegsW[rm]);
|
|
return 1;
|
|
}
|
|
|
|
if (ADDR_32) {
|
|
AppendChar('[');
|
|
AppendString(szRegsD[rm]);
|
|
} else {
|
|
AppendString(szMod[rm]);
|
|
}
|
|
AppendChar('+');
|
|
|
|
switch (mod) {
|
|
case 0:
|
|
//
|
|
// Handle special cases of ModRM
|
|
//
|
|
if ((rm == 6) && !ADDR_32) {
|
|
g_pchOutput-=3; // back up over 'BP+'
|
|
num = *((UNALIGNED USHORT*)pData);
|
|
AppendNumber(num);
|
|
pData+=2;
|
|
iRet = 3;
|
|
} else if ((rm == 5) && ADDR_32) {
|
|
g_pchOutput-=4; // back up over 'EBP+'
|
|
num = *((UNALIGNED ULONG*)pData);
|
|
AppendNumber(num);
|
|
pData+=4;
|
|
iRet = 5;
|
|
} else {
|
|
g_pchOutput--; // else back up over '+' alone
|
|
num=0;
|
|
iRet = 1;
|
|
}
|
|
break;
|
|
|
|
case 1:
|
|
num = *pData;
|
|
AppendNumber(num);
|
|
pData++;
|
|
iRet = 2;
|
|
break;
|
|
|
|
case 2:
|
|
num = *((UNALIGNED USHORT *)pData);
|
|
AppendNumber(num);
|
|
pData+=2;
|
|
iRet = 3;
|
|
break;
|
|
}
|
|
|
|
AppendChar(']');
|
|
|
|
DisplayAddress(mod, rm, num, ADDR_32 ? 4 : 2);
|
|
|
|
return iRet;
|
|
}
|
|
|
|
|
|
void DisplayAddress(int mod, int rm, int sOff, int size)
|
|
{
|
|
ADDR addr;
|
|
|
|
// if caller of unassemble_one() didn't want extra info, return now
|
|
if (g_pchExtra == NULL)
|
|
return;
|
|
|
|
// no memory reference
|
|
if (mod == 3)
|
|
return;
|
|
|
|
// display prefix
|
|
|
|
if (prefixes & PREFIX_DS) {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
} else if (prefixes & PREFIX_ES) {
|
|
ExtraChar('E');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegEs;
|
|
} else if (prefixes & PREFIX_FS) {
|
|
ExtraChar('F');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegFs;
|
|
} else if (prefixes & PREFIX_GS) {
|
|
ExtraChar('G');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegGs;
|
|
} else if (prefixes & PREFIX_CS) {
|
|
ExtraChar('C');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegCs;
|
|
} else if ( (prefixes & PREFIX_SS) || rm==2 || rm == 3) {
|
|
ExtraChar('S');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegSs;
|
|
} else if (rm == 6 && mod != 0) {
|
|
ExtraChar('S');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegSs;
|
|
} else {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
}
|
|
|
|
ExtraString("S:[");
|
|
|
|
switch (rm) {
|
|
case 0:
|
|
addr.sOff = (USHORT)(g_pThreadContext->Ebx + g_pThreadContext->Esi);
|
|
break;
|
|
|
|
case 1:
|
|
addr.sOff = (USHORT)(g_pThreadContext->Ebx + g_pThreadContext->Edi);
|
|
break;
|
|
|
|
case 2:
|
|
addr.sOff = (USHORT)(g_pThreadContext->Ebp + g_pThreadContext->Esi);
|
|
break;
|
|
|
|
case 3:
|
|
addr.sOff = (USHORT)(g_pThreadContext->Ebp + g_pThreadContext->Edi);
|
|
break;
|
|
|
|
case 4:
|
|
addr.sOff = (USHORT)g_pThreadContext->Esi;
|
|
break;
|
|
|
|
case 5:
|
|
addr.sOff = (USHORT)g_pThreadContext->Edi;
|
|
break;
|
|
|
|
case 6:
|
|
if (mod == 0)
|
|
addr.sOff = 0;
|
|
else
|
|
addr.sOff = (USHORT)g_pThreadContext->Ebp;
|
|
break;
|
|
|
|
default:
|
|
addr.sOff = (USHORT)g_pThreadContext->Ebx;
|
|
|
|
}
|
|
|
|
addr.sOff += sOff;
|
|
ExtraNumber(addr.sOff);
|
|
ExtraString("]=");
|
|
if (size == 2) {
|
|
SHORT s;
|
|
if (safe_read_short(addr, &s)) {
|
|
ExtraNumber( s );
|
|
} else {
|
|
ExtraString("????");
|
|
}
|
|
} else if (size == 1) {
|
|
BYTE b;
|
|
if (safe_read_byte(addr, &b)) {
|
|
ExtraNumber( b );
|
|
} else {
|
|
ExtraString("??");
|
|
}
|
|
} else if (size == 4) {
|
|
LONG l;
|
|
if (safe_read_long(addr, &l)) {
|
|
ExtraNumber( l );
|
|
} else {
|
|
ExtraString("????????");
|
|
}
|
|
} else {
|
|
ExtraString("Unknown size!");
|
|
}
|
|
}
|
|
|
|
int DisplayBOP(void)
|
|
{
|
|
UCHAR mjcode;
|
|
int InstSize = 3;
|
|
|
|
AppendString("BOP ");
|
|
|
|
mjcode = *((UCHAR *)pData);
|
|
pData++;
|
|
AppendNumber(mjcode);
|
|
|
|
switch (mjcode) {
|
|
case 0x50:
|
|
case 0x52:
|
|
case 0x53:
|
|
case 0x54:
|
|
case 0x58:
|
|
//
|
|
// This BOP has a minor function code
|
|
//
|
|
InstSize++;
|
|
AppendString(", ");
|
|
AppendNumber(*((UCHAR *)pData));
|
|
}
|
|
return InstSize;
|
|
}
|
|
|
|
int DALreg(LPBYTE lpB)
|
|
{
|
|
AppendString("al");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DAHreg(LPBYTE lpB)
|
|
{
|
|
AppendString("ah");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DBLreg(LPBYTE lpB)
|
|
{
|
|
AppendString("bl");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DBHreg(LPBYTE lpB)
|
|
{
|
|
AppendString("bh");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DCLreg(LPBYTE lpB)
|
|
{
|
|
AppendString("cl");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DCHreg(LPBYTE lpB)
|
|
{
|
|
AppendString("ch");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DDLreg(LPBYTE lpB)
|
|
{
|
|
AppendString("dl");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DDHreg(LPBYTE lpB)
|
|
{
|
|
AppendString("dh");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DAXreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("ax");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DBXreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("bx");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DCXreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("cx");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DDXreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("dx");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DBPreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("bp");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DSPreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("sp");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DSIreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("si");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DDIreg(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32)
|
|
AppendChar('e');
|
|
|
|
AppendString("di");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DCSreg(LPBYTE lpB)
|
|
{
|
|
AppendString("cs");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DDSreg(LPBYTE lpB)
|
|
{
|
|
AppendString("ds");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DSSreg(LPBYTE lpB)
|
|
{
|
|
AppendString("es");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DESreg(LPBYTE lpB)
|
|
{
|
|
AppendString("es");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DFSreg(LPBYTE lpB)
|
|
{
|
|
AppendString("fs");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DGSreg(LPBYTE lpB)
|
|
{
|
|
AppendString("gs");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int DImmB(LPBYTE lpB)
|
|
{
|
|
AppendNumber(*((UCHAR *)pData));
|
|
pData++;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DImmBEnter(LPBYTE lpB)
|
|
{
|
|
AppendNumber(*((UCHAR *)pData));
|
|
pData++;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DImmBS(LPBYTE lpB) // sign-extend 8-bit value to 16 bits
|
|
{
|
|
int i = (signed char)*(pData);
|
|
|
|
AppendNumber((USHORT)i);
|
|
pData++;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DImmW(LPBYTE lpB)
|
|
{
|
|
if (OPERAND_32) {
|
|
|
|
AppendNumber( *((UNALIGNED ULONG*)pData) );
|
|
pData+=4;
|
|
return 4;
|
|
|
|
} else {
|
|
|
|
AppendNumber( *((UNALIGNED USHORT*)pData) );
|
|
pData+=2;
|
|
return 2;
|
|
|
|
}
|
|
}
|
|
|
|
int DImmW1(LPBYTE lpB)
|
|
{
|
|
AppendNumber( *((UNALIGNED SHORT*)(pData)) );
|
|
pData++;
|
|
|
|
return 2;
|
|
}
|
|
|
|
int DjmpB(LPBYTE lpB)
|
|
{
|
|
ULONG Dest = g_InstrAddr.sOff + (LONG)*((UNALIGNED CHAR *)lpB) + OpcodeSize + 1;
|
|
|
|
if (OPERAND_32) {
|
|
AppendNumber(Dest);
|
|
} else {
|
|
AppendNumber((USHORT)Dest);
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DjmpW(LPBYTE lpB)
|
|
{
|
|
|
|
if (OPERAND_32) {
|
|
AppendNumber(g_InstrAddr.sOff + *((UNALIGNED ULONG *)lpB) + OpcodeSize + 4);
|
|
return 4;
|
|
} else {
|
|
AppendNumber(LOWORD(g_InstrAddr.sOff + (ULONG)*((UNALIGNED USHORT *)lpB) + OpcodeSize + 2));
|
|
return 2;
|
|
}
|
|
}
|
|
|
|
int DregSeg(LPBYTE lpB)
|
|
{
|
|
BYTE b = (*lpB >> 3) & 7;
|
|
|
|
AppendString(szRegsSeg[b]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int DmemB(LPBYTE lpB)
|
|
{
|
|
ADDR addr;
|
|
|
|
addr.sOff = *(lpB+1);
|
|
|
|
AppendChar('[');
|
|
AppendNumber( addr.sOff );
|
|
AppendChar(']');
|
|
|
|
if (g_pchExtra) {
|
|
BYTE b;
|
|
|
|
if (prefixes & PREFIX_DS) {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
} else if (prefixes & PREFIX_ES) {
|
|
ExtraChar('E');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegEs;
|
|
} else if (prefixes & PREFIX_FS) {
|
|
ExtraChar('F');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegFs;
|
|
} else if (prefixes & PREFIX_GS) {
|
|
ExtraChar('G');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegGs;
|
|
} else if (prefixes & PREFIX_CS) {
|
|
ExtraChar('C');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegCs;
|
|
} else if (prefixes & PREFIX_SS) {
|
|
ExtraChar('S');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegSs;
|
|
} else {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
}
|
|
|
|
ExtraString("S:[");
|
|
ExtraNumber( addr.sOff );
|
|
ExtraString("]=");
|
|
if (safe_read_byte(addr, &b)) {
|
|
ExtraNumber( b );
|
|
} else {
|
|
ExtraString("??");
|
|
}
|
|
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DmemB1(LPBYTE lpB)
|
|
{
|
|
AppendNumber( *lpB );
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DmemW(LPBYTE lpB)
|
|
{
|
|
int i;
|
|
ADDR addr;
|
|
|
|
addr.sOff = *(lpB+1);
|
|
|
|
AppendChar('[');
|
|
if (ADDR_32) {
|
|
AppendNumber( *((UNALIGNED long*)lpB) );
|
|
i=4;
|
|
} else {
|
|
addr.sOff = *((UNALIGNED short *)lpB);
|
|
AppendNumber( addr.sOff );
|
|
i=2;
|
|
}
|
|
AppendChar(']');
|
|
|
|
if (g_pchExtra) {
|
|
|
|
if (prefixes & PREFIX_DS) {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
} else if (prefixes & PREFIX_ES) {
|
|
ExtraChar('E');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegEs;
|
|
} else if (prefixes & PREFIX_FS) {
|
|
ExtraChar('F');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegFs;
|
|
} else if (prefixes & PREFIX_GS) {
|
|
ExtraChar('G');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegGs;
|
|
} else if (prefixes & PREFIX_CS) {
|
|
ExtraChar('C');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegCs;
|
|
} else if (prefixes & PREFIX_SS) {
|
|
ExtraChar('S');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegSs;
|
|
} else {
|
|
ExtraChar('D');
|
|
addr.sSeg = (USHORT)g_pThreadContext->SegDs;
|
|
}
|
|
|
|
ExtraString("S:[");
|
|
ExtraNumber( addr.sOff );
|
|
ExtraString("]=");
|
|
if (i == 2) {
|
|
SHORT s;
|
|
if (safe_read_short(addr, &s)) {
|
|
ExtraNumber( s );
|
|
} else {
|
|
ExtraString( "????" );
|
|
}
|
|
} else {
|
|
LONG l;
|
|
|
|
if (safe_read_long(addr, &l)) {
|
|
ExtraNumber( l );
|
|
} else {
|
|
ExtraString( "????????" );
|
|
}
|
|
}
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
|
|
int DmemD(LPBYTE lpB)
|
|
{
|
|
int i;
|
|
|
|
if (OPERAND_32) {
|
|
AppendNumber( *(((UNALIGNED SHORT*)lpB)+2) );
|
|
AppendChar(':');
|
|
AppendNumber( *((UNALIGNED long*)lpB) );
|
|
i=6;
|
|
} else {
|
|
USHORT sel, off;
|
|
|
|
sel = *(((UNALIGNED SHORT*)lpB)+1);
|
|
off = *((UNALIGNED SHORT*)lpB);
|
|
AppendNumber( sel );
|
|
AppendChar(':');
|
|
AppendNumber( off );
|
|
i=4;
|
|
|
|
if (g_pchExtra) {
|
|
char sym_text[1000];
|
|
LONG dist;
|
|
|
|
// if the exact symbol name was found, print it
|
|
if (FindSymbol( sel,
|
|
off,
|
|
sym_text,
|
|
&dist,
|
|
BEFORE,
|
|
g_mode)) {
|
|
ExtraString("= ");
|
|
ExtraString(sym_text);
|
|
if (dist) {
|
|
ExtraString(" + ");
|
|
ExtraNumber( dist );
|
|
}
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
int DindirmodrmW(LPBYTE lpB)
|
|
{
|
|
int i;
|
|
|
|
AppendString("FAR PTR ");
|
|
i = DmodrmW(lpB);
|
|
AppendChar(']');
|
|
|
|
return i;
|
|
}
|
|
|
|
|
|
int DindirFARmodrmW(LPBYTE lpB)
|
|
{
|
|
int i;
|
|
|
|
AppendString("FAR PTR ");
|
|
i = DmodrmW(lpB);
|
|
AppendChar(']');
|
|
|
|
return i;
|
|
}
|
|
|
|
|
|
int DeeeControl(LPBYTE lpB)
|
|
{
|
|
AppendChar('c');
|
|
AppendChar('r');
|
|
AppendChar('0'+ ((*lpB >> 3) & 7) );
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DeeeDebug(LPBYTE lpB)
|
|
{
|
|
AppendChar('d');
|
|
AppendChar('r');
|
|
AppendChar('0'+ ((*lpB >> 3) & 7) );
|
|
|
|
return 1;
|
|
}
|
|
|
|
int DeeeTest(LPBYTE lpB)
|
|
{
|
|
AppendChar('t');
|
|
AppendChar('r');
|
|
AppendChar('0'+ ((*lpB >> 3) & 7) );
|
|
|
|
return 1;
|
|
}
|
|
|
|
|
|
LPBYTE checkprefixes(LPBYTE lpB)
|
|
{
|
|
prefixes = 0;
|
|
|
|
for (;;) {
|
|
|
|
switch (*lpB) {
|
|
case 0xf3:
|
|
prefixes |= PREFIX_REPZ;
|
|
break;
|
|
case 0xf2:
|
|
prefixes |= PREFIX_REPNZ;
|
|
break;
|
|
case 0xf0:
|
|
prefixes |= PREFIX_LOCK;
|
|
break;
|
|
case 0x2e:
|
|
prefixes |= PREFIX_CS;
|
|
break;
|
|
case 0x36:
|
|
prefixes |= PREFIX_SS;
|
|
break;
|
|
case 0x3e:
|
|
prefixes |= PREFIX_DS;
|
|
break;
|
|
case 0x26:
|
|
prefixes |= PREFIX_ES;
|
|
break;
|
|
case 0x64:
|
|
prefixes |= PREFIX_FS;
|
|
break;
|
|
case 0x65:
|
|
prefixes |= PREFIX_GS;
|
|
break;
|
|
case 0x66:
|
|
prefixes |= PREFIX_DATA;
|
|
break;
|
|
case 0x67:
|
|
prefixes |= PREFIX_ADR;
|
|
break;
|
|
case 0x9b:
|
|
prefixes |= PREFIX_FWAIT;
|
|
break;
|
|
default:
|
|
return lpB;
|
|
}
|
|
lpB++;
|
|
}
|
|
}
|
|
|
|
|
|
void AppendPrefixes(void)
|
|
{
|
|
if (prefixes & PREFIX_CS)
|
|
AppendString("cs:");
|
|
if (prefixes & PREFIX_DS)
|
|
AppendString("ds:");
|
|
if (prefixes & PREFIX_SS)
|
|
AppendString("ss:");
|
|
if (prefixes & PREFIX_ES)
|
|
AppendString("es:");
|
|
if (prefixes & PREFIX_FS)
|
|
AppendString("fs:");
|
|
if (prefixes & PREFIX_GS)
|
|
AppendString("gs:");
|
|
}
|