152 lines
3.5 KiB
C
152 lines
3.5 KiB
C
#ifndef _KDEXTS_AMD64_H_
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#define _KDEXTS_AMD64_H_
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/*++
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Copyright (c) 1999 Microsoft Corporation
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Module Name:
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amd64.h
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Abstract:
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This file contains definitions which are specific to amd64 platforms.
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Author:
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Forrest Foltz (forrestf)
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Environment:
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User Mode.
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Revision History:
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--*/
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//
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// MM constants.
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//
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#define PXE_BASE_AMD64 0xFFFFF6FB7DBED000UI64
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#define PPE_BASE_AMD64 0xFFFFF6FB7DA00000UI64
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#define PDE_BASE_AMD64 0xFFFFF6FB40000000UI64
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#define PTE_BASE_AMD64 0xFFFFF68000000000UI64
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#define PXE_TOP_AMD64 0xFFFFF6FB7DBEDFFFUI64
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#define PPE_TOP_AMD64 0xFFFFF6FB7DBFFFFFUI64
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#define PDE_TOP_AMD64 0xFFFFF6FB7FFFFFFFUI64
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#define PTE_TOP_AMD64 0xFFFFF6FFFFFFFFFFUI64
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#define MM_SESSION_SPACE_DEFAULT_AMD64 0xFFFFF90000000000UI64
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//
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// Each of the four levels of an AMD64 machine decode 9 bits of address space.
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//
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#define TABLE_DECODE_BITS_AMD64 9
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//
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// Standard page is 4K, or 12 bits
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//
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#define PAGE_SHIFT_AMD64 12
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#define PAGE_MASK_AMD64 (((ULONG64)1 << PAGE_SHIFT_AMD64) - 1)
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//
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// Large page is 2GB, or 21 bits
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//
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#define LARGE_PAGE_SHIFT_AMD64 21
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#define LARGE_PAGE_MASK_AMD64 (((ULONG64)1 << LARGE_PAGE_SHIFT_AMD64) - 1)
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//
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// Number of bits required to shift a VA in order to right-justify the
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// decode bits associated with a particular level of mapping.
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//
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#define PTI_SHIFT_AMD64 (PAGE_SHIFT_AMD64 + TABLE_DECODE_BITS_AMD64 * 0)
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#define PDI_SHIFT_AMD64 (PAGE_SHIFT_AMD64 + TABLE_DECODE_BITS_AMD64 * 1)
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#define PPI_SHIFT_AMD64 (PAGE_SHIFT_AMD64 + TABLE_DECODE_BITS_AMD64 * 2)
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#define PXI_SHIFT_AMD64 (PAGE_SHIFT_AMD64 + TABLE_DECODE_BITS_AMD64 * 3)
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#define PTE_SHIFT_AMD64 3
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//
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// The AMD64 architecture can decode up to 52 bits of physical address
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// space. The following masks are used to isolate those bits within a PTE
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// associated with a physical address.
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//
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#define PTE_PHYSICAL_BITS_AMD64 ((((ULONG64)1 << 52) - 1) & ~PAGE_MASK_AMD64)
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#define PTE_LARGE_PHYSICAL_BITS_AMD64 ((((ULONG64)1 << 52) - 1) & ~LARGE_PAGE_MASK_AMD64)
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//
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// The AMD64 architecture supports 48 bits of VA.
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//
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#define AMD64_VA_BITS 48
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#define AMD64_VA_HIGH_BIT ((ULONG64)1 << (AMD64_VA_BITS - 1))
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#define AMD64_VA_MASK (((ULONG64)1 << AMD64_VA_BITS) - 1)
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#define AMD64_VA_SHIFT (63 - 47) // address sign extend shift count
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//
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// Inline used to sign extend a 48-bit value
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//
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ULONG64
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__inline
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VA_SIGN_EXTEND_AMD64 (
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IN ULONG64 Va
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)
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{
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if ((Va & AMD64_VA_HIGH_BIT) != 0) {
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//
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// The highest VA bit is set, so sign-extend it
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//
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Va |= ((ULONG64)-1 ^ AMD64_VA_MASK);
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}
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return Va;
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}
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//
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// Flags in a HARDWARE_PTE
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//
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#define MM_PTE_VALID_MASK_AMD64 0x1
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#if defined(NT_UP)
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#define MM_PTE_WRITE_MASK_AMD64 0x2
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#else
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#define MM_PTE_WRITE_MASK_AMD64 0x800
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#endif
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#define MM_PTE_OWNER_MASK_AMD64 0x4
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#define MM_PTE_WRITE_THROUGH_MASK_AMD64 0x8
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#define MM_PTE_CACHE_DISABLE_MASK_AMD64 0x10
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#define MM_PTE_ACCESS_MASK_AMD64 0x20
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#if defined(NT_UP)
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#define MM_PTE_DIRTY_MASK_AMD64 0x40
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#else
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#define MM_PTE_DIRTY_MASK_AMD64 0x42
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#endif
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#define MM_PTE_LARGE_PAGE_MASK_AMD64 0x80
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#define MM_PTE_GLOBAL_MASK_AMD64 0x100
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#define MM_PTE_COPY_ON_WRITE_MASK_AMD64 0x200
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#define MM_PTE_PROTOTYPE_MASK_AMD64 0x400
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#define MM_PTE_TRANSITION_MASK_AMD64 0x800
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#define MM_PTE_PROTECTION_MASK_AMD64 0x3e0
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#define MM_PTE_PAGEFILE_MASK_AMD64 0x01e
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#define MI_PTE_LOOKUP_NEEDED_AMD64 (0xFFFFFFFF)
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#endif // _KDEXTS_AMD64_H_
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