929 lines
22 KiB
C
929 lines
22 KiB
C
/*++
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Copyright (c) 1992 Microsoft Corporation
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Module Name:
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apic.c
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Abstract:
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WinDbg Extension Api
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Author:
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Ken Reneris (kenr) 06-June-1994
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Environment:
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User Mode.
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Revision History:
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--*/
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#include "precomp.h"
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//#include "apic.h"
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//#include <ntapic.inc>
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#pragma hdrstop
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#define LU_SIZE 0x400
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#define LU_ID_REGISTER 0x00000020
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#define LU_VERS_REGISTER 0x00000030
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#define LU_TPR 0x00000080
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#define LU_APR 0x00000090
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#define LU_PPR 0x000000A0
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#define LU_EOI 0x000000B0
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#define LU_REMOTE_REGISTER 0x000000C0
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#define LU_DEST 0x000000D0
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#define LU_DEST_FORMAT 0x000000E0
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#define LU_SPURIOUS_VECTOR 0x000000F0
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#define LU_FAULT_VECTOR 0x00000370
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#define LU_ISR_0 0x00000100
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#define LU_TMR_0 0x00000180
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#define LU_IRR_0 0x00000200
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#define LU_ERROR_STATUS 0x00000280
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#define LU_INT_CMD_LOW 0x00000300
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#define LU_INT_CMD_HIGH 0x00000310
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#define LU_TIMER_VECTOR 0x00000320
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#define LU_INT_VECTOR_0 0x00000350
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#define LU_INT_VECTOR_1 0x00000360
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#define LU_INITIAL_COUNT 0x00000380
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#define LU_CURRENT_COUNT 0x00000390
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#define LU_DIVIDER_CONFIG 0x000003E0
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#define IO_REGISTER_SELECT 0x00000000
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#define IO_REGISTER_WINDOW 0x00000010
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#define IO_ID_REGISTER 0x00000000
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#define IO_VERS_REGISTER 0x00000001
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#define IO_ARB_ID_REGISTER 0x00000002
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#define IO_REDIR_BASE 0x00000010
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#define NMI_VECTOR 0xff
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#define DESTINATION_SHIFT 24
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BOOLEAN
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GetPhysicalAddress (
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IN ULONG64 Address,
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OUT PULONG64 PhysAddress
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);
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ULONG
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ApicRead (
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ULONG64 Address,
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ULONG Offset
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)
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{
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ULONG Data, result;
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ReadMemoryUncached(Address + Offset, &Data, sizeof (ULONG), &result);
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return Data;
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}
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ULONG
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IoApicRead (
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ULONG64 PhysAddress,
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ULONG Offset
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)
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{
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ULONG Data = 0, result;
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PhysAddress += IO_REGISTER_SELECT;
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WritePhysical(PhysAddress, &Offset, sizeof(ULONG), &result);
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PhysAddress += IO_REGISTER_WINDOW - IO_REGISTER_SELECT;
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ReadPhysical(PhysAddress, &Data, sizeof (ULONG), &result);
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return Data;
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}
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ULONG
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IoSApicRead (
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ULONG64 VirtualAddress,
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ULONG Offset
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)
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{
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ULONG Data = 0, result;
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WriteMemoryUncached(VirtualAddress + IO_REGISTER_SELECT, &Offset, sizeof(ULONG), &result);
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ReadMemoryUncached(VirtualAddress + IO_REGISTER_WINDOW, &Data, sizeof(Data), &result);
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return Data;
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}
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ULONG
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ApicDumpSetBits (
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PUCHAR Desc,
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PULONG Bits
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)
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{
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PULONG p;
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ULONG i;
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BOOLEAN FoundOne;
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BOOLEAN InSetRange;
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BOOLEAN MultipleBitsInRange;
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BOOLEAN status;
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dprintf(Desc);
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i = 0;
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p = Bits;
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FoundOne = FALSE;
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InSetRange = FALSE;
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for (i = 0; i < 0x100; i++) {
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if (*p & (1 << (i & 0x1F))) {
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if (!InSetRange) {
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InSetRange = TRUE;
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MultipleBitsInRange = FALSE;
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if (FoundOne) {
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dprintf(", ");
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}
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dprintf("%.2X", i);
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FoundOne = TRUE;
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} else if (!MultipleBitsInRange) {
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MultipleBitsInRange = TRUE;
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dprintf("-");
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}
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} else {
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if (InSetRange) {
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if (MultipleBitsInRange == TRUE) {
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dprintf("%x",i-1);
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}
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InSetRange = FALSE;
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}
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}
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if ((i & 0x1F) == 0x1F) {
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p++;
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}
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}
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if (InSetRange && MultipleBitsInRange) {
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if (MultipleBitsInRange == TRUE) {
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dprintf("%x", i - 1);
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}
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}
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dprintf ("\n");
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return 0;
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}
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ULONG
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ApicReadAndDumpBits (
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PUCHAR Desc,
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ULONG64 Address,
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ULONG Offset
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)
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{
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#define SETREGISTERS (256 / 32)
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ULONG Bits [SETREGISTERS];
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PULONG p;
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ULONG i, result;
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ULONG64 MemAddr;
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BOOLEAN status;
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//
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// Read the bytes
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//
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MemAddr = Address + Offset;
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for (i = 0; i < SETREGISTERS; i++) {
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status = ReadMemoryUncached(MemAddr, &Bits[i], sizeof(DWORD), &result);
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if (status == FALSE) {
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dprintf("Unable to read 4 bytes at offset %UI64\n",
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MemAddr);
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return E_INVALIDARG;
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}
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MemAddr += 0x10;
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}
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ApicDumpSetBits(Desc, Bits);
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return 0;
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}
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ULONG
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ApicDumpRedir (
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PUCHAR Desc,
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BOOLEAN CommandReg,
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BOOLEAN DestSelf,
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ULONG lh,
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ULONG ll
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)
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{
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static PUCHAR DelMode[] = {
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"FixedDel",
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"LowestDl",
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"res010 ",
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"remoterd",
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"NMI ",
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"RESET ",
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"res110 ",
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"ExtINTA "
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};
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static PUCHAR DesShDesc[] = { "",
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" Dest=Self",
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" Dest=ALL",
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" Dest=Othrs"
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};
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ULONG del, dest, delstat, rirr, trig, masked, destsh, pol;
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del = (ll >> 8) & 0x7;
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dest = (ll >> 11) & 0x1;
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delstat = (ll >> 12) & 0x1;
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pol = (ll >> 13) & 0x1;
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rirr = (ll >> 14) & 0x1;
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trig = (ll >> 15) & 0x1;
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masked = (ll >> 16) & 0x1;
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destsh = (ll >> 18) & 0x3;
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if (CommandReg) {
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// command reg's don't have a mask
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masked = 0;
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}
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dprintf ("%s: %08x Vec:%02X %s ",
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Desc,
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ll,
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ll & 0xff,
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DelMode [ del ]
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);
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if (DestSelf) {
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dprintf (DesShDesc[1]);
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} else if (CommandReg && destsh) {
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dprintf (DesShDesc[destsh]);
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} else {
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if (dest) {
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dprintf ("Lg:%08x", lh);
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} else {
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dprintf ("PhysDest:%02X", (lh >> 56) & 0xFF);
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}
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}
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dprintf ("%s %s %s %s %s\n",
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delstat ? "-Pend" : " ",
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trig ? "lvl" : "edg",
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pol ? "low " : "high",
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rirr ? "rirr" : " ",
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masked ? "masked" : " "
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);
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return 0;
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}
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#define IA64_DEBUG_CONTROL_SPACE_KSPECIAL 3
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typedef struct _REGISTER_LOOKUP_TABLE
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{
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LPSTR FieldName;
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PULONGLONG Variable;
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} REGISTER_LOOKUP_TABLE, *PREGISTER_LOOKUP_TABLE;
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BOOL
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ReadKSpecialRegisters(DWORD Cpu, PREGISTER_LOOKUP_TABLE Table, ULONG TableSize)
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{
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PUCHAR buffer;
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ULONG size;
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ULONG offset;
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ULONG i;
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size = GetTypeSize("nt!KSPECIAL_REGISTERS");
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if (size == 0) {
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dprintf("Can't find the size of KSPECIAL_REGISTERS\n");
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return FALSE;
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}
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if ((buffer = LocalAlloc(LPTR, size)) == NULL) {
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dprintf("Can't allocate memory for KSPECIAL_REGISTERS\n");
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return FALSE;
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}
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ReadControlSpace64((USHORT)Cpu, IA64_DEBUG_CONTROL_SPACE_KSPECIAL, buffer, size);
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for (i = 0; i < TableSize; i++) {
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if (GetFieldOffsetEx("KSPECIAL_REGISTERS", Table[i].FieldName, &offset, &size) != S_OK) {
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dprintf("Can't get offset of %s\n", Table[i].FieldName);
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return FALSE;
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}
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if (size != sizeof(ULONGLONG)) {
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dprintf("Sizeof %s (%d) is not sizeof(ULONGLONG)\n", Table[i].FieldName, size);
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return FALSE;
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}
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*Table[i].Variable = *(PULONGLONG)&buffer[offset];
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}
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LocalFree(buffer);
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return TRUE;
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}
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PUCHAR DeliveryModes[8] = {
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"INT", "INT w/Hint", "PMI", "RSV3", "NMI", "INIT", "RSV6", "ExtINT"
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};
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void
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DumpSApicRedir(
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PUCHAR Description,
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ULONG HighHalf,
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ULONG LowHalf
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)
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{
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dprintf("%s: %.8X Vec:%.2X %-10s %.2X%.2X%s %s %s %s\n",
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Description,
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LowHalf,
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(ULONG)(LowHalf & 0xFF),
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DeliveryModes[(ULONG)(LowHalf >> 8) & 0x7],
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(HighHalf >> 24) & 0xFF,
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(HighHalf >> 16) & 0xFF,
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(LowHalf & (1 << 12)) ? "-Pend" : " ",
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(LowHalf & (1 << 15)) ? "lvl" : "edg",
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(LowHalf & (1 << 13)) ? "low" : "high",
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(LowHalf & (1 << 16)) ? "masked" : " "
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);
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}
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void
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DumpLocalSapic(ULONG Processor, LPCSTR Args)
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{
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DWORD cpu;
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ULONGLONG SaLID;
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ULONGLONG SaTPR;
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ULONGLONG SaIRR[4];
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ULONGLONG SaITV;
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ULONGLONG SaPMV;
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ULONGLONG SaCMCV;
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ULONGLONG SaLRR[2];
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REGISTER_LOOKUP_TABLE registerTable[] = {
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{ "SaLID", &SaLID },
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{ "SaTPR", &SaTPR },
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{ "SaIRR0", &SaIRR[0] },
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{ "SaIRR1", &SaIRR[1] },
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{ "SaIRR2", &SaIRR[2] },
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{ "SaIRR3", &SaIRR[3] },
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{ "SaITV", &SaITV },
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{ "SaPMV", &SaPMV },
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{ "SaCMCV", &SaCMCV },
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{ "SaLRR0", &SaLRR[0] },
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{ "SaLRR1", &SaLRR[1] }
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};
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if (Args[0] == '\0') {
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cpu = Processor;
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}
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else {
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cpu = atoi(Args);
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}
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if (!ReadKSpecialRegisters(cpu, registerTable, sizeof(registerTable) / sizeof(registerTable[0]))) {
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return;
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}
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dprintf("Local Sapic for processor %d\n", cpu);
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dprintf("LID: EID = %d, ID = %d\n", (ULONG)((SaLID >> 16) & 0xFF), (ULONG)((SaLID >> 24) & 0xFF));
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dprintf("TPR: Mask Interrupt Class = %d, Mask Maskable Interrupts = %s\n", (ULONG)(SaTPR >> 4) & 0xF, (SaTPR & (1 << 16)) ? "TRUE" : "FALSE");
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ApicDumpSetBits("IRR: ", (PULONG)&SaIRR[0]);
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dprintf("ITV: Vector = 0x%.2X, Masked = %s\n", (ULONG)(SaITV & 0xFF), (SaITV & (1 << 16)) ? "TRUE" : "FALSE");
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dprintf("PMV: Vector = 0x%.2X, Masked = %s\n", (ULONG)(SaPMV & 0xFF), (SaPMV & (1 << 16)) ? "TRUE" : "FALSE");
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dprintf("CMCV: Vector = 0x%.2X, Masked = %s\n", (ULONG)(SaCMCV & 0xFF), (SaCMCV & (1 << 16)) ? "TRUE" : "FALSE");
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DumpSApicRedir("LRR0", (ULONG)(SaLRR[0] >> 32), (ULONG)SaLRR[0]);
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DumpSApicRedir("LRR1", (ULONG)(SaLRR[1] >> 32), (ULONG)SaLRR[1]);
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}
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DECLARE_API( apic )
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/*++
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Routine Description:
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Dumps local apic
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Arguments:
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args - Supplies the address in hex.
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Return Value:
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None
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--*/
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{
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static PUCHAR divbase[] = { "2", "4", "8", "f" };
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static PUCHAR clktype[] = { "clk", "tmbase", "%s/%s", "??%s/%s" };
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ULONG64 Address;
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ULONG result, junk, l, ll, lh, clkvec;
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UCHAR s[40];
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INIT_API();
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if (TargetMachine == IMAGE_FILE_MACHINE_IA64) {
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ULONG processor;
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GetCurrentProcessor(Client, &processor, NULL);
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DumpLocalSapic(processor, args);
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EXIT_API();
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return S_OK;
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}
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if (TargetMachine != IMAGE_FILE_MACHINE_I386 &&
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TargetMachine != IMAGE_FILE_MACHINE_AMD64) {
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dprintf("X86 and AMD64 only API.\n");
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EXIT_API();
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return E_INVALIDARG;
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}
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if ((Address = GetExpression(args)) == 0) {
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//
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// Default Apic address
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//
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Address = 0xfffe0000;
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}
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if (Address == 0) {
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//
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// Use default for MPS systems.
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//
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Address = 0xfffe0000;
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}
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Address = (ULONG64) (LONG64) (LONG) Address;
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if ( !ReadMemoryUncached(
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Address + LU_ID_REGISTER,
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(PVOID)&junk,
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4,
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&result
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) ) {
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dprintf("Unable to read lapic\n");
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EXIT_API();
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return E_INVALIDARG;
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}
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if ( !ReadMemoryUncached(
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Address + LU_DIVIDER_CONFIG,
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(PVOID)&junk,
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4,
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&result
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) ) {
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dprintf("Unable to read lapic\n");
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EXIT_API();
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return E_INVALIDARG;
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}
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dprintf ("Apic @ %08x ID:%x (%x) LogDesc:%08x DestFmt:%08x TPR %02X\n",
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(ULONG)Address,
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ApicRead (Address, LU_ID_REGISTER) >> 24,
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ApicRead (Address, LU_VERS_REGISTER),
|
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ApicRead (Address, LU_DEST),
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ApicRead (Address, LU_DEST_FORMAT),
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ApicRead (Address, LU_TPR)
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);
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l = ApicRead (Address, LU_SPURIOUS_VECTOR);
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ll = ApicRead (Address, LU_DIVIDER_CONFIG);
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clkvec = ApicRead (Address, LU_TIMER_VECTOR);
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sprintf (s, clktype[ (clkvec >> 18) & 0x3 ],
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clktype [ (ll >> 2) & 0x1 ],
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divbase [ ll & 0x3]
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);
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dprintf ("TimeCnt: %08x%s%s SpurVec:%02x FaultVec:%02x error:%x%s\n",
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ApicRead (Address, LU_INITIAL_COUNT),
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s,
|
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((clkvec >> 17) & 1) ? "" : "-oneshot",
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l & 0xff,
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ApicRead (Address, LU_FAULT_VECTOR),
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ApicRead (Address, LU_ERROR_STATUS),
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l & 0x100 ? "" : " DISABLED"
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);
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ll = ApicRead (Address, LU_INT_CMD_LOW);
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lh = ApicRead (Address, LU_INT_CMD_HIGH);
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ApicDumpRedir ("Ipi Cmd", TRUE, FALSE, lh, ll);
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ApicDumpRedir ("Timer..", FALSE, TRUE, 0, clkvec);
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ApicDumpRedir ("Linti0.", FALSE, TRUE, 0, ApicRead (Address, LU_INT_VECTOR_0));
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ApicDumpRedir ("Linti1.", FALSE, TRUE, 0, ApicRead (Address, LU_INT_VECTOR_1));
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ApicReadAndDumpBits ("TMR: ", Address, LU_TMR_0);
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ApicReadAndDumpBits ("IRR: ", Address, LU_IRR_0);
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ApicReadAndDumpBits ("ISR: ", Address, LU_ISR_0);
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EXIT_API();
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return S_OK;
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}
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|
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void
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DumpIoSApic(
|
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IN LPCSTR Args
|
|
)
|
|
{
|
|
ULONG64 address;
|
|
ULONG ioSapicCount;
|
|
ULONG index;
|
|
ULONG64 apicDebugAddresses;
|
|
ULONG apicDebugSize;
|
|
ULONG64 apicVirtualAddress;
|
|
ULONG64 apicPhysicalAddress;
|
|
ULONG ll, lh;
|
|
ULONG i, max;
|
|
UCHAR s[40];
|
|
|
|
address = GetExpression("hal!HalpMpInfo");
|
|
|
|
if (address == 0) {
|
|
dprintf("Can't find hal!HalpMpInfo\n");
|
|
return;
|
|
}
|
|
|
|
if (GetFieldValue(address, "hal!_MPINFO", "IoSapicCount", ioSapicCount) != 0) {
|
|
dprintf("Error reading IoSapicCount\n");
|
|
return;
|
|
}
|
|
|
|
address = GetExpression("Hal!HalpApicDebugAddresses");
|
|
|
|
if (address == 0) {
|
|
dprintf("Can't find Hal!HalpApicDebugAddresses\n");
|
|
return;
|
|
}
|
|
|
|
if (ReadPtr(address, &apicDebugAddresses) != 0) {
|
|
dprintf("Error reading Hal!HalpApicDebugAddresses\n");
|
|
return;
|
|
}
|
|
|
|
apicDebugSize = GetTypeSize("hal!_IOAPIC_DEBUG_TABLE");
|
|
|
|
if (apicDebugSize == 0) {
|
|
dprintf("Can't find hal!_IOAPIC_DEBUG_TABLE\n");
|
|
return;
|
|
}
|
|
|
|
for (index = 0; index < ioSapicCount; index++) {
|
|
|
|
GetFieldValue(apicDebugAddresses + (index * apicDebugSize),
|
|
"hal!_IOAPIC_DEBUG_TABLE", "IoSapicRegs",
|
|
apicVirtualAddress);
|
|
|
|
apicPhysicalAddress = 0;
|
|
|
|
GetPhysicalAddress(apicVirtualAddress, &apicPhysicalAddress);
|
|
|
|
ll = IoSApicRead(apicVirtualAddress, IO_VERS_REGISTER);
|
|
|
|
dprintf("I/O SAPIC @ %.8X, Version = %.2X (0x%.8X)\n", (ULONG)apicPhysicalAddress, (ll & 0xFF), ll);
|
|
|
|
max = (ll >> 16) & 0xff;
|
|
|
|
//
|
|
// Dump inti table
|
|
//
|
|
|
|
max *= 2;
|
|
|
|
for (i = 0; i <= max; i += 2) {
|
|
ll = IoSApicRead(apicVirtualAddress, IO_REDIR_BASE + i + 0);
|
|
lh = IoSApicRead(apicVirtualAddress, IO_REDIR_BASE + i + 1);
|
|
|
|
sprintf(s, "Inti%02X", i / 2);
|
|
|
|
DumpSApicRedir(s, lh, ll);
|
|
}
|
|
}
|
|
}
|
|
|
|
DECLARE_API( ioapic )
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Dumps io apic
|
|
|
|
Arguments:
|
|
|
|
args - Supplies the address in hex, if no address is specified, all IOApics will be dumped.
|
|
|
|
Return Value:
|
|
|
|
None
|
|
|
|
--*/
|
|
{
|
|
ULONG64 PhysAddress;
|
|
ULONG64 Address;
|
|
ULONG i, ll, lh, max, IOApicCount;
|
|
UCHAR s[40];
|
|
BOOLEAN Converted;
|
|
ULONG64 addr;
|
|
UCHAR count;
|
|
|
|
INIT_API();
|
|
|
|
if (TargetMachine == IMAGE_FILE_MACHINE_IA64) {
|
|
|
|
DumpIoSApic(args);
|
|
|
|
EXIT_API();
|
|
return S_OK;
|
|
}
|
|
|
|
if (TargetMachine != IMAGE_FILE_MACHINE_I386 &&
|
|
TargetMachine != IMAGE_FILE_MACHINE_AMD64) {
|
|
dprintf("X86 or AMD64 only API.\n");
|
|
EXIT_API();
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
Address = GetExpression(args);
|
|
|
|
Converted = GetPhysicalAddress (Address, &PhysAddress);
|
|
|
|
if (Converted) {
|
|
IOApicCount = 1;
|
|
} else {
|
|
|
|
//
|
|
// Get a copy of the global data structure Hal!HalpMpInfoTable.
|
|
//
|
|
|
|
addr = GetExpression("Hal!HalpMpInfoTable");
|
|
|
|
if (addr == 0) {
|
|
dprintf ("Error retrieving address of HalpMpInfoTable\n");
|
|
EXIT_API();
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if (InitTypeRead(addr, Hal!HalpMpInfo)) {
|
|
dprintf ("Error reading HalpMpInfoTable\n");
|
|
EXIT_API();
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
IOApicCount = (ULONG) ReadField(IOApicCount);
|
|
Address = ReadField(IoApicBase[0]);
|
|
Converted = GetPhysicalAddress ( Address, &PhysAddress);
|
|
}
|
|
|
|
for (count = 0; count < IOApicCount; count++) {
|
|
|
|
ll = IoApicRead (PhysAddress, IO_VERS_REGISTER),
|
|
max = (ll >> 16) & 0xff;
|
|
dprintf ("IoApic @ %08x ID:%x (%x) Arb:%x\n",
|
|
(ULONG)Address,
|
|
IoApicRead (PhysAddress, IO_ID_REGISTER) >> 24,
|
|
ll & 0xFF,
|
|
IoApicRead (PhysAddress, IO_ARB_ID_REGISTER)
|
|
);
|
|
|
|
//
|
|
// Dump inti table
|
|
//
|
|
|
|
max *= 2;
|
|
for (i=0; i <= max; i += 2) {
|
|
ll = IoApicRead (PhysAddress, IO_REDIR_BASE+i+0);
|
|
lh = IoApicRead (PhysAddress, IO_REDIR_BASE+i+1);
|
|
sprintf (s, "Inti%02X.", i/2);
|
|
ApicDumpRedir (s, FALSE, FALSE, lh, ll);
|
|
}
|
|
|
|
//
|
|
// Get the next IoApic Virtual Address, convert it to Physical
|
|
// and break if this conversion fails.
|
|
//
|
|
|
|
Address = ReadField(IoApicBase[count+1]);
|
|
Converted = GetPhysicalAddress ( Address, &PhysAddress);
|
|
|
|
if (!Converted) {
|
|
break;
|
|
}
|
|
|
|
dprintf ("\n");
|
|
}
|
|
|
|
EXIT_API();
|
|
return S_OK;
|
|
}
|
|
|
|
DECLARE_API( sendnmi )
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Send an IPI to the processors in the argument bitmask (affinity).
|
|
(Used for debugging when a processor is spinning with interrupts
|
|
disabled).
|
|
|
|
Arguments:
|
|
|
|
KAFFINITY BitMask Supplied a mask of processors to send the
|
|
IPI to.
|
|
|
|
Return Value:
|
|
|
|
Success.
|
|
|
|
--*/
|
|
|
|
{
|
|
ULONG64 Address;
|
|
ULONG64 ApicAddress;
|
|
UCHAR MaxProcsPerCluster;
|
|
ULONG i;
|
|
ULONG64 TargetSet;
|
|
ULONG64 ActiveProcessors;
|
|
ULONG Length;
|
|
ULONG ApicDWord;
|
|
ULONG junk;
|
|
|
|
//
|
|
// APIC/XAPIC machines only.
|
|
// This should be doable on IA64 and AMD64 as well but I don't know
|
|
// how at time of writing. PeterJ.
|
|
//
|
|
|
|
if (TargetMachine != IMAGE_FILE_MACHINE_I386) {
|
|
dprintf("Sorry, only know how to send NMI on an APIC machine.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if (strstr(args, "?") ||
|
|
((TargetSet = GetExpression(args)) == 0)) {
|
|
dprintf("usage: sendnmi bitmask\n"
|
|
" where bitmask is the set of processors an NMI\n"
|
|
" is to be sent to.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
//
|
|
// See if we can get the cluster mode from the HAL.
|
|
// (On AMD64 and IA64, this information would be in the kernel).
|
|
//
|
|
|
|
Address = GetExpression("hal!HalpMaxProcsPerCluster");
|
|
if (!Address) {
|
|
dprintf("Unable to get APIC configuration information from the HAL\n");
|
|
dprintf("Cannot continue.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if (!ReadMemoryUncached(Address,
|
|
&MaxProcsPerCluster,
|
|
sizeof(MaxProcsPerCluster),
|
|
&i) || (i != sizeof(MaxProcsPerCluster))) {
|
|
dprintf("Unable to read system memory, quitting.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
Address = GetExpression("nt!KeActiveProcessors");
|
|
Length = GetTypeSize("nt!KeActiveProcessors");
|
|
if ((!Address) || (!((Length == 4) || (Length == 8)))) {
|
|
dprintf("Unable to get processor configuration from kernel\n");
|
|
dprintf("Cannot continue.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
ActiveProcessors = 0;
|
|
if (!ReadMemoryUncached(Address,
|
|
&ActiveProcessors,
|
|
Length,
|
|
&i) || (i != Length) || (ActiveProcessors == 0)) {
|
|
dprintf("Unable to read processor configuration from kernel.\n");
|
|
dprintf("Cannot continue.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if ((TargetSet & ActiveProcessors) != TargetSet) {
|
|
dprintf("Target processor set (%I64x) contains processors not in\n"
|
|
"system processor set (%I64x).\n",
|
|
TargetSet,
|
|
ActiveProcessors);
|
|
dprintf("Cannot continue.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
ApicAddress = 0xfffe0000;
|
|
|
|
ApicAddress = (ULONG64) (LONG64) (LONG) ApicAddress;
|
|
|
|
if ((!ReadMemoryUncached(ApicAddress,
|
|
&junk,
|
|
1,
|
|
&i)) ||
|
|
(!ReadMemoryUncached(ApicAddress + LU_SIZE - 1,
|
|
&junk,
|
|
1,
|
|
&i)) ||
|
|
(!ReadMemoryUncached(ApicAddress + LU_INT_CMD_LOW,
|
|
&ApicDWord,
|
|
sizeof(ApicDWord),
|
|
&i)) ||
|
|
(i != sizeof(ApicDWord))) {
|
|
dprintf("Unable to read lapic\n");
|
|
dprintf("Cannot continue.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if ((ApicDWord & DELIVERY_PENDING) != 0) {
|
|
dprintf("Local APIC is busy, can't use it right now.\n");
|
|
dprintf("This is probably indicative of an APIC error.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
if (MaxProcsPerCluster == 0) {
|
|
|
|
//
|
|
// APIC is not in cluster mode. This makes life easy.
|
|
// Sanity: This means there's 8 or less processors.
|
|
//
|
|
|
|
if (TargetSet > 0xff) {
|
|
dprintf("APIC is in non-cluster mode thus it cannot support\n"
|
|
"more than 8 processors yet the target mask includes\n"
|
|
"processors outside that range. Something is not right.\n"
|
|
"quitting.\n");
|
|
return E_INVALIDARG;
|
|
}
|
|
|
|
dprintf("Sending NMI to processors in set %I64x\n", TargetSet);
|
|
|
|
ApicDWord = ((ULONG)TargetSet) << DESTINATION_SHIFT;
|
|
WriteMemory(ApicAddress + LU_INT_CMD_HIGH,
|
|
&ApicDWord,
|
|
sizeof(ApicDWord),
|
|
&i);
|
|
ApicDWord = DELIVER_NMI |
|
|
LOGICAL_DESTINATION |
|
|
ICR_USE_DEST_FIELD |
|
|
NMI_VECTOR;
|
|
WriteMemory(ApicAddress + LU_INT_CMD_LOW,
|
|
&ApicDWord,
|
|
sizeof(ApicDWord),
|
|
&i);
|
|
|
|
dprintf("Sent.\n");
|
|
} else {
|
|
dprintf("APIC is in cluster mode, don't know how to do this yet.\n");
|
|
}
|
|
|
|
return S_OK;
|
|
}
|
|
|