203 lines
4.3 KiB
C
203 lines
4.3 KiB
C
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/*++
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Copyright (c) 1994 Microsoft Corporation
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Module Name:
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opti.c
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Abstract:
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This module contains the code that contains
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OPTi controller(s) specific initialization and
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other dispatches
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Author:
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Ravisankar Pudipeddi (ravisp) 1-Nov-97
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Environment:
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Kernel mode
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Revision History :
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Neil Sandlin (neilsa) 3-Mar-99
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new setpower routine interface
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--*/
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#include "pch.h"
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VOID
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OptiInitialize(
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IN PFDO_EXTENSION FdoExtension
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)
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/*++
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Routine Description:
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Initialize OPTI cardbus controllers
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Arguments:
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FdoExtension - Pointer to the device extension for the controller FDO
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Return Value:
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None
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--*/
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{
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if (FdoExtension->ControllerType == PcmciaOpti82C814) {
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UCHAR byte;
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//
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// This fix per Opti for USB/1394 Combo hang
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// 5Eh[7] - enables the deadlock prevention mechanism
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// 5Fh[1] - reduces the retry count delay to 8 - note that 5Fh is a
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// WRITE-ONLY register and always reads 0. All other bits
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// of this register can safely be written to 0.
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// 5Eh[5] - enables write posting on upstream transfers
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// 5Eh[4] - sets the chip input buffer scaling (not related to deadlock)
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GetPciConfigSpace(FdoExtension, 0x5e, &byte, 1);
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byte |= 0xB0;
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SetPciConfigSpace(FdoExtension, 0x5e, &byte, 1);
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byte = 2;
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SetPciConfigSpace(FdoExtension, 0x5f, &byte, 1);
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}
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}
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NTSTATUS
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OptiSetPower(
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IN PSOCKET SocketPtr,
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IN BOOLEAN Enable,
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OUT PULONG pDelayTime
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)
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/*++
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Routine Description:
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Set power to the specified socket.
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Arguments:
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SocketPtr - the socket to set
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Enable - TRUE means to set power - FALSE is to turn it off.
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pDelayTime - specifies delay (msec) to occur after the current phase
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Return Value:
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STATUS_MORE_PROCESSING_REQUIRED - increment phase, perform delay, recall
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other status values terminate sequence
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--*/
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{
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NTSTATUS status;
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UCHAR oldPower, newPower;
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if (IsCardBusCardInSocket(SocketPtr)) {
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//
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// Hand over to generic power setting routine
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//
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return(CBSetPower(SocketPtr, Enable, pDelayTime));
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}
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switch(SocketPtr->PowerPhase) {
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case 1:
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//
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// R2 card - special handling
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//
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oldPower = PcicReadSocket(SocketPtr, PCIC_PWR_RST);
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//
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// Set new vcc
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// VCC always set to 5V if power is to be enabled..
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//
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newPower = (Enable ? PC_VCC_OPTI_050V : PC_VCC_OPTI_NO_CONNECT);
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//
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// Set vpp
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//
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if (Enable) {
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//
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// We - as always - set vpp to vcc..
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//
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newPower |= PC_VPP_OPTI_SETTO_VCC;
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} else {
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newPower |= PC_VPP_OPTI_NO_CONNECT;
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}
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newPower |= (oldPower & PC_OUTPUT_ENABLE);
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//
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// If Vcc is turned off, reset OUTPUT_ENABLE & AUTOPWR_ENABLE
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//
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if (!(newPower & PC_VCC_OPTI_MASK)) {
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newPower &= ~PC_OUTPUT_ENABLE;
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}
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status = STATUS_SUCCESS;
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if (newPower != oldPower) {
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PcicWriteSocket(SocketPtr, PCIC_PWR_RST, newPower);
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//
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// Allow ramp up.. (actually we don't need to this if
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// Enable was FALSE). Keep it for paranoia's sake
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//
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*pDelayTime = PcicStallPower;
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SocketPtr->PowerData = (ULONG) newPower;
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status = STATUS_MORE_PROCESSING_REQUIRED;
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}
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break;
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case 2:
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newPower = (UCHAR) SocketPtr->PowerData;
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if ((newPower & PC_VCC_OPTI_MASK) && !(newPower & PC_OUTPUT_ENABLE)){
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//
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// More paranoia?
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//
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newPower |= PC_OUTPUT_ENABLE;
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PcicWriteSocket(SocketPtr, PCIC_PWR_RST, newPower);
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}
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status = STATUS_SUCCESS;
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break;
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default:
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ASSERT(FALSE);
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status = STATUS_UNSUCCESSFUL;
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}
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return status;
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}
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BOOLEAN
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OptiSetZV(
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IN PSOCKET Socket,
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IN BOOLEAN Enable
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)
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{
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UCHAR bData;
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if (Enable) {
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bData = PcicReadSocket(Socket, PCIC_OPTI_GLOBAL_CTRL);
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bData |= OPTI_ZV_ENABLE;
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PcicWriteSocket(Socket, PCIC_OPTI_GLOBAL_CTRL, bData);
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} else {
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bData = PcicReadSocket(Socket, PCIC_OPTI_GLOBAL_CTRL);
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bData &= ~OPTI_ZV_ENABLE;
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PcicWriteSocket(Socket, PCIC_OPTI_GLOBAL_CTRL, bData);
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}
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return TRUE;
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}
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