1073 lines
26 KiB
C
1073 lines
26 KiB
C
/*++
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Copyright (c) 1991 Microsoft Corporation
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All rights reserved
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Module Name:
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mpaddr.c
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Abstract:
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Author:
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Ken Reneris
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Environment:
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Kernel mode only.
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Revision History:
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*/
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#include "halp.h"
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#include "apic.inc"
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#include "pcmp_nt.inc"
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#include "pci.h"
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#if DEBUGGING
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#include "stdio.h"
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#endif
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#define STATIC // functions used internal to this module
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#define KEY_VALUE_BUFFER_SIZE 1024
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#if DBG
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extern ULONG HalDebug;
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#endif
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extern struct HalpMpInfo HalpMpInfoTable;
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extern USHORT HalpIoCompatibleRangeList0[];
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extern USHORT HalpIoCompatibleRangeList1[];
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extern BOOLEAN HalpPciLockSettings;
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extern WCHAR HalpSzSystem[];
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struct PcMpTable *PcMpTablePtr;
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BOOLEAN
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HalpTranslateIsaBusAddress (
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IN PVOID BusHandler,
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IN PVOID RootHandler,
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IN PHYSICAL_ADDRESS BusAddress,
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IN OUT PULONG AddressSpace,
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OUT PPHYSICAL_ADDRESS TranslatedAddress
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);
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ULONG
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HalpNoBusData (
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IN PVOID BusHandler,
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IN PVOID RootHandler,
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IN ULONG SlotNumber,
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IN PVOID Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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HalpGetEisaData (
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IN PVOID BusHandler,
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IN PVOID RootHandler,
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IN ULONG SlotNumber,
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IN PVOID Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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NTSTATUS
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HalpAdjustEisaResourceList (
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IN PVOID BusHandler,
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IN PVOID RootHandler,
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IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList
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);
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ULONG
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HalpGetEisaInterruptVector (
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IN PVOID BusHandler,
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IN PVOID RootHandler,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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);
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// --------------------------------------------------------------------
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VOID
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HalpInitBusAddressMapInfo (
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VOID
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);
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STATIC PSUPPORTED_RANGES
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HalpBuildBusAddressMap (
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IN UCHAR MpsBusId
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);
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PBUS_HANDLER
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HalpLookupCreateHandlerForBus (
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IN PPCMPBUSTRANS pBusType,
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IN ULONG BusNo
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);
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VOID
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HalpInheritBusAddressMapInfo (
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VOID
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);
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BOOLEAN
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HalpMPSBusId2NtBusId (
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IN UCHAR ApicBusId,
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OUT PPCMPBUSTRANS *ppBusType,
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OUT PULONG BusNo
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);
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STATIC PSUPPORTED_RANGES
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HalpMergeRangesFromParent (
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PSUPPORTED_RANGES CurrentList,
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UCHAR MpsBusId
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);
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#if DEBUGGING
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VOID
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HalpDisplayBusInformation (
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PBUS_HANDLER Bus
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);
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#endif
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//
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// Internal prototypes
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//
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struct {
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ULONG Offset;
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UCHAR MpsType;
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} HalpMpsRangeList[] = {
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FIELD_OFFSET (SUPPORTED_RANGES, IO), MPS_ADDRESS_MAP_IO,
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FIELD_OFFSET (SUPPORTED_RANGES, Memory), MPS_ADDRESS_MAP_MEMORY,
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FIELD_OFFSET (SUPPORTED_RANGES, PrefetchMemory),MPS_ADDRESS_MAP_PREFETCH_MEMORY,
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FIELD_OFFSET (SUPPORTED_RANGES, Dma), MPS_ADDRESS_MAP_UNDEFINED,
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0, MPS_ADDRESS_MAP_UNDEFINED
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};
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#define RANGE_LIST(a,i) ((PSUPPORTED_RANGE) ((PUCHAR) a + HalpMpsRangeList[i].Offset))
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(INIT,HalpInitBusAddressMapInfo)
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#pragma alloc_text(INIT,HalpBuildBusAddressMap)
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#pragma alloc_text(INIT,HalpInheritBusAddressMapInfo)
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#pragma alloc_text(INIT,HalpMergeRangesFromParent)
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#pragma alloc_text(INIT,HalpLookupCreateHandlerForBus)
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#pragma alloc_text(PAGE,HalpAllocateNewRangeList)
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#pragma alloc_text(PAGE,HalpFreeRangeList)
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#pragma alloc_text(PAGE,HalpMpsGetParentBus)
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#pragma alloc_text(PAGE,HalpMpsBusIsRootBus)
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#endif
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VOID
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HalpInitBusAddressMapInfo (
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VOID
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)
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/*++
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Routine Description:
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Reads MPS bus addressing mapping table, and builds/replaces the
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supported address range mapping for the given bus.
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Note there's a little slop in this function as it doesn't reclaim
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memory allocated before this function is called, which it replaces
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pointers too.
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--*/
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{
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ULONG BusNo;
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PPCMPBUSTRANS pBusType;
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PMPS_EXTENTRY ExtTable2, ExtTable;
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PBUS_HANDLER Handler;
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PSUPPORTED_RANGES Addresses;
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ULONG i;
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BOOLEAN Processed;
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//
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// Check for any address mapping information for the buses
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//
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// Note: We assume that if any MPS bus address map information
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// is found for a bus, that the MPS bios will supply all the
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// valid IO, Memory, and prefetch memory addresses for that BUS.
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// The bios can not supply some address tyeps for a given bus
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// without supplying them all.
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//
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ExtTable = HalpMpInfoTable.ExtensionTable;
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while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
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//
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// Is this an address map entry?
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//
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if (ExtTable->Type == EXTTYPE_BUS_ADDRESS_MAP) {
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//
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// See if this bus has already been processed
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//
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Processed = FALSE;
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ExtTable2 = HalpMpInfoTable.ExtensionTable;
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while (ExtTable2 < ExtTable) {
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if (ExtTable2->Type == EXTTYPE_BUS_ADDRESS_MAP &&
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ExtTable2->u.AddressMap.BusId == ExtTable->u.AddressMap.BusId) {
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Processed = TRUE;
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break;
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}
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ExtTable2 = (PMPS_EXTENTRY) (((PUCHAR) ExtTable2) + ExtTable2->Length);
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}
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//
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// Determine the NT bus this map info is for
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//
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if (!Processed &&
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HalpMPSBusId2NtBusId (ExtTable->u.AddressMap.BusId, &pBusType, &BusNo)) {
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//
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// Lookup the bushander for the bus
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//
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Handler = HalpLookupCreateHandlerForBus (pBusType, BusNo);
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if (Handler) {
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//
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// NOTE: Until we get better kernel PnP support, for now
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// limit the ability of the system to move already BIOS
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// initialized devices. This is needed because the exteneded
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// express BIOS can't give the OS any breathing space when
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// it hands bus supported ranges, and there's currently not
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// an interface to the kernel to obtain current PCI device
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// settings. (fixed in the future.)
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//
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HalpPciLockSettings = TRUE;
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//
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// Build BusAddress Map for this MPS bus
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//
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Addresses = HalpBuildBusAddressMap (ExtTable->u.AddressMap.BusId);
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//
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// Consoladate ranges
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//
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HalpConsolidateRanges (Addresses);
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//
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// Use current ranges for any undefined MPS ranges
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//
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for (i=0; HalpMpsRangeList[i].Offset; i++) {
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if (HalpMpsRangeList[i].MpsType == MPS_ADDRESS_MAP_UNDEFINED) {
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*RANGE_LIST(Addresses,i) = *RANGE_LIST(Handler->BusAddresses, i);
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}
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}
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//
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// Set bus'es support addresses
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//
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Handler->BusAddresses = Addresses;
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} else {
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DBGMSG ("HAL: Initialize BUS address map - bus not an registered NT bus\n");
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}
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}
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}
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ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
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}
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}
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STATIC PSUPPORTED_RANGES
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HalpBuildBusAddressMap (
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IN UCHAR MpsBusId
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)
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/*++
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Routine Description:
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Builds a SUPPORT_RANGES list for the supplied Mps Bus Id, by
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MPS bus addressing mapping descriptors.
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Note this function does not include any information contained
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in the MPS bus hierarchy descriptors.
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Arguments:
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MpsBusId - mps bus id of bus to build address map for.
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Return:
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The bus'es supported ranges as defined by the MPS bus
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address mapping descriptors
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--*/
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{
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PMPS_EXTENTRY ExtTable;
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PSUPPORTED_RANGES Addresses;
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PSUPPORTED_RANGE HRange, Range;
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ULONG i, j, k;
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ULONG Base, Limit, AddressSpace;
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PUSHORT CompatibleList;
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Addresses = HalpAllocateNewRangeList();
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ExtTable = HalpMpInfoTable.ExtensionTable;
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while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
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//
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// Is this an address map entry for the proper bus?
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//
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if (ExtTable->Type == EXTTYPE_BUS_ADDRESS_MAP &&
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ExtTable->u.AddressMap.BusId == MpsBusId) {
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//
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// Find range type
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//
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for (i=0; HalpMpsRangeList[i].Offset; i++) {
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if (HalpMpsRangeList[i].MpsType == ExtTable->u.AddressMap.Type) {
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HRange = RANGE_LIST(Addresses, i);
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break;
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}
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}
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AddressSpace = HalpMpsRangeList[i].MpsType == MPS_ADDRESS_MAP_IO ? 1 : 0;
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if (HalpMpsRangeList[i].Offset) {
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HalpAddRange (
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HRange,
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AddressSpace,
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0, // SystemBase
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ExtTable->u.AddressMap.Base,
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ExtTable->u.AddressMap.Base + ExtTable->u.AddressMap.Length - 1
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);
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} else {
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DBGMSG ("HALMPS: Unkown address range type in MPS table\n");
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}
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}
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ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
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}
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//
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// See if the BIOS wants to modify the buses supported addresses with
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// some pre-defined default information. (yes, another case where the
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// bios wants to be lazy.)
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//
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ExtTable = HalpMpInfoTable.ExtensionTable;
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while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
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//
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// Is this an CompatibleMap entry for the proper bus?
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//
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if (ExtTable->Type == EXTTYPE_BUS_COMPATIBLE_MAP &&
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ExtTable->u.CompatibleMap.BusId == MpsBusId) {
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//
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// All currently defined default tables are for IO ranges,
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// we'll use that assumption here.
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//
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i = 0;
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ASSERT (HalpMpsRangeList[i].MpsType == MPS_ADDRESS_MAP_IO);
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HRange = RANGE_LIST(Addresses, i);
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AddressSpace = 1;
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CompatibleList = NULL;
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switch (ExtTable->u.CompatibleMap.List) {
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case 0: CompatibleList = HalpIoCompatibleRangeList0; break;
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case 1: CompatibleList = HalpIoCompatibleRangeList1; break;
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default: DBGMSG ("HAL: Unknown compatible range list\n"); continue; break;
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}
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for (j=0; j < 0x10; j++) {
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for (k=0; CompatibleList[k]; k += 2) {
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Base = (j << 12) | CompatibleList[k];
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Limit = (j << 12) | CompatibleList[k+1];
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if (ExtTable->u.CompatibleMap.Modifier) {
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HalpRemoveRange (HRange, Base, Limit);
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} else {
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HalpAddRange (HRange, AddressSpace, 0, Base, Limit);
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}
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}
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}
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}
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ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
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}
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return Addresses;
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}
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NTSTATUS
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HalpAddEisaBus (
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PBUS_HANDLER Bus
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)
|
||
/*++
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||
|
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Routine Description:
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Adds another EISA bus handler to the system.
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Note: this is used for ISA buses as well - they are added as eisa
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buses, then cloned into isa bus handlers
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||
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--*/
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{
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Bus->GetBusData = HalpGetEisaData;
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Bus->GetInterruptVector = HalpGetEisaInterruptVector;
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Bus->AdjustResourceList = HalpAdjustEisaResourceList;
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|
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Bus->BusAddresses->Version = BUS_SUPPORTED_RANGE_VERSION;
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Bus->BusAddresses->Dma.Limit = 7;
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Bus->BusAddresses->Memory.Limit = 0xFFFFFFFF;
|
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Bus->BusAddresses->IO.Limit = 0xFFFF;
|
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Bus->BusAddresses->IO.SystemAddressSpace = 1;
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Bus->BusAddresses->PrefetchMemory.Base = 1;
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||
|
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return STATUS_SUCCESS;
|
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}
|
||
|
||
NTSTATUS
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HalpAddPciBus (
|
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PBUS_HANDLER Bus
|
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)
|
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{
|
||
//
|
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// The firmware should have informed NT how many PCI buses
|
||
// there where at NtDetect time
|
||
//
|
||
|
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DBGMSG ("HAL: BIOS problem. PCI bus must be report via IS_PCI_PRESENT bios call\n");
|
||
return STATUS_UNSUCCESSFUL;
|
||
}
|
||
|
||
PBUS_HANDLER
|
||
HalpLookupCreateHandlerForBus (
|
||
IN PPCMPBUSTRANS pBusType,
|
||
IN ULONG BusNo
|
||
)
|
||
{
|
||
NTSTATUS Status;
|
||
PBUS_HANDLER Handler;
|
||
|
||
Handler = HaliHandlerForBus (pBusType->NtType, BusNo);
|
||
|
||
if (!Handler && pBusType->NewInstance) {
|
||
|
||
//
|
||
// This bus does not exist, but we know how to add it.
|
||
//
|
||
|
||
Status = HalRegisterBusHandler (
|
||
pBusType->NtType,
|
||
pBusType->NtConfig,
|
||
BusNo,
|
||
Internal, // parent bus
|
||
0,
|
||
pBusType->BusExtensionSize,
|
||
pBusType->NewInstance,
|
||
&Handler
|
||
);
|
||
|
||
if (!NT_SUCCESS(Status)) {
|
||
Handler = NULL;
|
||
}
|
||
}
|
||
|
||
return Handler;
|
||
}
|
||
|
||
|
||
VOID
|
||
HalpDetectInvalidAddressOverlaps(
|
||
VOID
|
||
)
|
||
{
|
||
ULONG i, j, k;
|
||
PBUS_HANDLER Bus1, Bus2;
|
||
PSUPPORTED_RANGE Entry;
|
||
PSUPPORTED_RANGES NewRange;
|
||
|
||
//
|
||
// Find root PCI buses and detect invalid address overlaps
|
||
//
|
||
|
||
for(i=0; Bus1 = HaliHandlerForBus(PCIBus, i); ++i) {
|
||
if (((Bus1->ParentHandler) &&
|
||
(Bus1->ParentHandler->InterfaceType != Internal)) ||
|
||
!(Bus1->BusAddresses)) {
|
||
continue;
|
||
}
|
||
|
||
for(j=i+1; Bus2 = HaliHandlerForBus(PCIBus, j); ++j) {
|
||
if (((Bus2->ParentHandler) &&
|
||
(Bus2->ParentHandler->InterfaceType != Internal)) ||
|
||
!(Bus2->BusAddresses)) {
|
||
continue;
|
||
}
|
||
|
||
NewRange = HalpMergeRanges(Bus1->BusAddresses, Bus2->BusAddresses);
|
||
HalpConsolidateRanges(NewRange);
|
||
for(k=0; HalpMpsRangeList[k].Offset; k++) {
|
||
Entry = RANGE_LIST(NewRange, k);
|
||
while (Entry) {
|
||
if (Entry->Limit != 0) {
|
||
// KeBugCheck(HAL_INITIALIZATION_FAILED);
|
||
DbgPrint("HalpDetectInvalidAddressOverlaps: Address Overlap Detected\n");
|
||
break;
|
||
} else {
|
||
Entry = Entry->Next;
|
||
}
|
||
}
|
||
}
|
||
HalpFreeRangeList(NewRange);
|
||
}
|
||
}
|
||
}
|
||
|
||
VOID
|
||
HalpInheritBusAddressMapInfo (
|
||
VOID
|
||
)
|
||
/*++
|
||
|
||
Routine Description:
|
||
|
||
Reads MPS bus hierarchy descriptors and inherits any implied bus
|
||
address mapping information.
|
||
|
||
Note there's a little slop in this function as it doesn't reclaim
|
||
memory allocated before this function is called, which it replaces
|
||
pointers too.
|
||
|
||
--*/
|
||
{
|
||
ULONG BusNo, i, j;
|
||
PPCMPBUSTRANS pBusType;
|
||
PMPS_EXTENTRY ExtTable;
|
||
PBUS_HANDLER Bus, Bus2;
|
||
PSUPPORTED_RANGES Addresses;
|
||
PUCHAR p;
|
||
|
||
//
|
||
// Search for any bus hierarchy descriptors and inherit supported address
|
||
// ranges accordingly.
|
||
//
|
||
|
||
ExtTable = HalpMpInfoTable.ExtensionTable;
|
||
while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
|
||
|
||
//
|
||
// Is this a bus hierarchy descriptor?
|
||
//
|
||
|
||
if (ExtTable->Type == EXTTYPE_BUS_HIERARCHY) {
|
||
|
||
//
|
||
// Determine the NT bus
|
||
//
|
||
|
||
if (HalpMPSBusId2NtBusId (ExtTable->u.BusHierarchy.BusId, &pBusType, &BusNo)) {
|
||
|
||
Bus = HalpLookupCreateHandlerForBus (pBusType, BusNo);
|
||
|
||
if (Bus) {
|
||
//
|
||
// Get ranges from parent
|
||
//
|
||
|
||
Addresses = HalpMergeRangesFromParent (
|
||
Bus->BusAddresses,
|
||
ExtTable->u.BusHierarchy.ParentBusId
|
||
);
|
||
|
||
//
|
||
// Set bus'es support addresses
|
||
//
|
||
|
||
Bus->BusAddresses = HalpConsolidateRanges (Addresses);
|
||
|
||
} else {
|
||
|
||
DBGMSG ("HAL: Inherit BUS address map - bus not an registered NT bus\n");
|
||
}
|
||
|
||
} else {
|
||
|
||
DBGMSG ("HAL: Inherit BUS address map - unkown MPS bus type\n");
|
||
}
|
||
}
|
||
|
||
ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
|
||
}
|
||
|
||
//
|
||
// Clone EISA bus ranges to matching ISA buses
|
||
//
|
||
|
||
BusNo = 0;
|
||
for (; ;) {
|
||
Bus = HaliHandlerForBus(Eisa, BusNo);
|
||
Bus2 = HaliHandlerForBus(Isa , BusNo);
|
||
|
||
if (!Bus) {
|
||
break;
|
||
}
|
||
|
||
if (!Bus2) {
|
||
//
|
||
// Matching ISA bus didn't exist, create it
|
||
//
|
||
|
||
HalRegisterBusHandler (
|
||
Isa,
|
||
ConfigurationSpaceUndefined,
|
||
BusNo,
|
||
Eisa, // parent bus
|
||
BusNo,
|
||
0,
|
||
NULL,
|
||
&Bus2
|
||
);
|
||
|
||
Bus2->GetBusData = HalpNoBusData;
|
||
Bus2->TranslateBusAddress = HalpTranslateIsaBusAddress;
|
||
}
|
||
|
||
//
|
||
// Copy its parent bus ranges
|
||
//
|
||
|
||
Addresses = HalpCopyRanges (Bus->BusAddresses);
|
||
|
||
//
|
||
// Pull out memory ranges above the isa 24 bit supported ranges
|
||
//
|
||
|
||
HalpRemoveRange (
|
||
&Addresses->Memory,
|
||
0x1000000,
|
||
0x7FFFFFFFFFFFFFFF
|
||
);
|
||
|
||
HalpRemoveRange (
|
||
&Addresses->PrefetchMemory,
|
||
0x1000000,
|
||
0x7FFFFFFFFFFFFFFF
|
||
);
|
||
|
||
Bus2->BusAddresses = HalpConsolidateRanges (Addresses);
|
||
BusNo += 1;
|
||
}
|
||
|
||
//
|
||
// Inherit any implied interrupt routing from parent PCI buses
|
||
//
|
||
|
||
HalpMPSPCIChildren ();
|
||
HalpDetectInvalidAddressOverlaps();
|
||
|
||
#if DBG
|
||
if (HalDebug) {
|
||
HalpDisplayAllBusRanges ();
|
||
}
|
||
#endif
|
||
}
|
||
|
||
STATIC PSUPPORTED_RANGES
|
||
HalpMergeRangesFromParent (
|
||
IN PSUPPORTED_RANGES CurrentList,
|
||
IN UCHAR MpsBusId
|
||
)
|
||
/*++
|
||
Routine Description:
|
||
|
||
Shrinks this CurrentList to include only the ranges also
|
||
supported by the supplied MPS bus id.
|
||
|
||
|
||
Arguments:
|
||
|
||
CurrentList - Current supported range list
|
||
MpsBusId - mps bus id of bus to merge with
|
||
|
||
Return:
|
||
|
||
The bus'es supported ranges as defined by the orignal list,
|
||
shrunk by all parents buses supported ranges as defined by
|
||
the MPS hierarchy descriptors
|
||
|
||
--*/
|
||
{
|
||
ULONG BusNo;
|
||
PPCMPBUSTRANS pBusType;
|
||
PMPS_EXTENTRY ExtTable;
|
||
PBUS_HANDLER Bus;
|
||
PSUPPORTED_RANGES NewList, MergeList, MpsBusList;
|
||
BOOLEAN FoundParentBus;
|
||
ULONG i;
|
||
|
||
FoundParentBus = FALSE;
|
||
MergeList = NULL;
|
||
MpsBusList = NULL;
|
||
|
||
//
|
||
// Determine the NT bus
|
||
//
|
||
|
||
if (HalpMPSBusId2NtBusId (MpsBusId, &pBusType, &BusNo)) {
|
||
|
||
//
|
||
// Lookup the bushander for the bus
|
||
//
|
||
|
||
Bus = HaliHandlerForBus (pBusType->NtType, BusNo);
|
||
if (Bus) {
|
||
MergeList = Bus->BusAddresses;
|
||
}
|
||
}
|
||
|
||
//
|
||
// If NT bus not found, use supported range list from MPS bus
|
||
// address map descriptors
|
||
//
|
||
|
||
if (!MergeList) {
|
||
MpsBusList = HalpBuildBusAddressMap(MpsBusId);
|
||
MergeList = MpsBusList;
|
||
}
|
||
|
||
//
|
||
// If no list to merge with use CurrentList
|
||
//
|
||
|
||
if (!MergeList) {
|
||
return CurrentList;
|
||
}
|
||
|
||
|
||
if (!CurrentList) {
|
||
|
||
//
|
||
// If no CurrentList, then nothing to merge with
|
||
//
|
||
|
||
NewList = HalpCopyRanges (MergeList);
|
||
|
||
} else {
|
||
|
||
//
|
||
// Merge lists together and build a new list
|
||
//
|
||
|
||
NewList = HalpMergeRanges (
|
||
CurrentList,
|
||
MergeList
|
||
);
|
||
|
||
//
|
||
// MPS doesn't define DMA ranges, so we don't
|
||
// merge those down.. Add valid DMA ranges back
|
||
//
|
||
|
||
HalpAddRangeList (&NewList->Dma, &CurrentList->Dma);
|
||
}
|
||
|
||
|
||
//
|
||
// See if bus has parent bus listed in the bus hierarchy descriptors
|
||
//
|
||
|
||
ExtTable = HalpMpInfoTable.ExtensionTable;
|
||
while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
|
||
|
||
if (ExtTable->Type == EXTTYPE_BUS_HIERARCHY &&
|
||
ExtTable->u.BusHierarchy.BusId == MpsBusId) {
|
||
|
||
//
|
||
// BIOS can only list one parent per bus
|
||
//
|
||
|
||
ASSERT (FoundParentBus == FALSE);
|
||
FoundParentBus = TRUE;
|
||
|
||
//
|
||
// Merge current list with parent's supported range list
|
||
//
|
||
|
||
CurrentList = NewList;
|
||
NewList = HalpMergeRangesFromParent (
|
||
CurrentList,
|
||
ExtTable->u.BusHierarchy.ParentBusId
|
||
);
|
||
|
||
//
|
||
// Free old list
|
||
//
|
||
|
||
HalpFreeRangeList (CurrentList);
|
||
}
|
||
|
||
ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
|
||
}
|
||
|
||
//
|
||
// Clean up
|
||
//
|
||
|
||
if (MpsBusList) {
|
||
HalpFreeRangeList (MpsBusList);
|
||
}
|
||
|
||
return NewList;
|
||
}
|
||
|
||
NTSTATUS
|
||
HalpMpsGetParentBus(
|
||
IN UCHAR MpsBus,
|
||
OUT UCHAR *ParentMpsBus
|
||
)
|
||
{
|
||
PMPS_EXTENTRY ExtTable;
|
||
|
||
PAGED_CODE();
|
||
|
||
ExtTable = HalpMpInfoTable.ExtensionTable;
|
||
while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
|
||
|
||
//
|
||
// Is this a bus hierarchy descriptor?
|
||
//
|
||
|
||
if (ExtTable->Type == EXTTYPE_BUS_HIERARCHY) {
|
||
|
||
if (ExtTable->u.BusHierarchy.BusId == MpsBus) {
|
||
|
||
*ParentMpsBus = ExtTable->u.BusHierarchy.ParentBusId;
|
||
return STATUS_SUCCESS;
|
||
}
|
||
}
|
||
|
||
ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
|
||
}
|
||
|
||
return STATUS_NOT_FOUND;
|
||
}
|
||
|
||
BOOLEAN
|
||
HalpMpsBusIsRootBus(
|
||
IN UCHAR MpsBus
|
||
)
|
||
//
|
||
// The criteria for a Root Bus are as follows:
|
||
//
|
||
// 1.1 and 1.4 BIOS:
|
||
//
|
||
// 1) The bus is number 0.
|
||
//
|
||
//
|
||
// 1.4 BIOS only:
|
||
//
|
||
// 2) The bus does not have a parent.
|
||
//
|
||
// 3) The bus has address descriptors, if
|
||
// there are any present in the machine.
|
||
//
|
||
//
|
||
// 4) Last resort. Scan all possible parent busses
|
||
// looking for a bridge that generates this bus.
|
||
//
|
||
#define BRIDGE_HEADER_BUFFER_SIZE (FIELD_OFFSET(PCI_COMMON_CONFIG, u.type1.SubordinateBus) + 1)
|
||
{
|
||
NTSTATUS status;
|
||
UCHAR parentBus;
|
||
PMPS_EXTENTRY ExtTable;
|
||
BOOLEAN biosContainsAddressInfo = FALSE;
|
||
UCHAR parentPci, childPci;
|
||
PCI_SLOT_NUMBER bridgeSlot;
|
||
PCI_COMMON_CONFIG pciData;
|
||
ULONG bytesRead, d, f;
|
||
PPCMPBUSTRANS busType;
|
||
ULONG busNumber;
|
||
|
||
PAGED_CODE();
|
||
|
||
if (MpsBus == 0) {
|
||
return TRUE;
|
||
}
|
||
|
||
//
|
||
// Check to see if this MPS bus, though not
|
||
// itself numbered 0, represents a bus that
|
||
// is numbered 0.
|
||
//
|
||
|
||
if (HalpMPSBusId2NtBusId(MpsBus,
|
||
&busType,
|
||
&busNumber)) {
|
||
|
||
if (busNumber == 0) {
|
||
return TRUE;
|
||
}
|
||
}
|
||
|
||
if (PcMpTablePtr->Revision >= 4) {
|
||
|
||
if (NT_SUCCESS(HalpMpsGetParentBus(MpsBus,&parentBus))) {
|
||
return FALSE;
|
||
}
|
||
|
||
ExtTable = HalpMpInfoTable.ExtensionTable;
|
||
while (ExtTable < HalpMpInfoTable.EndOfExtensionTable) {
|
||
|
||
if ((ExtTable->Type == EXTTYPE_BUS_ADDRESS_MAP) ||
|
||
(ExtTable->Type == EXTTYPE_BUS_COMPATIBLE_MAP)) {
|
||
|
||
biosContainsAddressInfo = TRUE;
|
||
|
||
if (ExtTable->u.AddressMap.BusId == MpsBus) {
|
||
|
||
//
|
||
// This entry corresponds to the bus that
|
||
// we care about.
|
||
//
|
||
return TRUE;
|
||
}
|
||
}
|
||
|
||
ExtTable = (PMPS_EXTENTRY) (((PUCHAR) ExtTable) + ExtTable->Length);
|
||
}
|
||
|
||
//
|
||
// Compaq machines have their own special ways to be busted. So,
|
||
// when dealing with Compaq, never believe their MP table at all.
|
||
// Go straight to probing the hardware.
|
||
//
|
||
|
||
if (!strstr(PcMpTablePtr->OemId, "COMPAQ")) {
|
||
|
||
//
|
||
// If this is not Compaq, assume that probing the hardware
|
||
// is not yet necessary.
|
||
//
|
||
|
||
if (biosContainsAddressInfo) {
|
||
|
||
//
|
||
// Some bus in this machine contained address
|
||
// info, but ours didn't.
|
||
//
|
||
|
||
return FALSE;
|
||
}
|
||
|
||
//
|
||
// We can't figure out much from the MPS tables.
|
||
//
|
||
|
||
status = HalpPci2MpsBusNumber(MpsBus,
|
||
&childPci);
|
||
|
||
//
|
||
// This wasn't a PCI bus. Guess that it is a root.
|
||
//
|
||
|
||
if (!NT_SUCCESS(status)) {
|
||
return TRUE;
|
||
}
|
||
}
|
||
}
|
||
|
||
//
|
||
// This is a PCI bus, so scan the other PCI busses looking
|
||
// for it's parent.
|
||
//
|
||
|
||
childPci = MpsBus;
|
||
parentPci = childPci - 1;
|
||
|
||
while (TRUE) {
|
||
|
||
//
|
||
// Find the bridge.
|
||
//
|
||
|
||
bridgeSlot.u.AsULONG = 0;
|
||
|
||
for (d = 0; d < PCI_MAX_DEVICES; d++) {
|
||
for (f = 0; f < PCI_MAX_FUNCTION; f++) {
|
||
|
||
bridgeSlot.u.bits.DeviceNumber = d;
|
||
bridgeSlot.u.bits.FunctionNumber = f;
|
||
|
||
bytesRead = HalGetBusDataByOffset(PCIConfiguration,
|
||
parentPci,
|
||
bridgeSlot.u.AsULONG,
|
||
&pciData,
|
||
0,
|
||
BRIDGE_HEADER_BUFFER_SIZE);
|
||
|
||
if (bytesRead == (ULONG)BRIDGE_HEADER_BUFFER_SIZE) {
|
||
|
||
if ((pciData.VendorID != PCI_INVALID_VENDORID) &&
|
||
(PCI_CONFIGURATION_TYPE((&pciData)) != PCI_DEVICE_TYPE)) {
|
||
|
||
//
|
||
// This is a bridge of some sort.
|
||
//
|
||
|
||
if (pciData.u.type1.SecondaryBus == childPci) {
|
||
|
||
//
|
||
// It is also the bridge that creates the
|
||
// PCI bus. Thus this isn't a root.
|
||
|
||
return FALSE;
|
||
}
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
//
|
||
// No bridge found. Must be a root.
|
||
//
|
||
|
||
if (parentPci == 0) {
|
||
return TRUE;
|
||
}
|
||
|
||
parentPci--;
|
||
}
|
||
}
|
||
|