175 lines
4.6 KiB
ArmAsm
175 lines
4.6 KiB
ArmAsm
//
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// Copyright (c) 1996-1998 Microsoft Corporation
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//
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// Module Name:
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//
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// fphelp.s
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//
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// Abstract:
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//
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//
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// This module contains assembly code helpers for floating-point
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// emulation.
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//
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// Author:
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//
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// Barry Bond (barrybo) creation-date 26-Aug-1996
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//
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// Notes:
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//
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// Revision History:
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#include "kxalpha.h"
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#include "soalpha.h"
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#include "ksalpha.h"
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.rdata
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RoundingTable:
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.long (2 << 26), (1 << 26), (3 << 26), 0
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.text
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//
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// Define call frame used to exchange a floating point and integer register.
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//
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.struct 0
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FpCr: .space 8 // fpcr value
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.space 8 // ensure 16-byte stack alignment
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FpFrameLength: // length of stack frame
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NESTED_ENTRY(SetNativeRoundingMode, FpFrameLength, ra)
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//
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// Routine Description:
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//
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// Sets the native FPU to the specified x86 rounding mode.
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//
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// Arguments:
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//
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// a0 -- the x86 rounding mode (already guaranteed to be just 2 bits)
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//
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// Return Value:
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//
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// None
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//
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lda sp, -FpFrameLength(sp) // allocate stack frame
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PROLOGUE_END
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// map x86 rounding mode to Alpha rounding mode in a0
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lda t0, RoundingTable
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s4addl a0, t0, a0
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ldl a0, 0(a0)
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excb // wait for all pending traps
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mf_fpcr f0, f0, f0 // get current fpcr
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excb // block against new traps
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stt f0, FpCr(sp) // store fpcr to stack
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ldl t0, FpCr+4(sp) // load the high dword of fpcr into integer register
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ldiq t1, (3 << 26) // load immediate value
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bic t0, t1, t0 // t0 = t0 & ~(3 << 26)
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or t0, a0, t0 // t0 |= a0
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stl t0, FpCr+4(sp) // store new high dword of fpcr to stack
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ldt f0, FpCr(sp) // load into fp register
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mt_fpcr f0, f0, f0 // set new fpcr
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excb // block against new traps
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lda sp, FpFrameLength(sp)
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ret zero, (ra)
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.end SetNativeRoundingMode
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NESTED_ENTRY(GetNativeFPStatus, FpFrameLength, ra)
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//
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// Routine Description:
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//
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// Alpha-specific version of _statusfp()/_clearfp().
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// Alpha-specific equivalent of _statusfp().
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//
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lda sp, -FpFrameLength(sp) // allocate stack frame
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PROLOGUE_END
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// this is _get_softfpcr, except the result ends up in t0
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GET_THREAD_ENVIRONMENT_BLOCK
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ldl t0, TeSoftFpcr(v0) // get current software fpcr value
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ldiq t3, 0x3e0000 // t3 = SW_FPCR_STATUS_MASK
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bic t0, t3, t1 // t1 = soft_fpcr & (~SW_FPCR_STATUS_MASK)
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// this is _set_softfpcr, except arg is in t1
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stl t1, TeSoftFpcr(v0) // store new software fpcr value
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excb // wait for all pending traps
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mf_fpcr f0, f0, f0 // get current fpcr
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excb // block against new traps
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stt f0, FpCr(sp) // store fpcr to stack
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ldq t3, FpCr(sp) // load fpcr into integer register
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ldiq t1, 0x1c01000000000000 // (FPCR_ROUND_MASK|FPCR_UNDERFLOW_TO_ZERO_ENABLE|FPCR_DENORMAL_OPERANDS_TO_ZERO_ENABLE)
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and t3, t1, t3 // t3 &= t1
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stq t3, FpCr(sp) // save integer version to stack
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ldt f0, FpCr(sp) // load it into floating-point reg
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mt_fpcr f0, f0, f0 // set new fpcr
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excb // block against new traps
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bis t0, zero, v0 // move original software fpcr into v0 for ret
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lda sp, FpFrameLength(sp)
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ret zero, (ra)
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.end GetNativeFPStatus
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NESTED_ENTRY(CastDoubleToInt64, FpFrameLength, ra)
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//
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// Arguments:
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//
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// f16 = double value to be cast
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//
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// Return Value:
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//
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// The double is cast to an __int64 value using Dynamic rounding.
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// NOTE: The Alpha C compiler generates chopped rounding always,
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// so "i64 = (double)-1.2" will give a different answer than
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// "i64 = CastDoubleToInt64(-1.2)" if the FP control word
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// is set to round towards -infinity.
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//
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lda sp, -FpFrameLength(sp) // allocate stack frame
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PROLOGUE_END
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// Convert IEEE floating to Integer.
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// Trapping: S - software
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// V - integer overflow enable
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// I - inexact enable
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// Rounding: D - dynamic
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cvttqsvid f16, f1
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// Store the int64 value onto the stack
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stt f1, FpCr(sp)
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// Load the int64 value into an integer register
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ldq v0, FpCr(sp)
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// Clean up the stack frame
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lda sp, FpFrameLength(sp)
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ret zero, (ra)
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.end CastDoubleToInt64
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