590 lines
14 KiB
C
590 lines
14 KiB
C
/*++
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Copyright (c) 1995-1998 Microsoft Corporation
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Module Name:
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fpustore.c
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Abstract:
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Floating point store functions
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Author:
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04-Oct-1995 BarryBo
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Revision History:
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--*/
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#include <nt.h>
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#include <ntrtl.h>
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#include <nturtl.h>
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#include <windows.h>
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#include <float.h>
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#include <math.h>
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#include <stdio.h>
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#include "wx86.h"
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#include "cpuassrt.h"
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#include "fragp.h"
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#include "fpufragp.h"
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#include "fpuarith.h"
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ASSERTNAME;
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//
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// Forward declarations
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//
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__int64 CastDoubleToInt64(double d); // in alpha\fphelp.s
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#if !NATIVE_NAN_IS_INTEL_FORMAT
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//
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// Forward declarations
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//
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NPXPUTINTELR4(PutIntelR4_VALID);
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NPXPUTINTELR4(PutIntelR4_ZERO);
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NPXPUTINTELR4(PutIntelR4_SPECIAL);
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NPXPUTINTELR4(PutIntelR4_EMPTY);
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NPXPUTINTELR8(PutIntelR8_VALID);
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NPXPUTINTELR8(PutIntelR8_ZERO);
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NPXPUTINTELR8(PutIntelR8_SPECIAL);
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NPXPUTINTELR8(PutIntelR8_EMPTY);
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//
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// Jump tables
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//
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const NpxPutIntelR4 PutIntelR4Table[TAG_MAX] = {
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PutIntelR4_VALID,
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PutIntelR4_ZERO,
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PutIntelR4_SPECIAL,
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PutIntelR4_EMPTY
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};
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const NpxPutIntelR8 PutIntelR8Table[TAG_MAX] = {
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PutIntelR8_VALID,
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PutIntelR8_ZERO,
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PutIntelR8_SPECIAL,
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PutIntelR8_EMPTY
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};
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NPXPUTINTELR4(PutIntelR4_VALID)
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{
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FLOAT f = (FLOAT)Fp->r64;
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PUT_LONG(pIntelReal, *(DWORD *)&f);
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}
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NPXPUTINTELR4(PutIntelR4_ZERO)
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{
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//
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// This cannot simply write a constant 0.0 to memory as it must
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// copy the correct sign from the 0.0 in the FP register.
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//
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PUT_LONG(pIntelReal, Fp->rdw[1]);
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}
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NPXPUTINTELR4(PutIntelR4_SPECIAL)
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{
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switch (Fp->TagSpecial) {
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default:
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CPUASSERT(FALSE); // unknown tag - fall into TAG_INDEF
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case TAG_SPECIAL_INFINITY:
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case TAG_SPECIAL_DENORM:
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PutIntelR4_VALID(pIntelReal, Fp);
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break;
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case TAG_SPECIAL_INDEF:
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// Write out the R4 indefinite bit pattern
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PUT_LONG(pIntelReal, 0xffc00000);
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break;
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case TAG_SPECIAL_QNAN:
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case TAG_SPECIAL_SNAN: {
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DWORD d[2];
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FLOAT f;
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//
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// Truncate the R8 to an R4, and toggle the top bit of the mantissa
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// to form an Intel QNAN/SNAN (which is different than a native
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// QNAN/SNAN).
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//
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d[0] = Fp->rdw[0];
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d[1] = Fp->rdw[1] ^ 0x00400000;
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f = *(FLOAT *)d;
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PUT_LONG(pIntelReal, *(DWORD *)&f);
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}
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break;
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}
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}
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NPXPUTINTELR4(PutIntelR4_EMPTY)
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{
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//
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// It is assumed that callers of PutIntelR4() have already handled
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// TAG_EMPTY by raising an exception or converting it to TAG_INDEF.
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//
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CPUASSERT(FALSE);
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}
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NPXPUTINTELR8(PutIntelR8_VALID)
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{
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*(UNALIGNED DOUBLE *)pIntelReal = Fp->r64;
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}
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NPXPUTINTELR8(PutIntelR8_ZERO)
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{
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//
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// This cannot simply write a constant 0.0 to memory as it must
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// copy the correct sign from the 0.0 in the FP register.
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//
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*(UNALIGNED DOUBLE *)pIntelReal = Fp->r64;
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}
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NPXPUTINTELR8(PutIntelR8_SPECIAL)
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{
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DWORD *pdw = (DWORD *)pIntelReal;
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switch (Fp->TagSpecial) {
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default:
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CPUASSERT(FALSE); // unknown tag - fall into TAG_INDEF
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case TAG_SPECIAL_DENORM:
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case TAG_SPECIAL_INFINITY:
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// Both can be done as a simple R8-toR8 copy
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PutIntelR8_VALID(pIntelReal, Fp);
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break;
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case TAG_SPECIAL_INDEF:
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// Write out an Intel Indefinite
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PUT_LONG(pdw, 0);
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PUT_LONG((pdw+1), 0xfff80000);
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break;
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case TAG_SPECIAL_QNAN:
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case TAG_SPECIAL_SNAN:
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//
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// Toggle the top bit of the mantissa to form an Intel QNAN/SNAN
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// (which is different than a native QNAN/SNAN).
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//
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PUT_LONG(pdw, Fp->rdw[0]);
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PUT_LONG((pdw+1), Fp->rdw[1] ^ 0x00080000);
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break;
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}
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}
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NPXPUTINTELR8(PutIntelR8_EMPTY)
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{
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//
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// It is assumed that callers of PutIntelR8() have already handled
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// TAG_EMPTY by raising an exception or converting it to TAG_INDEF.
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//
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CPUASSERT(FALSE);
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}
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#endif //!NATIVE_NAN_IS_INTEL_FORMAT
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FRAG1(FIST16, SHORT) // FIST m16int
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{
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PFPREG ST0 = cpu->FpST0;
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__int64 i64;
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int Exponent;
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SHORT i16;
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FpArithDataPreamble(cpu, pop1);
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switch (ST0->Tag) {
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case TAG_VALID:
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Exponent = (int)((ST0->rdw[1] >> 20) & 0x7ff) - 1023;
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//
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if (Exponent >= 64) {
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//
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// Exponent is too big - this cannot be converted to an __int64
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// Raise I exception on overflow, or write 0x8000 for masked
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// exception.
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//
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IntOverflow:
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if (HandleInvalidOp(cpu)) {
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return;
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}
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PUT_SHORT(pop1, 0x8000);
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} else {
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i64 = CastDoubleToInt64(ST0->r64);
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i16 = (SHORT)i64;
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if ((__int64)i16 != i64) {
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goto IntOverflow;
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}
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PUT_SHORT(pop1, i16);
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}
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break;
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case TAG_ZERO:
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PUT_SHORT(pop1, 0);
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break;
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case TAG_SPECIAL:
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if (ST0->TagSpecial == TAG_SPECIAL_DENORM) {
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i64 = CastDoubleToInt64(ST0->r64);
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PUT_SHORT(pop1, (SHORT)i64);
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} else if (!HandleInvalidOp(cpu)) {
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// INFINITY and NANs are all invalid operations, and the masked
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// behavior is to write 0x8000
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PUT_SHORT(pop1, 0x8000);
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}
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break;
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case TAG_EMPTY:
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if (!HandleStackEmpty(cpu, ST0)) {
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PUT_SHORT(pop1, 0x8000);
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}
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break;
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}
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}
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FRAG1(FISTP16, SHORT) // FISTP m16int
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{
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PFPREG ST0 = cpu->FpST0;
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__int64 i64;
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int Exponent;
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SHORT i16;
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FpArithDataPreamble(cpu, pop1);
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switch (ST0->Tag) {
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case TAG_VALID:
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Exponent = (int)((ST0->rdw[1] >> 20) & 0x7ff) - 1023;
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if (Exponent >= 64) {
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//
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// Exponent is too big - this cannot be converted to an __int64
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// Raise I exception on overflow, or write 0x8000 for masked
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// exception.
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//
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IntOverflow:
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if (HandleInvalidOp(cpu)) {
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return;
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}
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PUT_SHORT(pop1, 0x8000);
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} else {
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i64 = CastDoubleToInt64(ST0->r64);
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i16 = (SHORT)i64;
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if ((__int64)i16 != i64) {
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goto IntOverflow;
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}
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PUT_SHORT(pop1, i16);
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}
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POPFLT;
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break;
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case TAG_ZERO:
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PUT_SHORT(pop1, 0);
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break;
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case TAG_SPECIAL:
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if (ST0->TagSpecial == TAG_SPECIAL_DENORM) {
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i64 = CastDoubleToInt64(ST0->r64);
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PUT_SHORT(pop1, (SHORT)i64);
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} else if (!HandleInvalidOp(cpu)) {
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// INFINITY and NANs are all invalid operations, and the masked
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// behavior is to write 0x8000
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PUT_SHORT(pop1, 0x8000);
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}
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POPFLT;
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break;
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case TAG_EMPTY:
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if (!HandleStackEmpty(cpu, ST0)) {
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PUT_SHORT(pop1, 0x8000);
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POPFLT;
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}
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break;
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}
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}
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FRAG1(FIST32, LONG) // FIST m32int
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{
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PFPREG ST0 = cpu->FpST0;
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__int64 i64;
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int Exponent;
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LONG i32;
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FpArithDataPreamble(cpu, pop1);
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switch (ST0->Tag) {
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case TAG_VALID:
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Exponent = (int)((ST0->rdw[1] >> 20) & 0x7ff) - 1023;
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if (Exponent >= 64) {
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//
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// Exponent is too big - this cannot be converted to an __int64
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// Raise I exception on overflow, or write 0x80000000 for masked
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// exception.
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//
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IntOverflow:
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if (HandleInvalidOp(cpu)) {
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return;
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}
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PUT_LONG(pop1, 0x80000000);
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} else {
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i64 = CastDoubleToInt64(ST0->r64);
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i32 = (LONG)i64;
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if ((__int64)i32 != i64) {
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goto IntOverflow;
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}
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PUT_LONG(pop1, i32);
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}
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break;
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case TAG_ZERO:
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PUT_LONG(pop1, 0);
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break;
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case TAG_SPECIAL:
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if (ST0->TagSpecial == TAG_SPECIAL_DENORM) {
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i64 = CastDoubleToInt64(ST0->r64);
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PUT_LONG(pop1, (LONG)i64);
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} else if (!HandleInvalidOp(cpu)) {
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// INFINITY and NANs are all invalid operations, and the masked
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// behavior is to write 0x80000000
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PUT_LONG(pop1, 0x80000000);
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}
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break;
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case TAG_EMPTY:
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if (!HandleStackEmpty(cpu, ST0)) {
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PUT_LONG(pop1, 0x80000000);
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POPFLT;
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}
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break;
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}
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}
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FRAG1(FISTP32, LONG) // FISTP m32int
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{
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PFPREG ST0 = cpu->FpST0;
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__int64 i64;
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int Exponent;
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LONG i32;
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FpArithDataPreamble(cpu, pop1);
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switch (ST0->Tag) {
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case TAG_VALID:
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Exponent = (int)((ST0->rdw[1] >> 20) & 0x7ff) - 1023;
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if (Exponent >= 64) {
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//
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// Exponent is too big - this cannot be converted to an __int64
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// Raise I exception on overflow, or write 0x80000000 for masked
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// exception.
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//
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IntOverflow:
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if (HandleInvalidOp(cpu)) {
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return;
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}
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PUT_LONG(pop1, 0x80000000);
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} else {
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i64 = CastDoubleToInt64(ST0->r64);
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i32 = (LONG)i64;
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if ((__int64)i32 != i64) {
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goto IntOverflow;
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}
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PUT_LONG(pop1, i32);
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}
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POPFLT;
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break;
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case TAG_ZERO:
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PUT_LONG(pop1, 0);
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POPFLT;
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break;
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case TAG_SPECIAL:
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if (ST0->TagSpecial == TAG_SPECIAL_DENORM) {
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i64 = CastDoubleToInt64(ST0->r64);
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PUT_LONG(pop1, (LONG)i64);
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} else if (!HandleInvalidOp(cpu)) {
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// INFINITY and NANs are all invalid operations, and the masked
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// behavior is to write 0x80000000
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PUT_LONG(pop1, 0x80000000);
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}
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POPFLT;
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break;
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case TAG_EMPTY:
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if (!HandleStackEmpty(cpu, ST0)) {
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PUT_LONG(pop1, 0x80000000);
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POPFLT;
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}
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break;
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}
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}
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FRAG1(FISTP64, LONGLONG) // FISTP m64int
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{
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PFPREG ST0 = cpu->FpST0;
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__int64 i64;
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int Exponent;
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FpArithDataPreamble(cpu, pop1);
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switch (ST0->Tag) {
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case TAG_VALID:
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Exponent = (int)((ST0->rdw[1] >> 20) & 0x7ff) - 1023;
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if (Exponent >= 64) {
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//
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// Exponent is too big - this cannot be converted to an __int64,
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// Raise I exception on overflow, or write 0x800...0 for masked
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// exception
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//
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if (HandleInvalidOp(cpu)) {
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return;
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}
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i64 = (__int64)0x8000000000000000i64;
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} else {
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i64 = CastDoubleToInt64(ST0->r64);
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}
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*(UNALIGNED LONGLONG *)pop1 = (LONGLONG)i64;
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POPFLT;
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break;
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case TAG_ZERO:
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*(UNALIGNED LONGLONG *)pop1 = 0;
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POPFLT;
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break;
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case TAG_SPECIAL:
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if (ST0->TagSpecial == TAG_SPECIAL_DENORM) {
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i64 = CastDoubleToInt64(ST0->r64);
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*(UNALIGNED LONGLONG *)pop1 = (LONGLONG)i64;
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} else if (!HandleInvalidOp(cpu)) {
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DWORD *pdw = (DWORD *)pop1;
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// INFINITY and NANs are all invalid operations, and the masked
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// behavior is to write 0x80000000
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PUT_LONG(pdw, 0x00000000);
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PUT_LONG((pdw+1), 0x80000000);
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}
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POPFLT;
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break;
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case TAG_EMPTY:
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if (!HandleStackEmpty(cpu, ST0)) {
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DWORD *pdw = (DWORD *)pop1;
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PUT_LONG(pdw, 0x00000000);
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PUT_LONG((pdw+1), 0x80000000);
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POPFLT;
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}
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break;
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}
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}
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FRAG1(FST32, FLOAT) // FST m32real
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{
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FpArithDataPreamble(cpu, pop1);
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if (cpu->FpST0->Tag == TAG_EMPTY) {
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if (HandleStackEmpty(cpu, cpu->FpST0)) {
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// unmasked exception - abort the instruction
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return;
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}
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}
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PutIntelR4(pop1, cpu->FpST0);
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}
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FRAG1(FSTP32, FLOAT) // FSTP m32real
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{
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FpArithDataPreamble(cpu, pop1);
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if (cpu->FpST0->Tag == TAG_EMPTY) {
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if (HandleStackEmpty(cpu, cpu->FpST0)) {
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// unmasked exception - abort the instruction
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return;
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}
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}
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PutIntelR4(pop1, cpu->FpST0);
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POPFLT;
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}
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FRAG1(FST64, DOUBLE) // FST m64real
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{
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FpArithDataPreamble(cpu, pop1);
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if (cpu->FpST0->Tag == TAG_EMPTY) {
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if (HandleStackEmpty(cpu, cpu->FpST0)) {
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// unmasked exception - abort the instruction
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return;
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}
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}
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PutIntelR8(pop1, cpu->FpST0);
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}
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FRAG1(FSTP64, DOUBLE) // FSTP m64real
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{
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FpArithDataPreamble(cpu, pop1);
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if (cpu->FpST0->Tag == TAG_EMPTY) {
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if (HandleStackEmpty(cpu, cpu->FpST0)) {
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// unmasked exception - abort the instruction
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return;
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}
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}
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PutIntelR8(pop1, cpu->FpST0);
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POPFLT;
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}
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FRAG1IMM(FST_STi, INT) // FST ST(i)
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{
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FpArithPreamble(cpu);
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CPUASSERT( (op1 & 0x07) == op1);
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if (cpu->FpST0->Tag == TAG_EMPTY) {
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if (HandleStackEmpty(cpu, cpu->FpST0)) {
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// unmasked exception - abort the instruction
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return;
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}
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}
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cpu->FpStack[ST(op1)] = *cpu->FpST0;
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}
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FRAG1IMM(FSTP_STi, INT) // FSTP ST(i)
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|
{
|
|
FpArithPreamble(cpu);
|
|
|
|
CPUASSERT( (op1 & 0x07) == op1);
|
|
|
|
if (cpu->FpST0->Tag == TAG_EMPTY) {
|
|
if (HandleStackEmpty(cpu, cpu->FpST0)) {
|
|
// unmasked exception - abort the instruction
|
|
return;
|
|
}
|
|
}
|
|
//CONSIDER: According to TimP, FSTP ST(0) is commonly used to pop the
|
|
// stack. It may be worthwhile to test if op1==0 and skip the
|
|
// assignment and go right to the POPFLT.
|
|
cpu->FpStack[ST(op1)] = *cpu->FpST0;
|
|
POPFLT;
|
|
}
|
|
|
|
FRAG0(OPT_FSTP_ST0) // FSTP ST(0)
|
|
{
|
|
FpArithPreamble(cpu);
|
|
|
|
if (cpu->FpST0->Tag == TAG_EMPTY) {
|
|
if (HandleStackEmpty(cpu, cpu->FpST0)) {
|
|
// unmasked exception - abort the instruction
|
|
return;
|
|
}
|
|
}
|
|
POPFLT;
|
|
}
|