455 lines
12 KiB
C
455 lines
12 KiB
C
/*****************************************************************************
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** **
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** COPYRIGHT (C) 2000, 2001 MKNET CORPORATION **
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** DEVELOPED FOR THE MK7100-BASED VFIR PCI CONTROLLER. **
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** **
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*****************************************************************************/
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/**********************************************************************
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Module Name:
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MK7COMM.H
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Comments:
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Include file for the MK7 driver.
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**********************************************************************/
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#ifndef _MK7COMM_H
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#define _MK7COMM_H
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//
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// IrDA definitions
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//
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#define MAX_EXTRA_SIR_BOFS 48
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#define SIR_BOF_SIZE 1
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#define SIR_EOF_SIZE 1
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#define ADDR_SIZE 1
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#define CONTROL_SIZE 1
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#define MAX_I_DATA_SIZE 2048
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#define MAX_I_DATA_SIZE_ESC (MAX_I_DATA_SIZE + 40)
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#define SIR_FCS_SIZE 2
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#define FASTIR_FCS_SIZE 4 // FIR/VFIR
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// History:
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// B2.1.0 - Was 2; set to 10 to align to 4DW.
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// B3.1.0-pre - back to 2
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//#define ALIGN_PAD 10 // buffer alignment
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#define ALIGN_PAD 2 // buffer alignment
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#define DEFAULT_TURNAROUND_usec 1000 // 1000 usec (1 msec)
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typedef struct {
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enum baudRates tableIndex;
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UINT bitsPerSec; // actual bits/sec
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UINT ndisCode; // bitmask
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} baudRateInfo;
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enum baudRates {
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// SIR
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BAUDRATE_2400 = 0,
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BAUDRATE_9600,
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BAUDRATE_19200,
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BAUDRATE_38400,
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BAUDRATE_57600,
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BAUDRATE_115200,
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// MIR
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BAUDRATE_576000,
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BAUDRATE_1152000,
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// FIR
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BAUDRATE_4M,
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// VFIR
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BAUDRATE_16M,
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NUM_BAUDRATES /* must be last */
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};
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#define DEFAULT_BAUD_RATE 9600
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#define MAX_SIR_SPEED 115200
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#define MIN_FIR_SPEED 4000000
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#define VFIR_SPEED 16000000
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//
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// End IrDA definitions
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//
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// TX/RX Ring settings
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#define DEF_RING_SIZE 64
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#define MIN_RING_SIZE 4
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#define MAX_RING_SIZE 64
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#define DEF_TXRING_SIZE 4
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#define DEF_RXRING_SIZE (DEF_TXRING_SIZE * 2)
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#define DEF_EBOFS 24
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#define MIN_EBOFS 0
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#define MAX_EBOFS 48
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#define HW_VER_1_EBOFS 5 // 4.1.0
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#define DEF_RCB_CNT DEF_RING_SIZE // !!RCB and TCB cnt must be the same!!
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#define DEF_TCB_CNT DEF_RING_SIZE // ALSO SEE MAX_ARRAY_xxx_PACKETS
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// Alloc twice as many receive buffers as receive ring size because these buffs
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// are pended to upper layer. Don't know when they may be returned.
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#define CalRpdSize(x) (x * 2) // Get RPD size given ring size
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#define NO_RCB_PENDING 0xFF
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#define RX_MODE 0
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#define TX_MODE 1
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// Set to hw for RX
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#define MK7_MAXIMUM_PACKET_SIZE (MAX_EXTRA_SIR_BOFS + \
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SIR_BOF_SIZE + \
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ADDR_SIZE + \
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CONTROL_SIZE + \
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MAX_I_DATA_SIZE + \
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SIR_FCS_SIZE + \
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SIR_EOF_SIZE)
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#define MK7_MAXIMUM_PACKET_SIZE_ESC (MAX_EXTRA_SIR_BOFS + \
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SIR_BOF_SIZE + \
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ADDR_SIZE + \
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CONTROL_SIZE + \
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MAX_I_DATA_SIZE_ESC + \
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SIR_FCS_SIZE + \
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SIR_EOF_SIZE)
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// For RX memory allocation
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//#define RPD_BUFFER_SIZE (MK7_MAXIMUM_PACKET_SIZE + ALIGN_PAD)
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#define RPD_BUFFER_SIZE (MK7_MAXIMUM_PACKET_SIZE_ESC + ALIGN_PAD)
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// For TX memory allocation
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#define COALESCE_BUFFER_SIZE (MK7_MAXIMUM_PACKET_SIZE_ESC + ALIGN_PAD)
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// Not used?
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#define MAX_TX_PACKETS 4
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#define MAX_RX_PACKETS 4
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#define SIR_BOF_TYPE UCHAR
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#define SIR_EXTRA_BOF_TYPE UCHAR
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#define SIR_EXTRA_BOF_SIZE sizeof(SIR_EXTRA_BOF_TYPE)
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#define SIR_EOF_TYPE UCHAR
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#define SIR_FCS_TYPE USHORT
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#define SIR_BOF 0xC0
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#define SIR_EXTRA_BOF 0xC0
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#define SIR_EOF 0xC1
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#define SIR_ESC 0x7D
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#define SIR_ESC_COMP 0x20
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// When FCS is computed on an IR packet with FCS appended, the result
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// should be this constant.
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#define GOOD_FCS ((USHORT) ~0xf0b8)
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//
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// Link list
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//
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typedef struct _MK7_LIST_ENTRY {
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LIST_ENTRY Link;
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} MK7_LIST_ENTRY, *PMK7_LIST_ENTRY;
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//
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// COALESCE -- Consolidate data for TX
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//
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typedef struct _COALESCE {
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MK7_LIST_ENTRY Link;
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PVOID OwningTcb;
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PUCHAR CoalesceBufferPtr;
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ULONG CoalesceBufferPhys;
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} COALESCE, *PCOALESCE;
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//
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// Receive Packet Descriptor (RPD)
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//
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// Each receive buffer has this control struct.
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//
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// (We use this mainly because there doesn't seem to be a simple way
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// to obtain a buff's phy addr from its virtual addr.)
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//
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typedef struct _RPD {
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MK7_LIST_ENTRY link;
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PNDIS_BUFFER ReceiveBuffer; // mapped buffer
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PNDIS_PACKET ReceivePacket; // mapped packet
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PUCHAR databuff; // virtual data buffer
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ULONG databuffphys; // physical data buffer
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USHORT status;
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UINT FrameLength;
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} RPD, *PRPD;
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//
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// Receive Control Block (RCB)
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//
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// Points to the corresponding RX Ring entry (RRD).
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//
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typedef struct _RCB {
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MK7_LIST_ENTRY link;
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PRRD rrd; // RX ring descriptor - RBD
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ULONG rrdphys; // Phy addr of RX ring descriptor
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PRPD rpd; // Receive Packet Descriptor
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} RCB, *PRCB;
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//
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// Transmit Control Block (TCB)
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//
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// Points to the corresponding TX Ring entry (TRD).
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//
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// NOTE: We have a link field. Chances are we don't need it
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// because the TCB (which is the software context for a TRD)
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// is indexed. For now we'll have a link field in case it's
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// needed.
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//
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typedef struct _TCB {
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MK7_LIST_ENTRY link;
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PTRD trd; // TX Ring entry - Transmit Ring Descriptor
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ULONG trdPhy;
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PUCHAR buff; // virtual data buffer
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ULONG buffphy; // physical data buffer
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// Stuff you get back from NdisQueryPacket()
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PNDIS_PACKET Packet;
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UINT PacketLength;
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UINT NumPhysDesc;
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UINT BufferCount;
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PNDIS_BUFFER FirstBuffer;
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BOOLEAN changeSpeedAfterThisTcb;
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} TCB, *PTCB;
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//
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// MK7_ADAPTER
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//
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typedef struct _MK7_ADAPTER
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{
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#if DBG
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UINT Debug;
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UINT DbgTest; // different debug/tests to run; 0=none
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UINT DbgTestDataCnt;
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#define DBG_QUEUE_LEN 4095 //0xfff
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UINT DbgIndex;
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UCHAR DbgQueue[DBG_QUEUE_LEN];
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UINT DbgSendCallCnt;
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UINT DbgSentCnt;
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UINT DbgSentPktsCnt;
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UINT LB; // Loopback debug/test
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UINT LBPktLevel; // pass thru 1 out of this many
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UINT LBPktCnt;
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NDIS_MINIPORT_TIMER MK7DbgTestIntTimer; // for interrupt testing
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#endif
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// Handle given by NDIS when the Adapter registered itself.
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NDIS_HANDLE MK7AdapterHandle;
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// 1st pkt queued for TX in deserialized miniport
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PNDIS_PACKET FirstTxQueue;
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PNDIS_PACKET LastTxQueue;
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UINT NumPacketsQueued;
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// Save the most recent interrupt events because the reg
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// is cleared once it's read.
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MK7REG recentInt;
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UINT CurrentSpeed; // bits/sec
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UINT MaxConnSpeed; // in 100bps increments
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UINT AllowedSpeedMask;
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baudRateInfo *linkSpeedInfo;
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// BOOLEAN haveIndicatedMediaBusy; // 1.0.0
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// Keep track of when to change speed.
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PNDIS_PACKET changeSpeedAfterThisPkt;
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UINT changeSpeedPending;
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//#define CHANGESPEED_ON_T 1 // change speed marked on TCB
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#define CHANGESPEED_ON_DONE 1 // change speed marked on Q
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#define CHANGESPEED_ON_Q 2 // change speed marked on Q
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// This info may come from the Registry
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UINT RegNumRcb; // # of RCB from the Registry
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UINT RegNumTcb; // # of TCB from the Registry
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UINT RegNumRpd; // RPD (RX Packet Descriptor) from Registry
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UINT RegSpeed; // IrDA speeds
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UINT RegExtraBOFs; // Extra BOFs based on 115.2kbps
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//******************************
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// RXs & TXs
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//******************************
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// UINT RrdTrdSize; // total RRD & TRD memory size
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PUCHAR pRrdTrd; // virtual address - aligned
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ULONG pRrdTrdPhysAligned; // physical address - aligned
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PUCHAR RxTxUnCached;
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NDIS_PHYSICAL_ADDRESS RxTxUnCachedPhys;
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UINT RxTxUnCachedSize;
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UINT RingSize; // same for both RRD & TRD
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//******************************
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// RXs
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//******************************
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UINT NumRcb; // what we actually use
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PRCB pRcb; // start of RCB
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PUCHAR pRrd; // start of RRD ( = pRrdTrd)
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ULONG pRrdPhys; // start of phy RRD ( = pRrdTrdPhysAligned)
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PRCB pRcbArray[MAX_RING_SIZE];
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UINT nextRxRcbIdx; // index of next RCB to process
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UINT rcbPendRpdIdx; // 1st RCB waiting for RPD
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UINT rcbPendRpdCnt; // keep cnt to help simplify code logic
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UINT rcbUsed; // RYM10-5 needed??
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UINT NumRpd; // actually allocated/used
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MK7_LIST_ENTRY FreeRpdList; // start of free list
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// 4.0.1 BOC
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UINT UsedRpdCount; // num of Rpds that not yet return to driver
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// 4.0.1 EOC.
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NDIS_HANDLE ReceivePacketPool;
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NDIS_HANDLE ReceiveBufferPool;
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PUCHAR RecvCached; // control structs
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UINT RecvCachedSize;
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PUCHAR RecvUnCached; // data buffs
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UINT RecvUnCachedSize;
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NDIS_PHYSICAL_ADDRESS RecvUnCachedPhys;
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// 4.1.0 HwVersion
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#define HW_VER_1 1
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#define HW_VER_2 2
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BOOLEAN HwVersion;
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//******************************
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// TXs
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//******************************
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UINT NumTcb; // what we actually use
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PTCB pTcb; // start of TCB
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PUCHAR pTrd; // start of TRD (512 bytes from pRrd)
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ULONG pTrdPhys;
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PTCB pTcbArray[MAX_RING_SIZE];
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UINT nextAvailTcbIdx; // index of next avail in the ring to use for TX
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UINT nextReturnTcbIdx; // index of next that'll be returned on completion
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UINT tcbUsed;
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BOOLEAN writePending; // RYM-2K-1TX
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PUCHAR XmitCached; // control structs
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UINT XmitCachedSize;
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PUCHAR XmitUnCached; // data buffs - coalesce buffs
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UINT XmitUnCachedSize;
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NDIS_PHYSICAL_ADDRESS XmitUnCachedPhys;
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ULONG MaxPhysicalMappings;
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// I/O port space (NOT memory mapped I/O)
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PUCHAR MappedIoBase;
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UINT MappedIoRange;
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// Adapter Information Variable (set via Registry entries)
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UINT BusNumber; //' BusNumber'
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USHORT BusDevice; // PCI Bus/Device #
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// timer structure for Async Resets
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NDIS_MINIPORT_TIMER MK7AsyncResetTimer; // 1.0.0
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NDIS_MINIPORT_TIMER MinTurnaroundTxTimer;
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NDIS_MINIPORT_INTERRUPT Interrupt; // interrupt object
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NDIS_INTERRUPT_MODE InterruptMode;
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NDIS_SPIN_LOCK Lock;
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UINT NumMapRegisters;
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UINT IOMode;
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UINT Wireless;
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UINT HangCheck; // 1.0.0
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//******************************
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// Hardware capabilities
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//******************************
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// This is a mask of NDIS_IRDA_SPEED_xxx bit values.
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UINT supportedSpeedsMask;
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// Time (in microseconds) that must transpire between a transmit
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//and the next receive.
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UINT turnAroundTime_usec;
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// Extra BOF (Beginning Of Frame) characters required at the
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// start of each received frame.
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UINT extraBOFsRequired;
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//******************************
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// OIDs
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//******************************
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UINT hardwareStatus; // OID_GEN_HARDWARE_STATUS
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BOOLEAN nowReceiving; // OID_IRDA_RECEIVING
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BOOLEAN mediaBusy; // OID_IRDA_MEDIA_BUSY
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UINT MKBaseSize; // Total port size in bytes
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UINT MKBaseIo; // Base I/O address
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UINT MKBusType; // 'BusType' (EISA or PCI)
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UINT MKInterrupt; // 'InterruptNumber'
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USHORT MKSlot; // 'Slot', PCI Slot Number
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// This variable should be initialized to false, and set to true
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// to prevent re-entrancy in our driver during reset spinlock and unlock
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// stuff related to checking our link status
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BOOLEAN ResetInProgress;
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NDIS_MEDIA_STATE LinkIsActive; // not used right now
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// save the status of the Memory Write Invalidate bit in the PCI command word
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BOOLEAN MWIEnable;
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//
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// Put statistics here
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//
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} MK7_ADAPTER, *PMK7_ADAPTER;
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//Given a MiniportContextHandle return the PMK7_ADAPTER it represents.
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#define PMK7_ADAPTER_FROM_CONTEXT_HANDLE(Handle) ((PMK7_ADAPTER)(Handle))
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//================================================
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// Global Variables shared by all driver instances
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//================================================
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// This constant is used for places where NdisAllocateMemory needs to be
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// called and the HighestAcceptableAddress does not matter.
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static const NDIS_PHYSICAL_ADDRESS HighestAcceptableMax =
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NDIS_PHYSICAL_ADDRESS_CONST(-1,-1);
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#endif // _MK7COMM.H
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