769 lines
20 KiB
C
769 lines
20 KiB
C
/*++
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Copyright (c) 1990-1995 Microsoft Corporation
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Module Name:
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s3.h
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Abstract:
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This module contains the definitions for the S3 miniport driver.
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Environment:
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Kernel mode
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Revision History:
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--*/
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#include "dderror.h"
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#include "devioctl.h"
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#include "miniport.h"
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#include "ntddvdeo.h"
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#include "video.h"
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//
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// We don't use the CRT 'min' function because that would drag in
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// unwanted CRT baggage.
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//
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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//
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// Size of the ROM we map in
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//
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#define MAX_ROM_SCAN 512
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//
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// Number of access ranges used by an S3.
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//
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#define NUM_S3_ACCESS_RANGES 36
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#define NUM_S3_ACCESS_RANGES_USED 22
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#define NUM_S3_PCI_ACCESS_RANGES 2
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#define S3_EXTENDED_RANGE_START 4
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//
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// Index of Frame buffer in access range array
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//
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#define A000_FRAME_BUF 1
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#define LINEAR_FRAME_BUF 36
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//
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// Constants defining 'New Memory-mapped I/O' window:
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//
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#define NEW_MMIO_WINDOW_SIZE 0x4000000 // Total window size -- 64 MB
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#define NEW_MMIO_IO_OFFSET 0x1000000 // Offset to start of little endian
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// control registers -- 16 MB
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#define NEW_MMIO_IO_LENGTH 0x0020000 // Length of control registers
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// -- 128 KB
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////////////////////////////////////////////////////////////////////////
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// Capabilities flags
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//
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// These are private flags passed to the S3 display driver. They're
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// put in the high word of the 'AttributeFlags' field of the
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// 'VIDEO_MODE_INFORMATION' structure (found in 'ntddvdeo.h') passed
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// to the display driver via an 'VIDEO_QUERY_AVAIL_MODES' or
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// 'VIDEO_QUERY_CURRENT_MODE' IOCTL.
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//
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// NOTE: These definitions must match those in the S3 display driver's
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// 'driver.h'!
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typedef enum {
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CAPS_STREAMS_CAPABLE = 0x00000040, // Has overlay streams processor
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CAPS_FORCE_DWORD_REREADS= 0x00000080, // Dword reads occasionally return
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// an incorrect result, so always
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// retry the reads
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CAPS_NEW_MMIO = 0x00000100, // Can use 'new memory-mapped
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// I/O' scheme introduced with
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// 868/968
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CAPS_POLYGON = 0x00000200, // Can do polygons in hardware
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CAPS_24BPP = 0x00000400, // Has 24bpp capability
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CAPS_BAD_24BPP = 0x00000800, // Has 868/968 early rev chip bugs
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// when at 24bpp
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CAPS_PACKED_EXPANDS = 0x00001000, // Can do 'new 32-bit transfers'
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CAPS_PIXEL_FORMATTER = 0x00002000, // Can do colour space conversions,
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// and one-dimensional hardware
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// stretches
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CAPS_BAD_DWORD_READS = 0x00004000, // Dword or word reads from the
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// frame buffer will occasionally
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// return an incorrect result,
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// so always do byte reads
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CAPS_NO_DIRECT_ACCESS = 0x00008000, // Frame buffer can't be directly
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// accessed by GDI or DCI --
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// because dword or word reads
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// would crash system, or Alpha
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// is running in sparse space
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CAPS_HW_PATTERNS = 0x00010000, // 8x8 hardware pattern support
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CAPS_MM_TRANSFER = 0x00020000, // Memory-mapped image transfers
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CAPS_MM_IO = 0x00040000, // Memory-mapped I/O
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CAPS_MM_32BIT_TRANSFER = 0x00080000, // Can do 32bit bus size transfers
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CAPS_16_ENTRY_FIFO = 0x00100000, // At least 16 entries in FIFO
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CAPS_SW_POINTER = 0x00200000, // No hardware pointer; use software
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// simulation
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CAPS_BT485_POINTER = 0x00400000, // Use Brooktree 485 pointer
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CAPS_TI025_POINTER = 0x00800000, // Use TI TVP3020/3025 pointer
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CAPS_SCALE_POINTER = 0x01000000, // Set if the S3 hardware pointer
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// x position has to be scaled by
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// two
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CAPS_SPARSE_SPACE = 0x02000000, // Frame buffer is mapped in sparse
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// space on the Alpha
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CAPS_NEW_BANK_CONTROL = 0x04000000, // Set if 801/805/928 style banking
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CAPS_NEWER_BANK_CONTROL = 0x08000000, // Set if 864/964 style banking
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CAPS_RE_REALIZE_PATTERN = 0x10000000, // Set if we have to work around the
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// 864/964 hardware pattern bug
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CAPS_SLOW_MONO_EXPANDS = 0x20000000, // Set if we have to slow down
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// monochrome expansions
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CAPS_MM_GLYPH_EXPAND = 0x40000000, // Use memory-mapped I/O glyph-
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// expand method of drawing text
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CAPS_WAIT_ON_PALETTE = 0x80000000, // Wait for vertical retrace before
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// setting the palette registers
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} CAPS;
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#define CAPS_DAC_POINTER (CAPS_BT485_POINTER | CAPS_TI025_POINTER)
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//
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// Supported board definitions.
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//
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typedef enum _S3_BOARDS {
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S3_GENERIC = 0,
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S3_ORCHID,
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S3_NUMBER_NINE,
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S3_DELL,
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S3_METHEUS,
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S3_DIAMOND,
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S3_HP,
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S3_IBM_PS2,
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MAX_S3_BOARD
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} S3_BOARDS;
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//
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// Chip type definitions -- for families of chips
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//
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// if you change this typedef it will change the size of the second element
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// (named Fixed) of the union in the typedef for S3_VIDEO_FREQUENCIES and
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// PS3_VIDEO_FREQUENCIES, look at that typedef for a caution about the effect
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// this will have on autoinitialization
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//
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typedef enum _S3_CHIPSETS {
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S3_911 = 0, // 911 and 924 boards
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S3_801, // 801 and 805 boards
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S3_928, // 928 boards
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S3_864, // 864, 964, 732, 764, and 765 boards
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S3_866, // 866, 868, and 968 boards
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MAX_S3_CHIPSET
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} S3_CHIPSETS;
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//
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// Chip subtypes -- for more differentiation within families
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//
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// Note that ordering is important.
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//
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typedef enum _S3_SUBTYPE {
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SUBTYPE_911 = 0, // 911 and 924
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SUBTYPE_80x, // 801 and 805
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SUBTYPE_928, // 928 and 928PCI
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SUBTYPE_805i, // 805i
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SUBTYPE_864, // 864
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SUBTYPE_964, // 964
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SUBTYPE_764, // Trio64
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SUBTYPE_732, // Trio32
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SUBTYPE_866, // 866
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SUBTYPE_868, // 868
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SUBTYPE_765, // Trio64 V+
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SUBTYPE_968, // 968
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MAX_S3_SUBTYPE
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} S3_SUBTYPE;
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//
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// DAC type definitions
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//
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typedef enum _S3_DACS {
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UNKNOWN_DAC = 0, // unknown DAC type
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BT_485, // Brooktree's Bt 485
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TI_3020, // TI's 3020 or 3025
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S3_SDAC, // S3's SDAC
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MAX_S3_DACS
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} S3_DACS;
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//
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// Hardware pointer capabilities flags
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//
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typedef enum _POINTER_CAPABILITY {
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POINTER_BUILT_IN = 0x01, // A pointer is built in to the hardware
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POINTER_WORKS_ONLY_AT_8BPP = 0x02, // If set, the hardware pointer works
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// only at 8bpp, and only for modes
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// 1024x768 or less
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POINTER_NEEDS_SCALING = 0x04, // x-coordinate must be scaled by 2 at
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// 32bpp
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} POINTER_CAPABILITY;
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//
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// Characteristics of each mode
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//
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typedef struct _S3_VIDEO_MODES {
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USHORT Int10ModeNumberContiguous;
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USHORT Int10ModeNumberNoncontiguous;
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ULONG ScreenStrideContiguous;
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VIDEO_MODE_INFORMATION ModeInformation;
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} S3_VIDEO_MODES, *PS3_VIDEO_MODES;
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//
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// Mode-set specific information.
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//
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typedef struct _S3_VIDEO_FREQUENCIES {
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ULONG BitsPerPel;
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ULONG ScreenWidth;
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ULONG ScreenFrequency;
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union {
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//
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// The compiler uses the first element of a union to determine where
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// it places the values given when the union is autoinitialized.
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//
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// If size of the Fixed element of this union is changed by adding
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// chips to the enum typedef for S3_CHIPSET then the Int10 element
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// needs to be padded with dummy fields to make autoinitialization
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// of the Fixed element work correctly.
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//
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// If values are removed from the S3_CHIPSET typedef then either the
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// Int10 element should shrunk by removing pads or the Fixed element
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// should be padded.
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//
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struct {
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ULONG_PTR FrequencyPrimarySet;
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ULONG_PTR FrequencyPrimaryMask;
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ULONG_PTR FrequencySecondarySet;
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ULONG_PTR FrequencySecondaryMask;
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ULONG_PTR SizePad0; // make struct sizes match
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} Int10;
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struct {
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union {
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//
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// This is done so that Clock overlays FrequencyPrimarySet
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// and CRTCTable[1] overlays FrequencyPrimaryMask, whether
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// we are compiling for 32 or 64 bits.
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//
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ULONG Clock;
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ULONG_PTR Pad;
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};
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PUSHORT CRTCTable[MAX_S3_CHIPSET];
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} Fixed;
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};
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PS3_VIDEO_MODES ModeEntry;
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ULONG ModeIndex;
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UCHAR ModeValid;
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} S3_VIDEO_FREQUENCIES, *PS3_VIDEO_FREQUENCIES;
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//
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// Streams parameter information.
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//
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typedef struct _K2TABLE {
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USHORT ScreenWidth;
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UCHAR BitsPerPel;
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UCHAR RefreshRate;
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UCHAR MemoryFlags;
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UCHAR MemorySpeed;
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ULONG Value;
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} K2TABLE;
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#define MEM_1EDO 0x0
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#define MEM_2EDO 0x2
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#define MEM_FAST 0x3
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#define MEM_TYPE_MASK 0x3
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#define MEM_1MB 0x0
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#define MEM_2MB 0x10
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#define MEM_SIZE_MASK 0x10
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//
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// Private IOCTL for communicating S3 streams parameters. These definitions
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// must match those in the display driver!
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//
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#define IOCTL_VIDEO_S3_QUERY_STREAMS_PARAMETERS \
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CTL_CODE(FILE_DEVICE_VIDEO, 0x800, METHOD_BUFFERED, FILE_ANY_ACCESS)
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typedef struct _VIDEO_QUERY_STREAMS_MODE {
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ULONG ScreenWidth;
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ULONG BitsPerPel;
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ULONG RefreshRate;
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} VIDEO_QUERY_STREAMS_MODE;
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typedef struct _VIDEO_QUERY_STREAMS_PARAMETERS {
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ULONG MinOverlayStretch;
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ULONG FifoValue;
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} VIDEO_QUERY_STREAMS_PARAMETERS;
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//
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// Register definitions used with VideoPortRead/Write functions
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//
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// It's a good idea to write your miniport to allow for easy register
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// re-mapping, but I wouldn't recommend that anyone use this particular
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// implementation because it's pretty dumb.
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//
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#define DAC_PIXEL_MASK_REG (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[2] + (0x03C6 - 0x03C0))
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#define BT485_ADDR_CMD_REG0 (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[2] + (0x03C6 - 0x03C0))
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#define TI025_INDEX_REG (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[2] + (0x03C6 - 0x03C0))
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#define TI025_DATA_REG (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[2] + (0x03C7 - 0x03C0))
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#define CRT_DATA_REG (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[3] + (0x03D5 - 0x03D4))
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#define SYSTEM_CONTROL_REG (PVOID)((PUCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[3] + (0x03DA - 0x03D4))
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#define CRT_ADDRESS_REG ((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[3]
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#define GP_STAT ((PHW_DEVICE_EXTENSION)HwDeviceExtension)->MappedAddress[12] // 0x9AE8
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#define DAC_ADDRESS_WRITE_PORT (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03C8 - 0x03C0))
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#define DAC_DATA_REG_PORT (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03C9 - 0x03C0))
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#define MISC_OUTPUT_REG_WRITE (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03C2 - 0x03C0))
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#define MISC_OUTPUT_REG_READ (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03CC - 0x03C0))
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#define SEQ_ADDRESS_REG (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03C4 - 0x03C0))
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#define SEQ_DATA_REG (PVOID)((PUCHAR)HwDeviceExtension->MappedAddress[2] + (0x03C5 - 0x03C0))
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#define IOCTL_PRIVATE_GET_FUNCTIONAL_UNIT \
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CTL_CODE(FILE_DEVICE_VIDEO, 0x180, METHOD_BUFFERED, FILE_ANY_ACCESS)
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typedef struct _FUNCTIONAL_UNIT_INFO {
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ULONG FunctionalUnitID;
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ULONG Reserved;
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} FUNCTIONAL_UNIT_INFO, *PFUNCTIONAL_UNIT_INFO;
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//
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// Define device extension structure. This is device dependent/private
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// information.
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//
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typedef struct _HW_DEVICE_EXTENSION {
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PHYSICAL_ADDRESS PhysicalFrameAddress;
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ULONG PhysicalFrameIoSpace;
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ULONG FrameLength;
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PHYSICAL_ADDRESS PhysicalRegisterAddress;
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ULONG RegisterLength;
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UCHAR RegisterSpace;
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PHYSICAL_ADDRESS PhysicalMmIoAddress;
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ULONG MmIoLength;
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ULONG ChildCount;
|
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UCHAR MmIoSpace;
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UCHAR FrequencySecondaryIndex;
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UCHAR BiosPresent;
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UCHAR CR5C;
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BOOLEAN bNeedReset;
|
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PUCHAR MmIoBase;
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PS3_VIDEO_MODES ActiveModeEntry;
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PS3_VIDEO_FREQUENCIES ActiveFrequencyEntry;
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PS3_VIDEO_FREQUENCIES Int10FrequencyTable;
|
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PS3_VIDEO_FREQUENCIES FixedFrequencyTable;
|
||
USHORT PCIDeviceID;
|
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ULONG FunctionalUnitID;
|
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ULONG BoardID;
|
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S3_CHIPSETS ChipID;
|
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S3_SUBTYPE SubTypeID;
|
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ULONG DacID;
|
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ULONG Capabilities;
|
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ULONG NumAvailableModes;
|
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ULONG NumTotalModes;
|
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ULONG AdapterMemorySize;
|
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PVOID MappedAddress[NUM_S3_ACCESS_RANGES];
|
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} HW_DEVICE_EXTENSION, *PHW_DEVICE_EXTENSION;
|
||
|
||
|
||
//
|
||
// SDAC M and N paramaters
|
||
//
|
||
|
||
typedef struct {
|
||
UCHAR m;
|
||
UCHAR n;
|
||
} SDAC_PLL_PARMS;
|
||
|
||
#define SDAC_TABLE_SIZE 16
|
||
|
||
|
||
//
|
||
// Highest valid DAC color register index.
|
||
//
|
||
|
||
#define VIDEO_MAX_COLOR_REGISTER 0xFF
|
||
|
||
//
|
||
// Data
|
||
//
|
||
|
||
//
|
||
// Global Physical Access Ranges.
|
||
// Logical access ranges must be stored in the HwDeviceExtension so different
|
||
// addresses can be used for different boards.
|
||
//
|
||
|
||
extern VIDEO_ACCESS_RANGE S3AccessRanges[];
|
||
|
||
//
|
||
// Memory Size array
|
||
//
|
||
|
||
extern ULONG gacjMemorySize[];
|
||
|
||
//
|
||
// nnlck.c clock generator table
|
||
//
|
||
|
||
extern long vclk_range[];
|
||
|
||
//
|
||
// Hard-coded modeset tables
|
||
//
|
||
|
||
extern USHORT s3_set_vga_mode[];
|
||
extern USHORT s3_set_vga_mode_no_bios[];
|
||
|
||
extern USHORT S3_911_Enhanced_Mode[];
|
||
extern USHORT S3_801_Enhanced_Mode[];
|
||
extern USHORT S3_928_Enhanced_Mode[];
|
||
extern USHORT S3_928_1280_Enhanced_Mode[];
|
||
|
||
//
|
||
// Externs for 864 PPC board
|
||
//
|
||
|
||
extern USHORT S3_864_Enhanced_Mode[];
|
||
extern USHORT S3_864_1280_Enhanced_Mode[];
|
||
extern SDAC_PLL_PARMS SdacTable[];
|
||
extern UCHAR MParameterTable[];
|
||
|
||
//
|
||
// Hard-coded modeset frequency tables
|
||
//
|
||
|
||
extern S3_VIDEO_FREQUENCIES GenericFixedFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES OrchidFixedFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES NumberNine928NewFixedFrequencyTable[];
|
||
|
||
//
|
||
// Int 10 frequency tables
|
||
//
|
||
|
||
extern S3_VIDEO_FREQUENCIES GenericFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Dell805FrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES NumberNine928NewFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES NumberNine928OldFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Metheus928FrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Generic64NewFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Generic64OldFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES NumberNine64FrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Diamond64FrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES HerculesFrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Hercules64FrequencyTable[];
|
||
extern S3_VIDEO_FREQUENCIES Hercules68FrequencyTable[];
|
||
//
|
||
// Mode Tables
|
||
//
|
||
|
||
extern S3_VIDEO_MODES S3Modes[];
|
||
extern ULONG NumS3VideoModes;
|
||
|
||
//
|
||
// Streams Tables
|
||
//
|
||
|
||
extern K2TABLE K2WidthRatio[];
|
||
extern K2TABLE K2FifoValue[];
|
||
|
||
//
|
||
// Function prototypes
|
||
//
|
||
|
||
//
|
||
// sdac.c
|
||
//
|
||
|
||
BOOLEAN
|
||
InitializeSDAC(
|
||
PHW_DEVICE_EXTENSION
|
||
);
|
||
|
||
BOOLEAN
|
||
FindSDAC(
|
||
PHW_DEVICE_EXTENSION
|
||
);
|
||
|
||
//
|
||
// nnclk.c
|
||
//
|
||
|
||
long calc_clock(long, int);
|
||
long gcd(long, long);
|
||
VOID set_clock(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
LONG clock_value);
|
||
|
||
//
|
||
// S3.c
|
||
//
|
||
|
||
ULONG
|
||
S3GetChildDescriptor(
|
||
PVOID HwDeviceExtension,
|
||
PVIDEO_CHILD_ENUM_INFO ChildEnumInfo,
|
||
PVIDEO_CHILD_TYPE pChildType,
|
||
PVOID pvChildDescriptor,
|
||
PULONG pHwId,
|
||
PULONG pUnused
|
||
);
|
||
|
||
VP_STATUS
|
||
GetDeviceDataCallback(
|
||
PVOID HwDeviceExtension,
|
||
PVOID Context,
|
||
VIDEO_DEVICE_DATA_TYPE DeviceDataType,
|
||
PVOID Identifier,
|
||
ULONG IdentifierLength,
|
||
PVOID ConfigurationData,
|
||
ULONG ConfigurationDataLength,
|
||
PVOID ComponentInformation,
|
||
ULONG ComponentInformationLength
|
||
);
|
||
|
||
VP_STATUS
|
||
S3FindAdapter(
|
||
PVOID HwDeviceExtension,
|
||
PVOID HwContext,
|
||
PWSTR ArgumentString,
|
||
PVIDEO_PORT_CONFIG_INFO ConfigInfo,
|
||
PUCHAR Again
|
||
);
|
||
|
||
BOOLEAN
|
||
S3Initialize(
|
||
PVOID HwDeviceExtension
|
||
);
|
||
|
||
BOOLEAN
|
||
S3ResetHw(
|
||
PVOID HwDeviceExtension,
|
||
ULONG Columns,
|
||
ULONG Rows
|
||
);
|
||
|
||
BOOLEAN
|
||
S3StartIO(
|
||
PVOID HwDeviceExtension,
|
||
PVIDEO_REQUEST_PACKET RequestPacket
|
||
);
|
||
|
||
VP_STATUS
|
||
S3SetColorLookup(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
PVIDEO_CLUT ClutBuffer,
|
||
ULONG ClutBufferSize
|
||
);
|
||
|
||
VOID
|
||
SetHWMode(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
PUSHORT pusCmdStream
|
||
);
|
||
|
||
VP_STATUS
|
||
S3RegistryCallback(
|
||
PVOID HwDeviceExtension,
|
||
PVOID Context,
|
||
PWSTR ValueName,
|
||
PVOID ValueData,
|
||
ULONG ValueLength
|
||
);
|
||
|
||
LONG
|
||
CompareRom(
|
||
PUCHAR Rom,
|
||
PUCHAR String
|
||
);
|
||
|
||
VOID
|
||
MapLinearControlSpace(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
BOOLEAN
|
||
S3IsaDetection(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
PULONG key
|
||
);
|
||
|
||
VOID
|
||
S3GetInfo(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
POINTER_CAPABILITY *PointerCapability,
|
||
VIDEO_ACCESS_RANGE accessRange[]
|
||
);
|
||
|
||
VOID
|
||
S3DetermineFrequencyTable(
|
||
PVOID HwDeviceExtension,
|
||
VIDEO_ACCESS_RANGE accessRange[],
|
||
INTERFACE_TYPE AdapterInterfaceType
|
||
);
|
||
|
||
VOID
|
||
S3DetermineDACType(
|
||
PVOID HwDeviceExtension,
|
||
POINTER_CAPABILITY *PointerCapability
|
||
);
|
||
|
||
VOID
|
||
S3ValidateModes(
|
||
PVOID HwDeviceExtension,
|
||
POINTER_CAPABILITY *PointerCapability
|
||
);
|
||
|
||
VOID
|
||
S3DetermineMemorySize(
|
||
PVOID HwDeviceExtension
|
||
);
|
||
|
||
VOID
|
||
S3RecordChipType(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
PULONG key
|
||
);
|
||
|
||
VOID
|
||
AlphaDetermineMemoryUsage(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
VIDEO_ACCESS_RANGE accessRange[]
|
||
);
|
||
|
||
|
||
ULONG
|
||
UnlockExtendedRegs(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
VOID
|
||
LockExtendedRegs(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
ULONG key
|
||
);
|
||
|
||
//
|
||
// Non-int 10 platform support
|
||
//
|
||
|
||
VOID
|
||
ZeroMemAndDac(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
VP_STATUS
|
||
Set_Oem_Clock(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
VP_STATUS
|
||
Wait_VSync(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
BOOLEAN
|
||
Bus_Test(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
BOOLEAN
|
||
Set864MemoryTiming(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
|
||
|
||
BOOLEAN
|
||
S3ConfigurePCI(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
PULONG NumPCIAccessRanges,
|
||
PVIDEO_ACCESS_RANGE PCIAccessRanges
|
||
);
|
||
|
||
VP_STATUS
|
||
QueryStreamsParameters(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
VIDEO_QUERY_STREAMS_MODE *pStreamsMode,
|
||
VIDEO_QUERY_STREAMS_PARAMETERS *pStreamsParameters
|
||
);
|
||
|
||
VOID
|
||
WorkAroundForMach(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension
|
||
);
|
||
|
||
|
||
//
|
||
// ddc.c
|
||
//
|
||
|
||
BOOLEAN
|
||
GetDdcInformation (
|
||
PHW_DEVICE_EXTENSION phwDeviceExtension,
|
||
PUCHAR QueryBuffer,
|
||
ULONG BufferSize
|
||
);
|
||
|
||
//
|
||
// power management
|
||
//
|
||
|
||
VP_STATUS
|
||
S3GetPowerState(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
ULONG HwDeviceId,
|
||
PVIDEO_POWER_MANAGEMENT VideoPowerManagement
|
||
);
|
||
|
||
VP_STATUS
|
||
S3SetPowerState(
|
||
PHW_DEVICE_EXTENSION HwDeviceExtension,
|
||
ULONG HwDeviceId,
|
||
PVIDEO_POWER_MANAGEMENT VideoPowerManagement
|
||
);
|
||
|
||
#define VESA_POWER_FUNCTION 0x4f10
|
||
#define VESA_POWER_ON 0x0000
|
||
#define VESA_POWER_STANDBY 0x0100
|
||
#define VESA_POWER_SUSPEND 0x0200
|
||
#define VESA_POWER_OFF 0x0400
|
||
#define VESA_GET_POWER_FUNC 0x0000
|
||
#define VESA_SET_POWER_FUNC 0x0001
|
||
#define VESA_STATUS_SUCCESS 0x004f
|