911 lines
23 KiB
C++
911 lines
23 KiB
C++
#include "common.h"
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#include "regs.h"
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#include "vdec.h"
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void VDecoder::init( const PDEVICE_INIT_INFO pDevInit )
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{
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ioBase = pDevInit->ioBase;
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}
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void VDecoder::VIDEO_RESET( void )
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{
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UCHAR val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_RESET );
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
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if ( ( val & 0x01 ) != 0x01 )
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break;
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// wait !!
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}
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
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if ( ( val & 0x10 ) != 0x10 )
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break;
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// wait !!
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}
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x13 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x14 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x13 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x34 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_RESET );
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
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if ( ( val & 0x01 ) != 0x01 )
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break;
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// wait !!
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}
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
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if ( ( val & 0x10 ) != 0x10 )
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break;
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// wait !!
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}
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}
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void VDecoder::VIDEO_MODE_DVD( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DEC_MODE );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xe0 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_INT_ID );
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VIDEO_PRSO_PS1();
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbf );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_USER_ID );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
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WRITE_PORT_UCHAR( ioBase + TC812_DSPL, 0x1f );
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VIDEO_VIDEOCD_OFF();
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}
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void VDecoder::VDVD_VIDEO_MODE_PS( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbd );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
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}
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void VDecoder::VIDEO_PRSO_PS1( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xbd );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
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}
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void VDecoder::VIDEO_PRSO_NON( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PRSO_ID );
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}
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void VDecoder::VIDEO_OUT_NTSC( void )
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{
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UCHAR val;
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// set video frame size mode to NTSC
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VFMODE );
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// set STD buffer size
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x40 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x11 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STD_SIZE );
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// set USER1/2 area size
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xf7 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_USER_SIZE );
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// set ext. memory mapping
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_MEM_MAP );
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
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if ( ( val & 0x10 ) != 0x10 )
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break;
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// wait !!! & timeout !!!
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}
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// set underflow/overflow size
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x10 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, 0x10 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_UOF_SIZE );
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// default RHOS
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_HOFFSET );
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// default RVOS
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
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}
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void VDecoder::VIDEO_ALL_INT_OFF( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DEM, 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_WEM, 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_UOM, 0xff );
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}
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void VDecoder::VIDEO_SCR_INT_ON( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xfd;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_SCR_INT_OFF( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x02;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_VERR_INT_ON( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xef;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0x00 );
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}
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void VDecoder::VIDEO_VERR_INT_OFF( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x10;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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WRITE_PORT_UCHAR( ioBase + TC812_ERM, 0x7f );
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}
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void VDecoder::VIDEO_UFLOW_INT_ON( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_UOM );
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val &= 0xfe;
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WRITE_PORT_UCHAR( ioBase + TC812_UOM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xbf;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_UFLOW_INT_OFF( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x40;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_UOM );
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val |= 0x01;
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WRITE_PORT_UCHAR( ioBase + TC812_UOM, val );
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}
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void VDecoder::VIDEO_DECODE_INT_ON( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_DEM );
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val &= 0xfb;
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WRITE_PORT_UCHAR( ioBase + TC812_DEM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xfb;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_DECODE_INT_OFF( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x04;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_DEM );
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val |= 0x04;
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WRITE_PORT_UCHAR( ioBase + TC812_DEM, val );
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}
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void VDecoder::VIDEO_USER_INT_ON( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_WEM );
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val &= 0xfe;
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WRITE_PORT_UCHAR( ioBase + TC812_WEM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xf7;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_USER_INT_OFF( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x08;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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val = READ_PORT_UCHAR( ioBase + TC812_WEM );
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val |= 0x01;
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WRITE_PORT_UCHAR( ioBase + TC812_WEM, val );
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}
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//--- 97.09.23 K.Chujo
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void VDecoder::VIDEO_UDSC_INT_ON( void )
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{
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// user data start code interrupt on
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val &= 0xFE;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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void VDecoder::VIDEO_UDSC_INT_OFF( void )
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{
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// user data start code interrput off
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_IRM );
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val |= 0x01;
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WRITE_PORT_UCHAR( ioBase + TC812_IRM, val );
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}
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//--- End.
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void VDecoder::VIDEO_ALL_IFLAG_CLEAR( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_UOF );
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val = READ_PORT_UCHAR( ioBase + TC812_ERF );
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val = READ_PORT_UCHAR( ioBase + TC812_WEF );
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val = READ_PORT_UCHAR( ioBase + TC812_DEF );
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val = READ_PORT_UCHAR( ioBase + TC812_IRF );
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}
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void VDecoder::VIDEO_SET_STCA( ULONG stca )
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{
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UCHAR val;
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val = (UCHAR)( stca & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, val );
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val = (UCHAR)( ( stca >> 8 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, val );
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val = (UCHAR)( ( stca >> 16 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA5, val );
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val = (UCHAR)( ( stca >> 24 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA6, val );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA7, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCA );
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}
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void VDecoder::VIDEO_SET_STCS( ULONG stcs )
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{
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UCHAR val;
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val = (UCHAR)( stcs & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA3, val );
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val = (UCHAR)( ( stcs >> 8 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA4, val );
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val = (UCHAR)( ( stcs >> 16 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA5, val );
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val = (UCHAR)( ( stcs >> 24 ) & 0xff );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA6, val );
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WRITE_PORT_UCHAR( ioBase + TC812_DATA7, 0x00 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCS );
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}
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ULONG VDecoder::VIDEO_GET_STCA( void )
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{
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ULONG rval = 0, val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCA );
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rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
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val <<= 8;
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rval += val;
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
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val <<= 16;
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rval += val;
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
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val <<= 24;
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rval += val;
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return rval;
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}
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ULONG VDecoder::VIDEO_GET_STCS( void )
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{
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ULONG rval = 0, val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCS );
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rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
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val <<= 8;
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rval += val;
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
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val <<= 16;
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rval += val;
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
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val <<= 24;
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rval += val;
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return rval;
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}
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void VDecoder::VIDEO_SYSTEM_START( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x07 ); // video buffer flow control
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SYS );
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}
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void VDecoder::VIDEO_SYSTEM_STOP( void )
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{
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UCHAR val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_SYS );
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val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
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val &= 0xfe;
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, val );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SYS );
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}
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ULONG VDecoder::VIDEO_GET_STD_CODE( void )
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{
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ULONG rval, val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STD_CODE );
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rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
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val <<= 8;
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rval += val;
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val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
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val <<= 16;
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rval += val;
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rval <<= 2;
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return rval;
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}
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BOOL VDecoder::VIDEO_GET_DECODE_STATE( void )
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{
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UCHAR val;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DECODE );
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val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
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if ( ( val & 0x01 ) == 0x01 )
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return TRUE; // Decode
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else
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return FALSE; // Non Decode
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}
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void VDecoder::VIDEO_DECODE_START( void )
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{
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UCHAR val;
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for ( ; ; )
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{
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val = READ_PORT_UCHAR( ioBase + TC812_STT2 );
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if ( ( val & 0x01 ) != 0x01 )
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break;
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}
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x05 );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DECODE );
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}
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NTSTATUS VDecoder::VIDEO_DECODE_STOP( void )
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{
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UCHAR val;
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val = READ_PORT_UCHAR( ioBase + TC812_STT2 );
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if ( ( val & 0x01 ) == 0x01 )
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return (NTSTATUS)-1;
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DECODE );
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val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
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val &= 0x0e;
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WRITE_PORT_UCHAR( ioBase + TC812_DATA1, val );
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DECODE );
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return 0;
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}
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void VDecoder::VIDEO_STD_CLEAR( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_STD_CLEAR );
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}
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void VDecoder::VIDEO_USER_CLEAR( void )
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{
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WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_USER1_CLEAR );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_USER2_CLEAR );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PVSIN_ON( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PVSIN );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PVSIN_OFF( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PVSIN );
|
|
}
|
|
|
|
void VDecoder::VIDEO_SET_DTS( ULONG dts )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)( dts & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( ( dts >> 8 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( dts >> 16 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( dts >> 24 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA5, 0 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DTS );
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_GET_DTS( void )
|
|
{
|
|
ULONG rval, val;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_DTS );
|
|
rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
val <<= 8;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
val <<= 16;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
val <<= 24;
|
|
rval += val;
|
|
|
|
return rval;
|
|
}
|
|
|
|
void VDecoder::VIDEO_SET_PTS( ULONG pts )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)( pts & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( ( pts >> 8 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( pts >> 16 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( pts >> 24 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA5, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_PTS );
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_GET_PTS( void )
|
|
{
|
|
ULONG rval, val;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_PTS );
|
|
rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
val <<= 8;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
val <<= 16;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
val <<= 24;
|
|
rval += val;
|
|
|
|
return rval;
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_GET_SCR( void )
|
|
{
|
|
ULONG rval, val;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_SCR );
|
|
rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
val <<= 8;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
|
|
val <<= 16;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
|
|
val <<= 24;
|
|
rval += val;
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCR_END );
|
|
|
|
return rval;
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_GET_STCC( void )
|
|
{
|
|
ULONG rval, val;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_STCC );
|
|
rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
val <<= 8;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA5 );
|
|
val <<= 16;
|
|
rval += val;
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA6 );
|
|
val <<= 24;
|
|
rval += val;
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_STCR_END );
|
|
|
|
return rval;
|
|
}
|
|
|
|
void VDecoder::VIDEO_SEEMLESS_ON( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SEEMLES );
|
|
}
|
|
|
|
void VDecoder::VIDEO_SEEMLESS_OFF( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_SEEMLES );
|
|
}
|
|
|
|
void VDecoder::VIDEO_VIDEOCD_OFF( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VCD );
|
|
}
|
|
|
|
NTSTATUS VDecoder::VIDEO_GET_UDATA( PUCHAR pudata )
|
|
{
|
|
if ( ( READ_PORT_UCHAR( ioBase + TC812_STT1 ) & 0x80 ) != 0x80 )
|
|
return (NTSTATUS)-1; // no user data
|
|
|
|
*pudata = READ_PORT_UCHAR( ioBase + TC812_UDAT );
|
|
return 0;
|
|
}
|
|
|
|
void VDecoder::VIDEO_PLAY_NORMAL( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_NORMAL );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PLAY_FAST( ULONG flag )
|
|
{
|
|
if ( flag == FAST_ONLYI )
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
else if ( flag == FAST_IANDP )
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x07 );
|
|
else
|
|
return;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_FAST );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PLAY_SLOW( ULONG speed )
|
|
{
|
|
if ( speed == 0 || speed > 31 )
|
|
return;
|
|
|
|
speed <<= 2;
|
|
speed |= 3;
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, (UCHAR)speed );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_SLOW );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PLAY_FREEZE( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_FREEZE );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PLAY_STILL( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_TRICK_STILL );
|
|
}
|
|
|
|
void VDecoder::VIDEO_LBOX_ON( void )
|
|
{
|
|
UCHAR val;
|
|
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DSPL );
|
|
val &= 0xf7;
|
|
val |= 0x10;
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DSPL, val );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x3e );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
|
|
}
|
|
|
|
void VDecoder::VIDEO_LBOX_OFF( void )
|
|
{
|
|
UCHAR val;
|
|
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DSPL );
|
|
val |= 0x18;
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DSPL, val );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x04 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_VOFFSET );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PANSCAN_ON( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
|
|
}
|
|
|
|
void VDecoder::VIDEO_PANSCAN_OFF( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_DMODE );
|
|
}
|
|
|
|
void VDecoder::VIDEO_UFLOW_CURB_ON( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x10 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_UF_CURB );
|
|
}
|
|
|
|
void VDecoder::VIDEO_UFLOW_CURB_OFF( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_UF_CURB );
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_USER_DWORD( ULONG offset )
|
|
{
|
|
ULONG rval, val;
|
|
|
|
for ( ; ; )
|
|
{
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_STT2 );
|
|
if ( ( val & 0x01 ) != 0x01 )
|
|
break;
|
|
}
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, (UCHAR)( offset & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA3, (UCHAR)( ( offset >> 8 ) & 0xff ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA4, (UCHAR)( ( offset >> 16 ) & 0x07 ) );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_SET_WRITE_MEM );
|
|
|
|
for ( ; ; )
|
|
{
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_STT2 );
|
|
if ( ( val & 0x01 ) != 0x01 )
|
|
break;
|
|
}
|
|
|
|
rval = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
rval <<= 8;
|
|
rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
rval <<= 8;
|
|
rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
rval <<= 8;
|
|
rval += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
rval <<= 8;
|
|
|
|
return rval;
|
|
}
|
|
|
|
void VDecoder::VIDEO_UDAT_CLEAR( void )
|
|
{
|
|
UCHAR val;
|
|
|
|
for ( ; ; )
|
|
{
|
|
val = READ_PORT_UCHAR( ioBase + TC812_STT1 );
|
|
if ( ( val & 0x08 ) != 0x08 )
|
|
break;
|
|
val = READ_PORT_UCHAR( ioBase + TC812_UDAT );
|
|
}
|
|
}
|
|
|
|
ULONG VDecoder::VIDEO_GET_TRICK_MODE( void )
|
|
{
|
|
ULONG val;
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, V_GET_TRICK );
|
|
val = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
val &= 0x07;
|
|
|
|
return val;
|
|
}
|
|
|
|
void VDecoder::VIDEO_BUG_PRE_SEARCH_01( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x25 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x11 );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x10 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x02 );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
|
|
}
|
|
|
|
void VDecoder::VIDEO_BUG_PRE_SEARCH_02( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x02 );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x42 );
|
|
}
|
|
|
|
void VDecoder::VIDEO_BUG_PRE_SEARCH_03( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xc1 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xb8 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
|
|
}
|
|
|
|
void VDecoder::VIDEO_BUG_PRE_SEARCH_04( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x1b );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
|
|
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x03 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x8f );
|
|
}
|
|
|
|
void VDecoder::VIDEO_BUG_PRE_SEARCH_05( void )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
|
|
}
|
|
|
|
|
|
// NEEDED TO BE DEBUGGED !!!
|
|
void VDecoder::VIDEO_BUG_SLIDE_01( void )
|
|
{
|
|
UCHAR val;
|
|
ULONG ul;
|
|
|
|
// check whether vdec hanged-up
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x7d );
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
// if( UF_FLAG == TRUE ) {
|
|
// DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER STATUS = %x\r\n", val ));
|
|
// }
|
|
if ( ( val & 0x30 ) == 0x00 )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x72 );
|
|
ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
ul <<= 8;
|
|
ul += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
// if( UF_FLAG == TRUE ) {
|
|
// DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER PC(1) = %x\r\n", ul ));
|
|
// }
|
|
if ( ul == 0x1a5 )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0xb8 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
|
|
DebugPrint(( DebugLevelTrace, "TOSDVD: <<RE-ORDER(1)>>\r\n" ));
|
|
// uf
|
|
} else {
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0xb0 );
|
|
ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA4 );
|
|
ul <<= 8;
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DATA3 );
|
|
ul += (ULONG)val;
|
|
ul <<= 8;
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
ul += (ULONG)val;
|
|
ul <<= 8;
|
|
val = READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
ul += (ULONG)val;
|
|
|
|
// if( UF_FLAG == TRUE ) {
|
|
// DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER DTS = %x\r\n", ul ));
|
|
// }
|
|
if ( ( VIDEO_GET_STCA() - 2 ) > ul )
|
|
{
|
|
ul = VIDEO_GET_STD_CODE();
|
|
// if( UF_FLAG == TRUE ) {
|
|
// DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER STD = %x\r\n", ul ));
|
|
// }
|
|
if ( ul >= 0x200 )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x72 );
|
|
ul = (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA2 );
|
|
ul <<= 8;
|
|
ul += (ULONG)READ_PORT_UCHAR( ioBase + TC812_DATA1 );
|
|
// if( UF_FLAG == TRUE ) {
|
|
// DebugPrint(( DebugLevelTrace, "TOSDVD: DECODER PC(2) = %x\r\n", ul ));
|
|
// }
|
|
if ( ul >= 0x404 && ul <= 0x409 )
|
|
{
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x18 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x04 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x52 );
|
|
DebugPrint(( DebugLevelTrace, "TOSDVD: <<RE-ORDER(2)>>\r\n" ));
|
|
// uf
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA1, 0x00 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_DATA2, 0x01 );
|
|
WRITE_PORT_UCHAR( ioBase + TC812_CMDR1, 0x5d );
|
|
}
|
|
//
|
|
//void VDecoder::VIDEO_DEBUG_SET_UF( void )
|
|
//{
|
|
// UF_FLAG = TRUE;
|
|
//}
|
|
//
|
|
//void VDecoder::VIDEO_DEBUG_CLR_UF( void )
|
|
//{
|
|
// UF_FLAG = FALSE;
|
|
//}
|