499 lines
14 KiB
C++
499 lines
14 KiB
C++
///////////////////////////////////////////////////////////////////////////////
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// Copyright (C) Microsoft Corporation, 2000.
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//
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// pshader.h
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//
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// Direct3D Reference Device - Pixel Shader
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//
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///////////////////////////////////////////////////////////////////////////////
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#ifndef _PSHADER_H
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#define _PSHADER_H
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class RefRast;
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//---------------------------------------------------------------------
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// Constants
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//---------------------------------------------------------------------
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const DWORD RD_MAX_TEXTURE_STAGES = D3DHAL_TSS_MAXSTAGES;
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const DWORD RD_MAX_COISSUED_INSTRUCTIONS = 2;
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// version 1.1 register bank sizes
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const DWORD RDPS_MAX_NUMTEMPREG_V255 = 6;
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const DWORD RDPS_MAX_NUMINPUTREG_V255 = 8;
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const DWORD RDPS_MAX_NUMCONSTREG_V255 = 16;
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const DWORD RDPS_MAX_NUMTEXTUREREG_V255 = 8;
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// version-independent consts for sizing arrays
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const DWORD RDPS_MAX_NUMTEMPREG = RDPS_MAX_NUMTEMPREG_V255;
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const DWORD RDPS_MAX_NUMINPUTREG = RDPS_MAX_NUMINPUTREG_V255;
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const DWORD RDPS_MAX_NUMCONSTREG = RDPS_MAX_NUMCONSTREG_V255;
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const DWORD RDPS_MAX_NUMTEXTUREREG = RDPS_MAX_NUMTEXTUREREG_V255;
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// sizes for internal register arrays
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const DWORD RDPS_MAX_NUMQUEUEDWRITEREG = RD_MAX_COISSUED_INSTRUCTIONS - 1;
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const DWORD RDPS_MAX_NUMPOSTMODSRCREG = 3;
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const DWORD RDPS_MAX_NUMSCRATCHREG = 5;
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// refdev-specific pixel shader 'instructions' to match legacy pixel processing
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#define D3DSIO_TEXBEM_LEGACY ((D3DSHADER_INSTRUCTION_OPCODE_TYPE)0xC001)
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#define D3DSIO_TEXBEML_LEGACY ((D3DSHADER_INSTRUCTION_OPCODE_TYPE)0xC002)
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//---------------------------------------------------------------------
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//
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// pshader.cpp
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// Structure that describes each D3DSIO_ pixelshader instruction
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typedef struct _PixelShaderInstruction
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{
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char Text[D3DDM_MAX_PSINSTSTRING];
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DWORD* pComment;
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DWORD CommentSize;
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// instruction tokens
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DWORD Opcode;
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DWORD DstParam;
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DWORD SrcParam[3];
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DWORD SrcParamCount;
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UINT uiTSSNum;
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BOOL bTexOp;
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BOOL bQueueWrite;
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BOOL bFlushQueue; // flush write - TRUE for all singly issued instructions,
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// and for the last in any sequence of co-issued instructions.
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} PixelShaderInstruction;
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// Enum listing refrast's pixelshader register files
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typedef enum _RDPS_REGISTER_TYPE
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{
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RDPSREG_UNINITIALIZED_TYPE = 0,
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RDPSREG_INPUT,
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RDPSREG_TEMP,
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RDPSREG_CONST,
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RDPSREG_TEXTURE,
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RDPSREG_POSTMODSRC,
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RDPSREG_SCRATCH,
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RDPSREG_QUEUEDWRITE,
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RDPSREG_ZERO,
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RDPSREG_ONE,
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RDPSREG_TWO,
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} RDPS_REGISTER_TYPE;
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// Type that is a pointer to an array of RGBA vectors.
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typedef FLOAT (*PRGBAVEC)[4];
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// Type used to refer to a register.
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class RDPSRegister
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{
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private:
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RDPS_REGISTER_TYPE m_RegType;
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UINT m_RegNum;
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PRGBAVEC m_pReg; // pointer to [4][4] array -> 4 pixel RGBA
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// this is computed when m_RegType and m_RegNum are set
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public:
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RDPSRegister() {m_pReg = NULL; m_RegType = RDPSREG_UNINITIALIZED_TYPE; m_RegNum = (UINT)-1;}
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void Set(RDPS_REGISTER_TYPE RegType, UINT RegNum, RefRast* pRast);
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inline RDPS_REGISTER_TYPE GetRegType() {return m_RegType;}
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inline UINT GetRegNum() {return m_RegNum;}
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inline PRGBAVEC GetRegPtr() {return m_pReg;}
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};
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// "RISC" opcodes which are used to implement D3DSIO_ API pixelshader instructions
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typedef enum _RDPS_INSTRUCTION_OPCODE_TYPE
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{
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RDPSINST_EVAL,
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RDPSINST_SAMPLE,
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RDPSINST_KILL,
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RDPSINST_BEM,
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RDPSINST_LUMINANCE,
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RDPSINST_DEPTH,
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RDPSINST_SRCMOD,
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RDPSINST_SWIZZLE,
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RDPSINST_DSTMOD,
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RDPSINST_MOV,
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RDPSINST_RCP,
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RDPSINST_FRC,
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RDPSINST_ADD,
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RDPSINST_SUB,
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RDPSINST_MUL,
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RDPSINST_DP3,
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RDPSINST_DP4,
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RDPSINST_MAD,
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RDPSINST_LRP,
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RDPSINST_CND,
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RDPSINST_CMP,
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RDPSINST_END,
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RDPSINST_TEXCOVERAGE,
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RDPSINST_QUADLOOPBEGIN,
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RDPSINST_QUADLOOPEND,
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RDPSINST_QUEUEWRITE,
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RDPSINST_FLUSHQUEUE,
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RDPSINST_NEXTD3DPSINST,
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} RDPS_INSTRUCTION_OPCODE_TYPE;
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// Structures defining the parameters for all the "RISC" opcodes listed above.
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// RDPSINST_BASE_PARAMS is the root from which the rest are inherited.
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typedef struct _RDPSINST_BASE_PARAMS
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{
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public:
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union{
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RDPS_INSTRUCTION_OPCODE_TYPE Inst;
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// Force structure alignment to pointer-size multiples.
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// IA64 (at least) needs this for structure packing to work.
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void* AlignmentDummy;
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};
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} RDPSINST_BASE_PARAMS;
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typedef struct _RDPSINST_EVAL_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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UINT uiCoordSet;
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BOOL bIgnoreD3DTTFF_PROJECTED;
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BOOL bClamp;
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} RDPSINST_EVAL_PARAMS;
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typedef struct _RDPSINST_SAMPLE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister CoordReg;
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UINT uiStage;
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} RDPSINST_SAMPLE_PARAMS;
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typedef struct _RDPSINST_BEM_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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UINT uiStage;
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} RDPSINST_BEM_PARAMS;
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typedef struct _RDPSINST_LUMINANCE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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UINT uiStage;
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} RDPSINST_LUMINANCE_PARAMS;
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typedef struct _RDPSINST_DEPTH_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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} RDPSINST_DEPTH_PARAMS;
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typedef struct _RDPSINST_KILL_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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} RDPSINST_KILL_PARAMS;
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typedef struct _RDPSINST_SRCMOD_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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BYTE WriteMask;
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BOOL bBias;
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BOOL bTimes2;
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BOOL bComplement;
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FLOAT fRangeMin;
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FLOAT fRangeMax;
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} RDPSINST_SRCMOD_PARAMS;
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typedef struct _RDPSINST_SWIZZLE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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BYTE WriteMask;
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BYTE Swizzle;
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} RDPSINST_SWIZZLE_PARAMS;
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typedef struct _RDPSINST_DSTMOD_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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BYTE WriteMask;
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FLOAT fScale;
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FLOAT fRangeMin;
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FLOAT fRangeMax;
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} RDPSINST_DSTMOD_PARAMS;
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typedef struct _RDPSINST_MOV_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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BOOL bSrcReg0_Negate;
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BYTE WriteMask;
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} RDPSINST_MOV_PARAMS;
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typedef struct _RDPSINST_FRC_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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BOOL bSrcReg0_Negate;
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BYTE WriteMask;
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} RDPSINST_FRC_PARAMS;
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typedef struct _RDPSINST_RCP_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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BOOL bSrcReg0_Negate;
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BYTE WriteMask;
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} RDPSINST_RCP_PARAMS;
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typedef struct _RDPSINST_ADD_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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} RDPSINST_ADD_PARAMS;
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typedef struct _RDPSINST_SUB_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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} RDPSINST_SUB_PARAMS;
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typedef struct _RDPSINST_MUL_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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} RDPSINST_MUL_PARAMS;
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typedef struct _RDPSINST_DP3_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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} RDPSINST_DP3_PARAMS;
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typedef struct _RDPSINST_DP4_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BYTE WriteMask;
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} RDPSINST_DP4_PARAMS;
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typedef struct _RDPSINST_MAD_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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RDPSRegister SrcReg2;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BOOL bSrcReg2_Negate;
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BYTE WriteMask;
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} RDPSINST_MAD_PARAMS;
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typedef struct _RDPSINST_LRP_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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RDPSRegister SrcReg2;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BOOL bSrcReg2_Negate;
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BYTE WriteMask;
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} RDPSINST_LRP_PARAMS;
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typedef struct _RDPSINST_CND_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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RDPSRegister SrcReg2;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BOOL bSrcReg2_Negate;
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BYTE WriteMask;
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} RDPSINST_CND_PARAMS;
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typedef struct _RDPSINST_CMP_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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RDPSRegister SrcReg0;
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RDPSRegister SrcReg1;
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RDPSRegister SrcReg2;
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BOOL bSrcReg0_Negate;
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BOOL bSrcReg1_Negate;
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BOOL bSrcReg2_Negate;
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BYTE WriteMask;
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} RDPSINST_CMP_PARAMS;
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typedef struct _RDPSINST_END_PARAMS : public RDPSINST_BASE_PARAMS
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{
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} RDPSINST_END_PARAMS;
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typedef struct _RDPSINST_TEXCOVERAGE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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UINT uiStage;
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FLOAT (*pGradients)[2];
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FLOAT* pDUDX_0;
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FLOAT* pDUDX_1;
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FLOAT* pDUDY_0;
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FLOAT* pDUDY_1;
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FLOAT* pDVDX_0;
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FLOAT* pDVDX_1;
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FLOAT* pDVDY_0;
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FLOAT* pDVDY_1;
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FLOAT* pDWDX_0;
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FLOAT* pDWDX_1;
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FLOAT* pDWDY_0;
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FLOAT* pDWDY_1;
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} RDPSINST_TEXCOVERAGE_PARAMS;
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typedef struct _RDPSINST_QUADLOOPBEGIN_PARAMS : public RDPSINST_BASE_PARAMS
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{
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} RDPSINST_QUADLOOPBEGIN_PARAMS;
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typedef struct _RDPSINST_QUADLOOPEND_PARAMS : public RDPSINST_BASE_PARAMS
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{
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size_t JumpBackByOffset;
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} RDPSINST_QUADLOOPEND_PARAMS;
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typedef struct _RDPSINST_QUEUEWRITE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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RDPSRegister DstReg;
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BYTE WriteMask;
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} RDPSINST_QUEUEWRITE_PARAMS;
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typedef struct _RDPSINST_FLUSHQUEUE_PARAMS : public RDPSINST_BASE_PARAMS
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{
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} RDPSINST_FLUSHQUEUE_PARAMS;
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typedef struct _RDPSINST_NEXTD3DPSINST_PARAMS : public RDPSINST_BASE_PARAMS
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{
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PixelShaderInstruction* pInst;
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} RDPSINST_NEXTD3DPSINST_PARAMS;
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// End of "RISC" instruction parameter definitions
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typedef struct _ConstDef
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{
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float f[4];
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UINT RegNum;
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} ConstDef;
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typedef struct _PSQueuedWriteDst
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{
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RDPSRegister DstReg;
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BYTE WriteMask;
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} PSQueuedWriteDst;
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#define RDPS_COMPONENTMASK_SHIFT 16
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#define RDPS_COMPONENTMASK_0 (D3DSP_WRITEMASK_0 >> RDPS_COMPONENTMASK_SHIFT)
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#define RDPS_COMPONENTMASK_1 (D3DSP_WRITEMASK_1 >> RDPS_COMPONENTMASK_SHIFT)
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#define RDPS_COMPONENTMASK_2 (D3DSP_WRITEMASK_2 >> RDPS_COMPONENTMASK_SHIFT)
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#define RDPS_COMPONENTMASK_3 (D3DSP_WRITEMASK_3 >> RDPS_COMPONENTMASK_SHIFT)
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#define RDPS_COMPONENTMASK_ALL (D3DSP_WRITEMASK_ALL >> RDPS_COMPONENTMASK_SHIFT)
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#define RDPS_NOSWIZZLE (D3DSP_NOSWIZZLE >> D3DSP_SWIZZLE_SHIFT)
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#define RDPS_REPLICATERED (D3DSP_REPLICATERED >> D3DSP_SWIZZLE_SHIFT)
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#define RDPS_REPLICATEGREEN (D3DSP_REPLICATEGREEN >> D3DSP_SWIZZLE_SHIFT)
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#define RDPS_REPLICATEBLUE (D3DSP_REPLICATEBLUE >> D3DSP_SWIZZLE_SHIFT)
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#define RDPS_REPLICATEALPHA (D3DSP_REPLICATEALPHA >> D3DSP_SWIZZLE_SHIFT)
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#define RDPS_SELECT_R 0
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#define RDPS_SELECT_G 1
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#define RDPS_SELECT_B 2
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#define RDPS_SELECT_A 3
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// creates BYTE swizzle description: bits xxyyzzww made of RSPS_SELECT_* for each component
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#define _Swizzle(x,y,z,w) ((x)|(y<<2)|(z<<4)|(w<<6))
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//-----------------------------------------------------------------------------
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//
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// RDPShader: Pixel Shader Class
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//
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//-----------------------------------------------------------------------------
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class RDPShader
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{
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public:
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RDPShader();
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~RDPShader();
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HRESULT Initialize(RefDev* pRD, DWORD* pCode, DWORD ByteCodeSize, D3DCAPS8* pCaps);
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RefDev* m_pRD;
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DWORD* m_pCode; // function tokens passed to API
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UINT m_CodeSize; // number of DWORDs
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// info extracted by parsing shader
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UINT m_cActiveTextureStages; // number of texture stages used by this shader
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DWORD m_ReferencedTexCoordMask; // Which texture coordinate sets are referenced
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UINT m_cInst; // number of shader instructions
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PixelShaderInstruction* m_pInst; // processed instructions
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GArrayT<BYTE> m_RDPSInstBuffer; // buffer containint refrast "RISC" translated version of shader
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UINT m_cConstDefs; // number of D3DSIO_DEF instructions
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ConstDef* m_pConstDefs; // array of constant definitions
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};
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typedef RDPShader *PRDPSHADER;
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//-----------------------------------------------------------------------------
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// Struct holding the shader ptr
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//-----------------------------------------------------------------------------
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struct RDPShaderHandle
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{
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RDPShaderHandle()
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{
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m_pShader = NULL;
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#if DBG
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m_tag = 0;
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#endif
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}
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RDPShader* m_pShader;
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#if DBG
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// Non zero means that it has been allocated
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DWORD m_tag;
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#endif
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};
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// psutil.cpp
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int
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PixelShaderInstDisAsm(
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char* pStrRet, int StrSizeRet, DWORD* pShader, DWORD Flags );
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void
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RDPSDisAsm(BYTE* pRDPSInstBuffer,
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ConstDef* pConstDefs,
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UINT cConstDefs,
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FLOAT fMaxPixelShaderValue,
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DWORD dwVersion);
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#endif _PSHADER_H
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