1094 lines
37 KiB
C++
1094 lines
37 KiB
C++
//----------------------------------------------------------------------------
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//
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// Assemble X86 machine implementation.
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//
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// Copyright (C) Microsoft Corporation, 2000-2001.
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//
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//----------------------------------------------------------------------------
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#include "ntsdp.hpp"
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#include "i386_asm.h"
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UCHAR asm386(ULONG, PUCHAR, PUCHAR);
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UCHAR CheckData(void);
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PUCHAR ProcessOpcode(void);
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PUCHAR GetTemplate(PUCHAR);
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UCHAR MatchTemplate(PULONG);
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void CheckTemplate(void);
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UCHAR CheckPrefix(PUCHAR);
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void AssembleInstr(void);
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UCHAR MatchOperand(PASM_VALUE, UCHAR);
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void OutputInstr(void);
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void OutputValue(UCHAR size, PUCHAR pchValue);
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extern UCHAR PeekAsmChar(void);
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extern ULONG PeekAsmToken(PULONG);
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extern void AcceptAsmToken(void);
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extern void GetAsmExpr(PASM_VALUE, UCHAR);
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extern void GetAsmOperand(PASM_VALUE);
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extern PUCHAR X86SearchOpcode(PUCHAR);
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extern ULONG savedAsmClass;
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extern OPNDTYPE mapOpndType[];
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// flags and values to build the assembled instruction
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static UCHAR fWaitPrfx; // if set, use WAIT prefix for float instr
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static UCHAR fOpndOvrd; // if set, use operand override prefix
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static UCHAR fAddrOvrd; // if set, use address override prefix
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static UCHAR segOvrd; // if nonzero, use segment override prefix
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static UCHAR preOpcode; // if nonzero, use byte before opcode
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static UCHAR inOpcode; // opcode of instruction
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static UCHAR postOpcode; // if nonzero, use byte after opcode
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static UCHAR fModrm; // if set, modrm byte is defined
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static UCHAR modModrm; // if fModrm, mod component of modrm
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static UCHAR regModrm; // if fModrm, reg component of modrm
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static UCHAR rmModrm; // if fModrm, rm component of modrm
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static UCHAR fSib; // if set, sib byte is defined
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static UCHAR scaleSib; // if fSib, scale component of sib
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static UCHAR indexSib; // if fSib, index component of sib
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static UCHAR baseSib; // if fSib, base component of sib
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static UCHAR fSegPtr; // if set, segment for far call defined
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static USHORT segPtr; // if fSegPtr, value of far call segment
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static UCHAR addrSize; // size of address: 0, 1, 2, 4
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static LONG addrValue; // value of address, if used
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static UCHAR immedSize; // size of immediate: 0, 1, 2, 4
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static LONG immedValue; // value of immediate, if used
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static UCHAR immedSize2; // size of second immediate, if used
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static LONG immedValue2; // value of second immediate, if used
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static ULONG addrAssem; // assembly address (formal)
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static PUCHAR pchBin; // pointer to binary result string
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// flags and values of the current instruction template being used
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static UCHAR cntTmplOpnd; // count of operands in template
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static UCHAR tmplType[3]; // operand types for current template
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static UCHAR tmplSize[3]; // operand sizes for current template
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static UCHAR fForceSize; // set if operand size must be specified
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static UCHAR fAddToOp; // set if addition to opcode
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static UCHAR fNextOpnd; // set if character exists for next operand
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static UCHAR fSegOnly; // set if only segment is used for operand
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static UCHAR fMpNext; // set on 'Mv' tmpl if next tmpl is 'Mp'
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static UCHAR segIndex; // index of segment for PUSH/POP
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// values describing the operands processed from the command line
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static UCHAR cntInstOpnd; // count of operands read from input line
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static UCHAR sizeOpnd; // size of operand for template with size v
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static ASM_VALUE avInstOpnd[3]; // asm values from input line
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PUCHAR pchAsmLine; // pointer to input line (formal)
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UCHAR fDBit = TRUE; // set for 32-bit addr/operand mode
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UCHAR segToOvrdByte[] = {
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0x00, // segX
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0x26, // segES
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0x2e, // segCS
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0x36, // segSS
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0x3e, // segDS
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0x64, // segFS
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0x65 // segGS
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};
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void
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BaseX86MachineInfo::Assemble(PADDR paddr, PSTR pchInput)
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{
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ULONG length;
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UCHAR chBinary[60];
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length = (ULONG)asm386((ULONG)Flat(*paddr), (PUCHAR)pchInput, chBinary);
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if (length) {
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// printf("setting memory at addr: %s - count: %d\n",
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// FormatAddr64(Flat(*paddr)), length);
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if (length != SetMemString(paddr, chBinary, length)) {
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error(MEMORY);
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}
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AddrAdd(paddr,length);
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}
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}
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UCHAR asm386 (ULONG addrAssemble, PUCHAR pchAssemble, PUCHAR pchBinary)
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{
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PUCHAR pchTemplate;
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UCHAR index; // loop index and temp
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ULONG temp; // general temporary value
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UCHAR errIndex; // error index of all templates
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ULONG errType; // error type of all templates
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// initialize flags and state variables
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addrAssem = addrAssemble; // make assembly address global
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pchAsmLine = pchAssemble; // make input string pointer global
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pchBin = pchBinary; // make binary string pointer global
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savedAsmClass = (ULONG)-1; // no peeked token
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segOvrd = 0; // no segment override
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cntInstOpnd = 0; // no input operands read yet
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fModrm = fSib = fSegPtr = FALSE; // no modrm, sib, or far seg
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addrSize = immedSize = immedSize2 = 0; // no addr or immed
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// check for data entry commands for byte (db), word (dw), dword (dd)
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// if so, process multiple operands directly
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if (!CheckData()) {
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// from the string in pchAsmLine, parse and lookup the opcode
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// to return a pointer to its template. check and process
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// any prefixes, reading the next opcode for each prefix
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do
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pchTemplate = ProcessOpcode();
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while (CheckPrefix(pchTemplate));
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// if a pending opcode to process, pchTemplate is not NULL
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if (pchTemplate) {
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// fNextOpnd is initially set on the condition of characters
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// being available for the first operand on the input line
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fNextOpnd = (UCHAR)(PeekAsmToken(&temp) != ASM_EOL_CLASS);
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// continue until match occurs or last template read
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errIndex = 0; // start with no error
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do {
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// get infomation on next template - return pointer to
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// next template or NULL if last in list
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pchTemplate = GetTemplate(pchTemplate);
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// match the loaded template against the operands input
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// if mismatch, index has the operand index + 1 of
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// the error while temp has the error type.
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index = MatchTemplate(&temp);
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// determine the error to report as templates are matched
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// update errIndex to index if later operand
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// if same operand index, prioritize to give best error:
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// high: SIZE, BADRANGE, OVERFLOW
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// medium: OPERAND
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// low: TOOFEW, TOOMANY
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if (index > errIndex
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|| (index == errIndex &&
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(errType == TOOFEW || errType == TOOMANY
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|| temp == SIZE || temp == BADRANGE
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|| temp == OVERFLOW))) {
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errIndex = index;
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errType = temp;
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};
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}
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while (index && pchTemplate);
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// if error occured on template match, process it
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if (index)
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error(errType);
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// preliminary type and size matching has been
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// successful on the current template.
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// perform further checks for size ambiguity.
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// at this point, the assembly is committed to the current
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// template. either an error or a successful assembly
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// follows.
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CheckTemplate();
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// from the template and operand information, set the field
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// information of the assembled instruction
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AssembleInstr();
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// from the assembled instruction information, create the
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// corresponding binary information
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OutputInstr();
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}
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}
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// return the size of the binary string output (can be zero)
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return (UCHAR)(pchBin - pchBinary); // length of binary string
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}
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UCHAR CheckData (void)
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{
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PUCHAR pchBinStart = pchBin;
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UCHAR ch;
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UCHAR size = 0;
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ASM_VALUE avItem;
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ULONG temp;
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// perform an explicit parse for 'db', 'dw', and 'dd'
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// and set size to that of the data item
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ch = PeekAsmChar();
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if (tolower(ch) == 'd') {
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ch = (UCHAR)tolower(*(pchAsmLine + 1));
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if (ch == 'b')
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size = 1;
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if (ch == 'w')
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size = 2;
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if (ch == 'd')
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size = 4;
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if (size) {
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ch = *(pchAsmLine + 2);
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if (ch != ' ' && ch != '\t' && ch != '\0')
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size = 0;
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}
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}
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// if a valid command entered, then size is nonzero
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if (size) {
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// move pointer over command and set loop condition
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pchAsmLine += 2;
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temp = ASM_COMMA_CLASS;
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// for each item in list:
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// check for binary buffer overflow
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// get expression value - error if not immediate value
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// test for byte and word overflow, if applicable
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// write the value to the binary buffer
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// check for comma for next operand
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while (temp == ASM_COMMA_CLASS) {
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if (pchBin >= pchBinStart + 40)
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error(LISTSIZE);
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GetAsmExpr(&avItem, FALSE);
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if (avItem.flags != fIMM)
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error(OPERAND);
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if (avItem.reloc > 1)
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error(RELOC);
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if ((size == 1 && ((LONG)avItem.value < -0x80L
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|| (LONG)avItem.value > 0xffL))
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|| (size == 2 && ((LONG)avItem.value < -0x8000L
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|| (LONG)avItem.value > 0xffffL)))
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error(OVERFLOW);
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OutputValue(size, (PUCHAR)&avItem.value);
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temp = PeekAsmToken(&temp);
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if (temp == ASM_COMMA_CLASS)
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AcceptAsmToken();
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else if (temp != ASM_EOL_CLASS)
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error(SYNTAX);
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}
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// check for any remaining part after the last operand
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if (PeekAsmChar() != '\0')
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error(SYNTAX);
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}
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// return size of item listed (zero for none)
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return size;
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}
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PUCHAR ProcessOpcode (void)
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{
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UCHAR ch;
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UCHAR cbOpcode = 0;
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PUCHAR pchTemplate;
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UCHAR szOpcode[12];
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// skip over any leading white space
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do
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ch = *pchAsmLine++;
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while (ch == ' ' || ch == '\t');
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// return NULL if end of line
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if (ch == '\0')
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return NULL;
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// parse out opcode - first string [a-z] [0-9] (case insensitive)
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ch = (UCHAR)tolower(ch);
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while (((ch >= 'a' && ch <= 'z') || (ch >= '0' && ch <= '9')) &&
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cbOpcode < 11) {
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szOpcode[cbOpcode++] = ch;
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ch = (UCHAR)tolower(*pchAsmLine); pchAsmLine++;
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}
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// if empty or too long, then error
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if (cbOpcode == 0 || cbOpcode == 11)
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error(BADOPCODE);
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// allow opcode to have trailing colon and terminate
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if (ch == ':') {
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szOpcode[cbOpcode++] = ch;
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ch = (UCHAR)tolower(*pchAsmLine); pchAsmLine++;
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}
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szOpcode[cbOpcode] = '\0';
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pchAsmLine--;
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// get pointer to template series for opcode found
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pchTemplate = X86SearchOpcode(szOpcode);
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if (pchTemplate == NULL)
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error(BADOPCODE);
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return pchTemplate;
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}
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PUCHAR GetTemplate (PUCHAR pchTemplate)
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{
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UCHAR ch;
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UCHAR ftEnd; // set if tEnd for last template in list
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UCHAR feEnd; // set if eEnd for last token in template
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// initialize template variables and flags
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cntTmplOpnd = segIndex = 0;
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tmplType[0] = tmplType[1] = tmplType[2] = typNULL;
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tmplSize[0] = tmplSize[1] = tmplSize[2] = sizeX;
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fForceSize = fAddToOp = fSegOnly = fMpNext = FALSE;
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fWaitPrfx = FALSE; // no WAIT prefix
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fOpndOvrd = fAddrOvrd = FALSE; // no operand or addr overrides
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preOpcode = postOpcode = 0; // no pre- or post-opcode
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regModrm = 0; // this is part of some opcodes
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ch = *pchTemplate++;
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// set pre-opcode for two-byte opcodes (0x0f??) and advance
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// template if needed
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if (ch == 0x0f) {
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preOpcode = ch;
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ch = *pchTemplate++;
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}
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inOpcode = ch; // set opcode
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// set post-opcode and advance template for floating-point
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// instructions (0xd8 - 0xdf) using a second byte in
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// the range 0xc0 - 0xff that is read from the template
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if ((ch & ~0x7) == 0xd8) {
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ch = *pchTemplate;
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if (ch >= 0xc0) {
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postOpcode = ch;
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pchTemplate++;
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}
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}
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// loop for each flag and/or operand token in template
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// the last token in the list has the eEnd bit set.
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do {
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// read the next template token
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ch = *pchTemplate++;
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// extract the tEnd and eEnd bits from the token
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ftEnd = (UCHAR)(ch & tEnd);
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feEnd = (UCHAR)(ch & eEnd);
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ch &= ~(tEnd | eEnd);
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// if extracted token is a flag, do the appropriate action
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if (ch < asRegBase)
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switch (ch) {
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case as0x0a:
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// the postOpcode is set for some decimal instructions
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postOpcode = 0x0a;
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break;
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case asOpRg:
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// fAddToOp is set if the register index is added
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// directly to the base opcode value
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fAddToOp = TRUE;
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break;
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case asSiz0:
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// fOpndOvrd is set or cleared to force a 16-bit operand
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fOpndOvrd = fDBit;
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break;
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case asSiz1:
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// fOpndOvrd is set or cleared to force a 32-bit operand
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fOpndOvrd = (UCHAR)!fDBit;
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break;
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case asWait:
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// the flag fWaitPrfx is set to emit WAIT before the
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// instruction
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fWaitPrfx = TRUE;
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break;
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case asSeg:
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// in XLAT, the optional memory operand is used to
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// just specify a segment override prefix
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fSegOnly = TRUE;
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break;
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case asFSiz:
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// fForceSize is set when a specific size of a memory
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// operand must be given for some floating instrs
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fForceSize = TRUE;
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break;
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case asMpNx:
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// fMpNext is set when the next template operand is
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// 'Mp' and is used to determine how to match
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// 'Md' since it matches both 'Mp' and 'Mv'
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fMpNext = TRUE;
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break;
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}
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// if token is REG value bit, set the variable regModrm to
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// set the opcode-dependent reg value in the modrm byte
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else if (ch < opnBase)
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regModrm = (UCHAR)(ch - asRegBase);
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// otherwise, token is operand descriptor.
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// if segment operand, get segment number from template
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// normalize and map to get operand type and size.
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else {
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if (ch == opnSeg)
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segIndex = *pchTemplate++;
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ch -= opnBase;
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tmplType[cntTmplOpnd] = mapOpndType[ch].type;
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tmplSize[cntTmplOpnd++] = mapOpndType[ch].size;
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}
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}
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while (!ftEnd);
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// return either the pointer to the next template or NULL if
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// the last template for the opcode has been processed
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return (feEnd ? NULL : pchTemplate);
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}
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UCHAR MatchTemplate (PULONG pErrType)
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{
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UCHAR fMatch = TRUE;
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UCHAR index;
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ULONG temp;
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PASM_VALUE pavInstOpnd; // pointer to current operand from input
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// process matching for each operand in the specified template
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// stop at last operand or when mismatch occurs
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for (index = 0; index < cntTmplOpnd && fMatch; index++) {
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// set pointer to current instruction operand
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pavInstOpnd = &avInstOpnd[index];
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// if input operand has not yet been read, check flag
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// for existence and process it.
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if (index == cntInstOpnd) {
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fMatch = fNextOpnd;
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*pErrType = TOOFEW;
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if (fMatch) {
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cntInstOpnd++;
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GetAsmOperand(pavInstOpnd);
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// recompute existence of next possible operand
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// comma implies TRUE, EOL implies FALSE, else error
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temp = PeekAsmToken(&temp);
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if (temp == ASM_COMMA_CLASS) {
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AcceptAsmToken();
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fNextOpnd = TRUE;
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}
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else if (temp == ASM_EOL_CLASS)
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fNextOpnd = FALSE;
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else
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error(EXTRACHARS); // bad parse - immediate error
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}
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}
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if (fMatch) {
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fMatch = MatchOperand(pavInstOpnd, tmplType[index]);
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*pErrType = OPERAND;
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}
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// if the template and operand type match, do preliminary
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// check on size based solely on template size specified
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if (fMatch) {
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if (tmplType[index] == typJmp) {
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// for relative jumps, test if byte offset is
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// sufficient by computing offset which is
|
|
// the target offset less the offset of the
|
|
// next instruction. (assume Jb instructions
|
|
// are two bytes in length.
|
|
|
|
temp = pavInstOpnd->value - (addrAssem + 2);
|
|
fMatch = (UCHAR)(tmplSize[index] == sizeV
|
|
|| ((LONG)temp >= -0x80 && (LONG)temp <= 0x7f));
|
|
*pErrType = BADRANGE;
|
|
}
|
|
|
|
else if (tmplType[index] == typImm) {
|
|
|
|
// for immediate operand,
|
|
// template sizeV matches sizeB, sizeW, sizeV (all)
|
|
// template sizeW matches sizeB, sizeW
|
|
// template sizeB matches sizeB
|
|
|
|
fMatch = (UCHAR)(tmplSize[index] == sizeV
|
|
|| pavInstOpnd->size == tmplSize[index]
|
|
|| pavInstOpnd->size == sizeB);
|
|
*pErrType = OVERFLOW;
|
|
}
|
|
else {
|
|
|
|
// for nonimmediate operand,
|
|
// template sizeX (unspecified) matches all
|
|
// operand sizeX (unspecified) matches all
|
|
// same template and operand size matches
|
|
// template sizeV matches operand sizeW and sizeD
|
|
// (EXCEPT for sizeD when fMpNext and fDBit set)
|
|
// template sizeP matches operand sizeD and sizeF
|
|
// template sizeA matches operand sizeD and sizeQ
|
|
|
|
fMatch = (UCHAR)(tmplSize[index] == sizeX
|
|
|| pavInstOpnd->size == sizeX
|
|
|| tmplSize[index] == pavInstOpnd->size
|
|
|| (tmplSize[index] == sizeV
|
|
&& (pavInstOpnd->size == sizeW
|
|
|| (pavInstOpnd->size == sizeD
|
|
&& (!fMpNext || fDBit))))
|
|
|| (tmplSize[index] == sizeP
|
|
&& (pavInstOpnd->size == sizeD
|
|
|| pavInstOpnd->size == sizeF))
|
|
|| (tmplSize[index] == sizeA
|
|
&& (pavInstOpnd->size == sizeD
|
|
|| pavInstOpnd->size == sizeQ)));
|
|
*pErrType = SIZE;
|
|
}
|
|
}
|
|
}
|
|
|
|
// if more operands to read, then no match
|
|
|
|
if (fMatch & fNextOpnd) {
|
|
fMatch = FALSE;
|
|
index++; // next operand is in error
|
|
*pErrType = TOOMANY;
|
|
}
|
|
|
|
return fMatch ? (UCHAR)0 : index;
|
|
}
|
|
|
|
void CheckTemplate (void)
|
|
{
|
|
UCHAR index;
|
|
|
|
// if fForceSize is set, then the first (and only) operand is a
|
|
// memory type. return an error if its size is unspecified.
|
|
|
|
if (fForceSize && avInstOpnd[0].size == sizeX)
|
|
error(OPERAND);
|
|
|
|
// test for template with leading entries of 'Xb', where
|
|
// 'X' includes all types except immediate ('I'). if any
|
|
// are defined, at least one operand must have a byte size.
|
|
// this handles the cases of byte or word/dword ambiguity for
|
|
// instructions with no register operands.
|
|
|
|
sizeOpnd = sizeX;
|
|
for (index = 0; index < 2; index++)
|
|
if (tmplType[index] != typImm && tmplSize[index] == sizeB) {
|
|
if (avInstOpnd[index].size != sizeX)
|
|
sizeOpnd = avInstOpnd[index].size;
|
|
}
|
|
else
|
|
break;
|
|
if (index != 0 && sizeOpnd == sizeX)
|
|
error(SIZE);
|
|
|
|
// for templates with one entry of 'Xp', where 'X' is
|
|
// not 'A', allowable sizes are sizeX (unspecified),
|
|
// sizeD (dword), and sizeF (fword). process by
|
|
// mapping entry sizes 'p' -> 'v', sizeD -> sizeW,
|
|
// and sizeF -> sizeD
|
|
// (template 'Ap' is absolute with explicit segment and
|
|
// 'v'-sized offset - really treated as 'Av')
|
|
|
|
if (tmplSize[0] == sizeP) {
|
|
tmplSize[0] = sizeV;
|
|
if (avInstOpnd[0].size == sizeD)
|
|
avInstOpnd[0].size = sizeW;
|
|
if (avInstOpnd[0].size == sizeF)
|
|
avInstOpnd[0].size = sizeD;
|
|
}
|
|
|
|
// for templates with the second entry of 'Ma', the
|
|
// allowable sizes are sizeX (unspecified),
|
|
// sizeD (dword), and sizeQ (qword). process by
|
|
// mapping entry sizes 'a' -> 'v', sizeD -> sizeW,
|
|
// and sizeQ -> sizeD
|
|
// (template entry 'Ma' is used only with the BOUND instruction)
|
|
|
|
if (tmplSize[1] == sizeA) {
|
|
tmplSize[1] = sizeV;
|
|
if (avInstOpnd[1].size == sizeD)
|
|
avInstOpnd[1].size = sizeW;
|
|
if (avInstOpnd[1].size == sizeQ)
|
|
avInstOpnd[1].size = sizeD;
|
|
}
|
|
|
|
// test for template with leading entries of 'Xv' optionally
|
|
// followed by one 'Iv' entry. if two 'Xv' entries, set
|
|
// size error if one is word and the other is dword. if
|
|
// 'Iv' entry, test for overflow.
|
|
|
|
sizeOpnd = sizeX;
|
|
for (index = 0; index < 3; index++)
|
|
if (tmplSize[index] == sizeV)
|
|
if (tmplType[index] != typImm) {
|
|
|
|
// template entry is 'Xv', set size and check size
|
|
|
|
if (avInstOpnd[index].size != sizeX) {
|
|
if (sizeOpnd != sizeX && sizeOpnd
|
|
!= avInstOpnd[index].size)
|
|
error(SIZE);
|
|
sizeOpnd = avInstOpnd[index].size;
|
|
}
|
|
}
|
|
else {
|
|
|
|
// template entry is 'Iv', set sizeOpnd to either
|
|
// sizeW or sizeD and check for overflow
|
|
|
|
if (sizeOpnd == sizeX)
|
|
sizeOpnd = (UCHAR)(fDBit ? sizeD : sizeW);
|
|
if (sizeOpnd == sizeW && avInstOpnd[index].size == sizeD)
|
|
error(OVERFLOW);
|
|
}
|
|
}
|
|
|
|
UCHAR CheckPrefix (PUCHAR pchTemplate)
|
|
{
|
|
UCHAR fPrefix;
|
|
|
|
fPrefix = (UCHAR)(pchTemplate && *pchTemplate != 0x0f
|
|
&& (*pchTemplate & ~7) != 0xd8
|
|
&& *(pchTemplate + 1) == (asPrfx + tEnd + eEnd));
|
|
if (fPrefix)
|
|
*pchBin++ = *pchTemplate;
|
|
|
|
return fPrefix;
|
|
}
|
|
|
|
void AssembleInstr (void)
|
|
{
|
|
UCHAR size;
|
|
UCHAR index;
|
|
PASM_VALUE pavInstOpnd;
|
|
|
|
// set operand override flag if operand size differs than fDBit
|
|
// (the flag may already be set due to opcode template flag)
|
|
|
|
if ((sizeOpnd == sizeW && fDBit)
|
|
|| (sizeOpnd == sizeD && !fDBit))
|
|
fOpndOvrd = TRUE;
|
|
|
|
// for each operand of the successfully matched template,
|
|
// build the assembled instruction
|
|
// for template entries with size 'v', sizeOpnd has the size
|
|
|
|
for (index = 0; index < cntTmplOpnd; index++) {
|
|
pavInstOpnd = &avInstOpnd[index];
|
|
size = tmplSize[index];
|
|
if (size == sizeV)
|
|
size = sizeOpnd;
|
|
|
|
switch (tmplType[index]) {
|
|
case typExp:
|
|
case typMem:
|
|
if (!segOvrd) // first one only (movsb...)
|
|
segOvrd = segToOvrdByte[pavInstOpnd->segovr];
|
|
if (fSegOnly)
|
|
break;
|
|
|
|
fModrm = TRUE;
|
|
if (pavInstOpnd->flags == fREG) {
|
|
modModrm = 3;
|
|
rmModrm = pavInstOpnd->base;
|
|
}
|
|
else {
|
|
addrValue = (LONG)pavInstOpnd->value;
|
|
|
|
// for 16-bit or 32-bit index off (E)BP, make
|
|
// zero displacement a byte one
|
|
|
|
if (addrValue == 0
|
|
&& (pavInstOpnd->flags != fPTR16
|
|
|| pavInstOpnd->base != 6)
|
|
&& (pavInstOpnd->flags != fPTR32
|
|
|| pavInstOpnd->base != indBP))
|
|
modModrm = 0;
|
|
else if (addrValue >= -0x80L && addrValue <= 0x7fL) {
|
|
modModrm = 1;
|
|
addrSize = 1;
|
|
}
|
|
else if (pavInstOpnd->flags == fPTR32
|
|
|| (pavInstOpnd->flags == fPTR && fDBit)) {
|
|
modModrm = 2;
|
|
addrSize = 4;
|
|
}
|
|
else if (addrValue >= -0x8000L && addrValue <= 0xffffL) {
|
|
modModrm = 2;
|
|
addrSize = 2;
|
|
}
|
|
else
|
|
error(OVERFLOW);
|
|
if (pavInstOpnd->flags == fPTR) {
|
|
modModrm = 0;
|
|
addrSize = (UCHAR)((1 + fDBit) << 1);
|
|
rmModrm = (UCHAR)(6 - fDBit);
|
|
}
|
|
else if (pavInstOpnd->flags == fPTR16) {
|
|
fAddrOvrd = fDBit;
|
|
rmModrm = pavInstOpnd->base;
|
|
if (modModrm == 0 && rmModrm == 6)
|
|
modModrm = 1;
|
|
}
|
|
else {
|
|
fAddrOvrd = (UCHAR)!fDBit;
|
|
if (pavInstOpnd->index == 0xff
|
|
&& pavInstOpnd->base != indSP) {
|
|
rmModrm = pavInstOpnd->base;
|
|
if (modModrm == 0 && rmModrm == 5)
|
|
modModrm++;
|
|
}
|
|
else {
|
|
rmModrm = 4;
|
|
fSib = TRUE;
|
|
if (pavInstOpnd->base != 0xff) {
|
|
baseSib = pavInstOpnd->base;
|
|
if (modModrm == 0 && baseSib == 5)
|
|
modModrm++;
|
|
}
|
|
else
|
|
baseSib = 5;
|
|
if (pavInstOpnd->index != 0xff) {
|
|
indexSib = pavInstOpnd->index;
|
|
scaleSib = pavInstOpnd->scale;
|
|
}
|
|
else {
|
|
indexSib = 4;
|
|
scaleSib = 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
case typGen:
|
|
if (fAddToOp)
|
|
inOpcode += pavInstOpnd->base;
|
|
else
|
|
regModrm = pavInstOpnd->base;
|
|
break;
|
|
|
|
case typSgr:
|
|
regModrm = (UCHAR)(pavInstOpnd->base - 1);
|
|
// remove list offset
|
|
break;
|
|
|
|
case typReg:
|
|
rmModrm = pavInstOpnd->base;
|
|
break;
|
|
|
|
case typImm:
|
|
if (immedSize == 0) {
|
|
immedSize = size;
|
|
immedValue = pavInstOpnd->value;
|
|
}
|
|
else {
|
|
immedSize2 = size;
|
|
immedValue2 = pavInstOpnd->value;
|
|
}
|
|
break;
|
|
|
|
case typJmp:
|
|
|
|
// compute displacment for byte offset instruction
|
|
// and test if in range
|
|
|
|
addrValue = pavInstOpnd->value - (addrAssem + 2);
|
|
if (addrValue >= -0x80L && addrValue <= 0x7fL)
|
|
addrSize = 1;
|
|
else {
|
|
|
|
// too large for byte, compute for word offset
|
|
// and test again if in range
|
|
// also allow for two-byte opcode 0f xx
|
|
|
|
addrValue -= 1 + (preOpcode == 0x0f);
|
|
if (!fDBit) {
|
|
if (addrValue >= -0x8000L && addrValue <= 0x7fffL)
|
|
addrSize = 2;
|
|
else
|
|
error(BADRANGE);
|
|
}
|
|
else {
|
|
|
|
// recompute again for dword offset instruction
|
|
|
|
addrValue -= 2;
|
|
addrSize = 4;
|
|
}
|
|
}
|
|
fOpndOvrd = FALSE; // operand size override is NOT set
|
|
break;
|
|
|
|
case typCtl:
|
|
case typDbg:
|
|
case typTrc:
|
|
fModrm = TRUE;
|
|
modModrm = 3;
|
|
regModrm = pavInstOpnd->base;
|
|
break;
|
|
|
|
case typSti:
|
|
postOpcode += pavInstOpnd->base;
|
|
break;
|
|
|
|
case typSeg:
|
|
break;
|
|
|
|
case typXsi:
|
|
case typYdi:
|
|
fAddrOvrd = (UCHAR)
|
|
((UCHAR)(pavInstOpnd->flags == fPTR32) != fDBit);
|
|
break;
|
|
|
|
case typOff:
|
|
segOvrd = segToOvrdByte[pavInstOpnd->segovr];
|
|
goto jumpAssem;
|
|
|
|
case typAbs:
|
|
fSegPtr = TRUE;
|
|
segPtr = pavInstOpnd->segment;
|
|
jumpAssem:
|
|
addrValue = (LONG)pavInstOpnd->value;
|
|
if (!fDBit)
|
|
if (addrValue >= -0x8000L && addrValue <= 0xffffL)
|
|
addrSize = 2;
|
|
else
|
|
error(OVERFLOW);
|
|
else
|
|
addrSize = 4;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
UCHAR MatchOperand (PASM_VALUE pavOpnd, UCHAR tmplType)
|
|
{
|
|
UCHAR fMatch;
|
|
|
|
// if immediate operand, set minimum unsigned size
|
|
|
|
if (pavOpnd->flags == fIMM) {
|
|
if ((LONG)pavOpnd->value >= -0x80L && (LONG)pavOpnd->value <= 0xffL)
|
|
pavOpnd->size = sizeB;
|
|
else if ((LONG)pavOpnd->value >= -0x8000L
|
|
&& (LONG)pavOpnd->value <= 0xffffL)
|
|
pavOpnd->size = sizeW;
|
|
else
|
|
pavOpnd->size = sizeD;
|
|
}
|
|
|
|
// start matching of operands
|
|
// compare the template and input operand types
|
|
|
|
switch (tmplType) {
|
|
case typAX:
|
|
fMatch = (UCHAR)((pavOpnd->flags & fREG)
|
|
&& pavOpnd->index == regG && pavOpnd->base == indAX);
|
|
break;
|
|
|
|
case typCL:
|
|
fMatch = (UCHAR)((pavOpnd->flags & fREG)
|
|
&& pavOpnd->index == regG && pavOpnd->size == sizeB
|
|
&& pavOpnd->base == indCX);
|
|
break;
|
|
|
|
case typDX:
|
|
fMatch = (UCHAR)((pavOpnd->flags & fREG)
|
|
&& pavOpnd->index == regG && pavOpnd->size == sizeW
|
|
&& pavOpnd->base == indDX);
|
|
break;
|
|
|
|
case typAbs:
|
|
fMatch = (UCHAR)(pavOpnd->flags & fFPTR);
|
|
break;
|
|
|
|
case typExp:
|
|
fMatch = (UCHAR)((pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regG)
|
|
|| (pavOpnd->flags == fIMM && pavOpnd->reloc == 1)
|
|
|| (pavOpnd->flags & (fPTR | fPTR16 | fPTR32)) != 0);
|
|
break;
|
|
|
|
case typGen:
|
|
case typReg:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regG);
|
|
break;
|
|
|
|
case typIm1:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fIMM && pavOpnd->value == 1);
|
|
break;
|
|
|
|
case typIm3:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fIMM && pavOpnd->value == 3);
|
|
break;
|
|
|
|
case typImm:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fIMM && pavOpnd->reloc == 0);
|
|
break;
|
|
|
|
case typJmp:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fIMM);
|
|
break;
|
|
|
|
case typMem:
|
|
fMatch = (UCHAR)((pavOpnd->flags == fIMM && pavOpnd->reloc == 1)
|
|
|| ((pavOpnd->flags & (fPTR | fPTR16 | fPTR32)) != 0));
|
|
break;
|
|
|
|
case typCtl:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regC);
|
|
break;
|
|
|
|
case typDbg:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regD);
|
|
break;
|
|
|
|
case typTrc:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regT);
|
|
break;
|
|
|
|
case typSt:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regF);
|
|
break;
|
|
|
|
case typSti:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regI);
|
|
break;
|
|
|
|
case typSeg:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG && pavOpnd->index == regS
|
|
&& pavOpnd->base == segIndex);
|
|
break;
|
|
|
|
case typSgr:
|
|
fMatch = (UCHAR)(pavOpnd->flags == fREG
|
|
&& pavOpnd->index == regS);
|
|
break;
|
|
|
|
case typXsi:
|
|
fMatch = (UCHAR)(((pavOpnd->flags == fPTR16 && pavOpnd->base == 4)
|
|
|| (pavOpnd->flags == fPTR32 && pavOpnd->base == indSI
|
|
&& pavOpnd->index == 0xff))
|
|
&& pavOpnd->value == 0
|
|
&& (pavOpnd->segovr == segX
|
|
|| pavOpnd->segovr == segDS));
|
|
break;
|
|
|
|
case typYdi:
|
|
fMatch = (UCHAR)(((pavOpnd->flags == fPTR16 && pavOpnd->base == 5)
|
|
|| (pavOpnd->flags == fPTR32 && pavOpnd->base == indDI
|
|
&& pavOpnd->index == 0xff))
|
|
&& pavOpnd->value == 0
|
|
&& pavOpnd->segovr == segES);
|
|
break;
|
|
|
|
case typOff:
|
|
fMatch = (UCHAR)((pavOpnd->flags == fIMM && pavOpnd->reloc == 1)
|
|
|| pavOpnd->flags == fPTR);
|
|
break;
|
|
|
|
default:
|
|
fMatch = FALSE;
|
|
break;
|
|
}
|
|
|
|
return fMatch;
|
|
}
|
|
|
|
void OutputInstr (void)
|
|
{
|
|
if (fWaitPrfx)
|
|
*pchBin++ = 0x9b;
|
|
if (fAddrOvrd)
|
|
*pchBin++ = 0x67;
|
|
if (fOpndOvrd)
|
|
*pchBin++ = 0x66;
|
|
if (segOvrd)
|
|
*pchBin++ = segOvrd;
|
|
if (preOpcode)
|
|
*pchBin++ = preOpcode;
|
|
*pchBin++ = inOpcode;
|
|
if (postOpcode)
|
|
*pchBin++ = postOpcode;
|
|
if (fModrm)
|
|
*pchBin++ = (UCHAR)((((modModrm << 3) + regModrm) << 3) + rmModrm);
|
|
if (fSib)
|
|
*pchBin++ = (UCHAR)((((scaleSib << 3) + indexSib) << 3) + baseSib);
|
|
|
|
OutputValue(addrSize, (PUCHAR)&addrValue); // size = 0, 1, 2, 4
|
|
OutputValue((UCHAR)(fSegPtr << 1), (PUCHAR)&segPtr); // size = 0, 2
|
|
OutputValue(immedSize, (PUCHAR)&immedValue); // size = 0, 1, 2, 4
|
|
OutputValue(immedSize2, (PUCHAR)&immedValue2); // size = 0, 1, 2, 4
|
|
}
|
|
|
|
void OutputValue (UCHAR size, PUCHAR pchValue)
|
|
{
|
|
while (size--)
|
|
*pchBin++ = *pchValue++;
|
|
}
|