205 lines
4.6 KiB
C
205 lines
4.6 KiB
C
/*++
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Module Name:
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iosapic.h
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Abstract:
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This module contains the definitions used by HAL to manipulate
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the IO SAPIC interrupt controller and SAPIC-specific constants.
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Author:
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Todd Kjos (v-tkjos) 1-30-98
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#define STATIC
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#include "halp.h"
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#include "acpitabl.h"
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//
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// MPS INTi Flags related macros:
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//
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// Warning: these definitions do not consider the POLARITY or EL comformity with bus.
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//
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#define IS_LEVEL_TRIGGERED_MPS(vectorFlags) \
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((vectorFlags & EL_LEVEL_TRIGGERED) == EL_LEVEL_TRIGGERED)
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#define IS_EDGE_TRIGGERED_MPS(vectorFlags) \
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((vectorFlags & EL_EDGE_TRIGGERED) == EL_EDGE_TRIGGERED)
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#define IS_ACTIVE_LOW_MPS(vectorFlags) \
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((vectorFlags & POLARITY_LOW) == POLARITY_LOW)
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#define IS_ACTIVE_HIGH_MPS(vectorFlags) \
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((vectorFlags & POLARITY_HIGH) == POLARITY_HIGH)
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typedef struct {
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ULONG GlobalVector; // This is Node+IDT vector value seen by kernel
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ULONG Vector; // Bits 31:0 of the Rte entry (IDT vector+polarity...)
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ULONG Destination; // Bits 63:32 of Rte entry
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} IOSAPICINTI, *PIOSAPICINTI;
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typedef struct _INTR_METHODS INTR_METHODS, *PINTR_METHODS;
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typedef struct _IO_INTR_CONTROL IO_INTR_CONTROL, *PIO_INTR_CONTROL;
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typedef VOID (*PINTRMETHOD) (PIO_INTR_CONTROL,ULONG);
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typedef volatile ULONG * (*PGETEOI) (PIO_INTR_CONTROL);
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struct _INTR_METHODS {
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PINTRMETHOD MaskEntry;
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PINTRMETHOD SetEntry;
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PINTRMETHOD EnableEntry;
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};
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//
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// External interrupt controller structure.
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//
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struct _IO_INTR_CONTROL {
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ULONG IntiBase;
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ULONG IntiMax;
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ULONG InterruptAffinity;
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ULONG NextCpu;
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PVOID RegBaseVirtual;
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PHYSICAL_ADDRESS RegBasePhysical;
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PINTR_METHODS IntrMethods;
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PIO_INTR_CONTROL flink;
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IOSAPICINTI Inti[ANYSIZE_ARRAY];
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};
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extern struct _MPINFO HalpMpInfo;
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extern PIO_INTR_CONTROL HalpIoSapicList;
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extern INTR_METHODS HalpIoSapicMethods;
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//
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// IO Unit definition
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//
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typedef struct {
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volatile ULONG RegisterSelect; // Write register number to access register
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volatile ULONG Reserved1[3];
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volatile ULONG RegisterWindow; // Data read/written here
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volatile ULONG Reserved2[3];
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volatile ULONG Reserved3[8];
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volatile ULONG Eoi; // EOI register for level triggered interrupts
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} IO_SAPIC_REGS, *PIO_SAPIC_REGS;
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//
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// IO SAPIC Version Register
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//
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struct SapicVersion {
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UCHAR Version; // either 0.x or 1.x
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UCHAR Reserved1;
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UCHAR MaxRedirEntries; // Number of INTIs on unit
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UCHAR Reserved2;
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};
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typedef struct SapicVersion SAPIC_VERSION, *PSAPIC_VERSION;
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BOOLEAN
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HalpGetSapicInterruptDesc (
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IN INTERFACE_TYPE BusType,
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IN ULONG BusNumber,
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IN ULONG BusInterruptLevel,
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OUT PULONG SapicInti,
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OUT PKAFFINITY InterruptAffinity
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);
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VOID
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HalpSetInternalVector (
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IN ULONG InternalVector,
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IN VOID (*HalInterruptSerivceRoutine)(VOID)
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);
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VOID
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HalpEnableRedirEntry(
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ULONG Inti
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);
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VOID
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HalpDisableRedirEntry(
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ULONG Inti
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);
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VOID
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HalpWriteRedirEntry (
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IN ULONG GlobalInterrupt,
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IN UCHAR SapicVector,
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IN USHORT DestinationCPU,
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IN ULONG Flags,
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IN ULONG InterruptType
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);
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BOOLEAN
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HalpIsActiveLow(
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ULONG Inti
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);
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BOOLEAN
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HalpIsLevelTriggered(
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ULONG Inti
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);
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VOID
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HalpSetPolarity(
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ULONG Inti,
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BOOLEAN ActiveLow
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);
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VOID
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HalpSetLevel(
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ULONG Inti,
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BOOLEAN LevelTriggered
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);
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//
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// I/O SAPIC defines
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//
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#define IO_REGISTER_SELECT 0x00000000
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#define IO_REGISTER_WINDOW 0x00000010
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#define IO_EOI_REGISTER 0x00000040
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#define IO_ID_REGISTER 0x00000000 // Exists, but ignored by SAPIC
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#define IO_VERS_REGISTER 0x00000001
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#define IO_REDIR_00_LOW 0x00000010
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#define IO_REDIR_00_HIGH 0x00000011
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#define IO_MAX_REDIR_MASK 0x00FF0000
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#define IO_VERSION_MASK 0x000000FF
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#define SAPIC_ID_MASK 0xFF000000
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#define SAPIC_ID_SHIFT 24
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#define SAPIC_EID_MASK 0x00FF0000
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#define SAPIC_EID_SHIFT 16
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#define SAPIC_XID_MASK 0xFFFF0000
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#define SAPIC_XID_SHIFT 16
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#define INT_VECTOR_MASK 0x000000FF
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#define DELIVER_FIXED 0x00000000
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#define DELIVER_LOW_PRIORITY 0x00000100
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#define DELIVER_SMI 0x00000200
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#define DELIVER_NMI 0x00000400
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#define DELIVER_INIT 0x00000500
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#define DELIVER_EXTINT 0x00000700
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#define INT_TYPE_MASK 0x00000700
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#define ACTIVE_LOW 0x00002000
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#define ACTIVE_HIGH 0x00000000
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#define LEVEL_TRIGGERED 0x00008000
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#define EDGE_TRIGGERED 0x00000000
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#define INTERRUPT_MASKED 0x00010000
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#define INTERRUPT_MOT_MASKED 0x00000000
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#define MAX_INTR_VECTOR 256
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