932 lines
16 KiB
C++
932 lines
16 KiB
C++
;/*
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;* INTEL CORPORATION PROPRIETARY INFORMATION
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;*
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;* This software is supplied under the terms of a license
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;* agreement or nondisclosure agreement with Intel Corporation
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;* and may not be copied or disclosed except in accordance with
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;* the terms of that agreement.
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;* Copyright (c) 1991,1992,1993 Intel Corporation.
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;*
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;*/
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;NOTE:NOTE:NOTE:
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; IF YOU MODIFY ANY OF THE OPCODES HERE, MAKE SURE TO REFLECT THAT
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; IN THE ValidMmxOpcode[] array in mm.c.
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;
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;Please use MMWORD and not DWORD (QWORD does not work) for 64 bit data
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; in MMX instructions. After getting a real assembler you will just have to
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; add the line " MMWORD TEXTEQU <QWORD>" to your code.
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MMWORD TEXTEQU <DWORD>
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opc_Rdpmc = 033H
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opc_Emms = 077H
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opc_Movd_ld = 06EH
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opc_Movd_st = 07EH
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opc_Movq_ld = 06FH
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opc_Movq_st = 07FH
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opc_Packssdw = 06BH
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opc_Packsswb = 063H
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opc_Packuswb = 067H
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opc_Paddb = 0FCH
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opc_Paddd = 0FEH
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opc_Paddsb = 0ECH
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opc_Paddsw = 0EDH
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opc_Paddusb = 0DCH
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opc_Paddusw = 0DDH
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opc_Paddw = 0FDH
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opc_Pand = 0DBH
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opc_Pandn = 0DFH
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opc_Pcmpeqb = 074H
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opc_Pcmpeqd = 076H
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opc_Pcmpeqw = 075H
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opc_Pcmpgtb = 064H
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opc_Pcmpgtd = 066H
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opc_Pcmpgtw = 065H
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opc_Pmaddwd = 0F5H
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opc_Pmulhw = 0E5H
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opc_Pmullw = 0D5H
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opc_Por = 0EBH
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opc_PSHimd = 072H
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opc_PSHimq = 073H
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opc_PSHimw = 071H
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opc_Pslld = 0F2H
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opc_Psllq = 0F3H
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opc_Psllw = 0F1H
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opc_Psrad = 0E2H
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opc_Psraw = 0E1H
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opc_Psrld = 0D2H
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opc_Psrlq = 0D3H
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opc_Psrlw = 0D1H
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opc_Psubb = 0F8H
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opc_Psubd = 0FAH
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opc_Psubsb = 0E8H
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opc_Psubsw = 0E9H
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opc_Psubusb = 0D8H
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opc_Psubusw = 0D9H
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opc_Psubw = 0F9H
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opc_Punpcklbw = 060H
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opc_Punpckldq = 062H
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opc_Punpcklwd = 061H
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opc_Punpckhbw = 068H
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opc_Punpckhdq = 06AH
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opc_Punpckhwd = 069H
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opc_Pxor = 0EFH
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.486P
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; ALIAS R# to MM# registers
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DefineMMxRegs Macro
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IFDEF APP_16BIT
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MM0 TEXTEQU <AX>
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MM1 TEXTEQU <CX>
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MM2 TEXTEQU <DX>
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MM3 TEXTEQU <BX>
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MM4 TEXTEQU <SP>
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MM5 TEXTEQU <BP>
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MM6 TEXTEQU <SI>
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MM7 TEXTEQU <DI>
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mm0 TEXTEQU <AX>
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mm1 TEXTEQU <CX>
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mm2 TEXTEQU <DX>
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mm3 TEXTEQU <BX>
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mm4 TEXTEQU <SP>
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mm5 TEXTEQU <BP>
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mm6 TEXTEQU <SI>
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mm7 TEXTEQU <DI>
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Mm0 TEXTEQU <AX>
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Mm1 TEXTEQU <CX>
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Mm2 TEXTEQU <DX>
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Mm3 TEXTEQU <BX>
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Mm4 TEXTEQU <SP>
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Mm5 TEXTEQU <BP>
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Mm6 TEXTEQU <SI>
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Mm7 TEXTEQU <DI>
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mM0 TEXTEQU <AX>
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mM1 TEXTEQU <CX>
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mM2 TEXTEQU <DX>
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mM3 TEXTEQU <BX>
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mM4 TEXTEQU <SP>
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mM5 TEXTEQU <BP>
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mM6 TEXTEQU <SI>
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mM7 TEXTEQU <DI>
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ELSE
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MM0 TEXTEQU <EAX>
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MM1 TEXTEQU <ECX>
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MM2 TEXTEQU <EDX>
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MM3 TEXTEQU <EBX>
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MM4 TEXTEQU <ESP>
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MM5 TEXTEQU <EBP>
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MM6 TEXTEQU <ESI>
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MM7 TEXTEQU <EDI>
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mm0 TEXTEQU <EAX>
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mm1 TEXTEQU <ECX>
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mm2 TEXTEQU <EDX>
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mm3 TEXTEQU <EBX>
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mm4 TEXTEQU <ESP>
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mm5 TEXTEQU <EBP>
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mm6 TEXTEQU <ESI>
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mm7 TEXTEQU <EDI>
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Mm0 TEXTEQU <EAX>
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Mm1 TEXTEQU <ECX>
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Mm2 TEXTEQU <EDX>
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Mm3 TEXTEQU <EBX>
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Mm4 TEXTEQU <ESP>
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Mm5 TEXTEQU <EBP>
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Mm6 TEXTEQU <ESI>
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Mm7 TEXTEQU <EDI>
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mM0 TEXTEQU <EAX>
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mM1 TEXTEQU <ECX>
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mM2 TEXTEQU <EDX>
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mM3 TEXTEQU <EBX>
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mM4 TEXTEQU <ESP>
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mM5 TEXTEQU <EBP>
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mM6 TEXTEQU <ESI>
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mM7 TEXTEQU <EDI>
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ENDIF
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EndM
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; ALIAS R# to MM# registers
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DefineMMxNUM Macro
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MM0 TEXTEQU <0>
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MM1 TEXTEQU <0>
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MM2 TEXTEQU <0>
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MM3 TEXTEQU <0>
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MM4 TEXTEQU <0>
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MM5 TEXTEQU <0>
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MM6 TEXTEQU <0>
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MM7 TEXTEQU <0>
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mm0 TEXTEQU <0>
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mm1 TEXTEQU <0>
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mm2 TEXTEQU <0>
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mm3 TEXTEQU <0>
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mm4 TEXTEQU <0>
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mm5 TEXTEQU <0>
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mm6 TEXTEQU <0>
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mm7 TEXTEQU <0>
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Mm0 TEXTEQU <0>
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Mm1 TEXTEQU <0>
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Mm2 TEXTEQU <0>
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Mm3 TEXTEQU <0>
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Mm4 TEXTEQU <0>
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Mm5 TEXTEQU <0>
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Mm6 TEXTEQU <0>
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Mm7 TEXTEQU <0>
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mM0 TEXTEQU <0>
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mM1 TEXTEQU <0>
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mM2 TEXTEQU <0>
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mM3 TEXTEQU <0>
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mM4 TEXTEQU <0>
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mM5 TEXTEQU <0>
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mM6 TEXTEQU <0>
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mM7 TEXTEQU <0>
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EndM
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UnDefineMMxRegs Macro
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MM0 TEXTEQU <MM0>
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MM1 TEXTEQU <MM1>
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MM2 TEXTEQU <MM2>
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MM3 TEXTEQU <MM3>
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MM4 TEXTEQU <MM4>
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MM5 TEXTEQU <MM5>
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MM6 TEXTEQU <MM6>
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MM7 TEXTEQU <MM7>
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mm0 TEXTEQU <mm0>
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mm1 TEXTEQU <mm1>
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mm2 TEXTEQU <mm2>
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mm3 TEXTEQU <mm3>
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mm4 TEXTEQU <mm4>
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mm5 TEXTEQU <mm5>
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mm6 TEXTEQU <mm6>
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mm7 TEXTEQU <mm7>
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Mm0 TEXTEQU <Mm0>
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Mm1 TEXTEQU <Mm1>
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Mm2 TEXTEQU <Mm2>
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Mm3 TEXTEQU <Mm3>
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Mm4 TEXTEQU <Mm4>
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Mm5 TEXTEQU <Mm5>
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Mm6 TEXTEQU <Mm6>
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Mm7 TEXTEQU <Mm7>
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mM0 TEXTEQU <mM0>
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mM1 TEXTEQU <mM1>
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mM2 TEXTEQU <mM2>
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mM3 TEXTEQU <mM3>
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mM4 TEXTEQU <mM4>
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mM5 TEXTEQU <mM5>
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mM6 TEXTEQU <mM6>
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mM7 TEXTEQU <mM7>
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EndM
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rdpmc macro
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db 0fh, opc_Rdpmc
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endm
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emms macro
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db 0fh, opc_Emms
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endm
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movd macro dst:req, src:req
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local x, y
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DefineMMxNUM
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IF (OPATTR(dst)) AND 00010000y ; register
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DefineMMxRegs
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x:
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cmpxchg dst, src
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y:
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org x+1
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byte opc_Movd_st
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org y
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UnDefineMMxRegs
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ELSE
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DefineMMxRegs
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IF (OPATTR(dst)) AND 00010000y ; register
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Movd_ld
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org y
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ELSE
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x:
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cmpxchg dst, src
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y:
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org x+1
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byte opc_Movd_st
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org y
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ENDIF
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UnDefineMMxRegs
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ENDIF
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endm
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movdt macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Movd_ld
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org y
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UnDefineMMxRegs
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endm
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movdf macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg dst, src
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y:
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org x+1
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byte opc_Movd_st
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org y
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UnDefineMMxRegs
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endm
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movq macro dst:req, src:req
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local x, y
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DefineMMxRegs
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IF (OPATTR(dst)) AND 00010000y ; register
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Movq_ld
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org y
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ELSE
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x:
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cmpxchg dst, src
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y:
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org x+1
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byte opc_Movq_st
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org y
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ENDIF
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UnDefineMMxRegs
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endm
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packssdw macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Packssdw
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org y
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UnDefineMMxRegs
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endm
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packsswb macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Packsswb
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org y
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UnDefineMMxRegs
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endm
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packuswb macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Packuswb
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org y
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UnDefineMMxRegs
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endm
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paddd macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddd
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org y
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UnDefineMMxRegs
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endm
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paddsb macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddsb
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org y
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UnDefineMMxRegs
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endm
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paddsw macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddsw
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org y
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UnDefineMMxRegs
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endm
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paddusb macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddusb
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org y
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UnDefineMMxRegs
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endm
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paddusw macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddusw
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org y
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UnDefineMMxRegs
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endm
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paddb macro dst:req, src:req
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local x, y
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DefineMMxRegs
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddb
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org y
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UnDefineMMxRegs
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endm
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paddw macro dst:req, src:req
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local x, y
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DefineMMxRegs
|
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x:
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cmpxchg src, dst
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y:
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org x+1
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byte opc_Paddw
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org y
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UnDefineMMxRegs
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endm
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pand macro dst:req, src:req
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local x, y
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DefineMMxRegs
|
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x:
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cmpxchg src, dst
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y:
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|
org x+1
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|
byte opc_Pand
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org y
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UnDefineMMxRegs
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endm
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|
pandn macro dst:req, src:req
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local x, y
|
|
DefineMMxRegs
|
|
x:
|
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cmpxchg src, dst
|
|
y:
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|
org x+1
|
|
byte opc_Pandn
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpeqb macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpeqb
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpeqd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpeqd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpeqw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpeqw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpgtb macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpgtb
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpgtd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpgtd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pcmpgtw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pcmpgtw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pmaddwd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pmaddwd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pmulhw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pmulhw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pmullw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pmullw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
por macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Por
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
|
|
pslld macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
btr dst, src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimd
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pslld
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psllw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
btr dst, src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimw
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psllw
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psrad macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
bt dst, src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimd
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psrad
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psraw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
bt dst, src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimw
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psraw
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psrld macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
cmpxchg dst,MM2
|
|
byte src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimd
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psrld
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psrlq macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
cmpxchg dst,MM2
|
|
byte src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimq
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psrlq
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
|
|
|
|
psllq macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
btr dst, src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimq
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psllq
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
|
|
|
|
psrlw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
IF (OPATTR(src)) AND 00000100y ; constant
|
|
x:
|
|
cmpxchg dst,MM2
|
|
byte src
|
|
y:
|
|
org x+1
|
|
byte opc_PSHimw
|
|
org y
|
|
ELSE
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psrlw
|
|
org y
|
|
ENDIF
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubsb macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubsb
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubsw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubsw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubusb macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubusb
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubusw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubusw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubb macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubb
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpcklbw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpcklbw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpckhdq macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpckhdq
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpcklwd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpcklwd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpckhbw macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpckhbw
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpckldq macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpckldq
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
punpckhwd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Punpckhwd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
pxor macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Pxor
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|
|
|
|
psubd macro dst:req, src:req
|
|
local x, y
|
|
DefineMMxRegs
|
|
x:
|
|
cmpxchg src, dst
|
|
y:
|
|
org x+1
|
|
byte opc_Psubd
|
|
org y
|
|
UnDefineMMxRegs
|
|
endm
|