forked from AbleOS/ableos
132 lines
3.8 KiB
Rust
132 lines
3.8 KiB
Rust
use x86_64::structures::paging::{FrameAllocator, FrameDeallocator};
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// FIXME: platform agnostic paging stuff
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use x86_64::structures::paging::{PhysFrame, Size4KiB, mapper::MapToError, Mapper, Page};
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use x86_64::VirtAddr;
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use crate::arch::memory::BootInfoFrameAllocator;
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use super::{PciDeviceInfo, check_device};
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const PRDT_START: u64 = 0x_ffff_ffff_0000_0000;
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const BUFFER_START: u64 = 0x_ffff_ffff_0000_1000;
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pub struct Piix {
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device_info: PciDeviceInfo,
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prdt_frame: Option<PhysFrame>,
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buffer_frames: Option<Vec<PhysFrame>>,
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}
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impl Piix {
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pub fn new(bus: u8, device: u8) -> Option<Self> {
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let device_info = check_device(bus, device)?;
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trace!("device_info: {device_info}");
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Some(Self {
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device_info,
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prdt_frame: None,
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buffer_frames: None,
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})
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}
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pub fn allocate_dma_frame(
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&mut self,
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mapper: &mut impl Mapper<Size4KiB>,
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frame_allocator: &mut BootInfoFrameAllocator,
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) -> Result<(), MapToError<Size4KiB>> {
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use x86_64::structures::paging::PageTableFlags as Flags;
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let prdt_frame = frame_allocator.allocate_frame()
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.ok_or(MapToError::FrameAllocationFailed)?;
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let buffer_frames = {
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let mut frame = frame_allocator.allocate_frame()
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.ok_or(MapToError::FrameAllocationFailed)?;
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while !frame.start_address().is_aligned(0x10000u64) {
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unsafe {
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frame_allocator.deallocate_frame(frame);
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}
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frame = frame_allocator.allocate_frame()
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.ok_or(MapToError::FrameAllocationFailed)?;
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}
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let mut frames = Vec::with_capacity(16);
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frames.push(frame);
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for _ in 0..15 {
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let frame = frame_allocator.allocate_frame()
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.ok_or(MapToError::FrameAllocationFailed)?;;
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frames.push(frame);
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}
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frames
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};
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let flags = Flags::NO_CACHE | Flags::PRESENT | Flags::WRITABLE;
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unsafe {
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mapper.map_to(
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Page::containing_address(VirtAddr::new(PRDT_START)),
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prdt_frame,
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flags,
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frame_allocator,
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)?.flush();
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for (i, frame) in buffer_frames.iter().enumerate() {
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mapper.map_to(
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Page::containing_address(VirtAddr::new(BUFFER_START + i as u64 * 0x1000)),
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*frame,
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flags,
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frame_allocator,
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)?.flush()
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}
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}
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trace!("prdt_frame: {prdt_frame:?}");
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trace!("buffer_frames: {buffer_frames:?}");
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self.prdt_frame = Some(prdt_frame);
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self.buffer_frames = Some(buffer_frames);
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Ok(())
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}
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pub fn read(&self) {
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// bus master interface base address
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let bmiba = self.device_info.bars[4] as *mut BusMasterInterface;
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// bmiba.bmidtpp = prdt;
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}
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}
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#[derive(Copy, Clone, Debug)]
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#[repr(C, packed)]
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struct BusMasterInterface {
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/// Bus Master IDE Command (primary)
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pub bmicp: u8,
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/// Reserved
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pub _0: u8,
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/// Bus Master IDE Status (primary)
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pub bmisp: u8,
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/// Reserved
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pub _1: u8,
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/// Bus Master IDE Descriptor Table Pointer (primary)
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pub bmidtpp: u32,
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/// Bus Master IDE Command (secondary)
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pub bmics: u8,
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/// Reserved
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pub _2: u8,
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/// Bus Master IDE Status (secondary)
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pub bmiss: u8,
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/// Reserved
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pub _3: u8,
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/// Bus Master IDE Descriptor Table Pointer (secondary)
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pub bmidtps: u32,
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}
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#[repr(C, packed)]
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struct PhysRegionDescriptor {
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/// Pointer to the data buffer
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pub data_buffer: u32,
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/// Byte count, 64K maximum per PRD transfer
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pub byte_count: u16,
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/// Reserved byte
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pub _0: u8,
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/// MSB marks end of transfer
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pub eot: u8,
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}
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