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LI8 and ADD8 are working now :D

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Bee 2023-11-15 14:30:43 -05:00
parent 2a2da899c7
commit 2bebf3a9ed
6 changed files with 65306 additions and 15 deletions
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1
.gitignore vendored
View file

@ -2,3 +2,4 @@ impl/
**/*.gprj **/*.gprj
tests/*.vcd tests/*.vcd
tests/out tests/out
src/gowin_*/

4
holeybeepo.gprj.user
View file

@ -3,7 +3,7 @@
<UserConfig> <UserConfig>
<Version>1.0</Version> <Version>1.0</Version>
<FlowState> <FlowState>
<Process ID="Synthesis" State="2"/> <Process ID="Synthesis" State="4"/>
<Process ID="Pnr" State="4"/> <Process ID="Pnr" State="4"/>
<Process ID="Gao" State="4"/> <Process ID="Gao" State="4"/>
<Process ID="Rtl_Gao" State="2"/> <Process ID="Rtl_Gao" State="2"/>
@ -20,5 +20,5 @@
<ResultFile ResultFileType="RES.syn.report" ResultFilePath="impl/gwsynthesis/holeybeepo_syn.rpt.html"/> <ResultFile ResultFileType="RES.syn.report" ResultFilePath="impl/gwsynthesis/holeybeepo_syn.rpt.html"/>
<ResultFile ResultFileType="RES.syn.resource" ResultFilePath="impl/gwsynthesis/holeybeepo_syn_rsc.xml"/> <ResultFile ResultFileType="RES.syn.resource" ResultFilePath="impl/gwsynthesis/holeybeepo_syn_rsc.xml"/>
</ResultFileList> </ResultFileList>
<Ui>000000ff00000001fd00000002000000000000010000000250fc0200000001fc00000038000002500000008a01000018fa000000000200000004fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000005600fffffffb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000007100fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000005200fffffffb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff00000000000000000000000300000776000000f2fc0100000001fc0000000000000776000000a500fffffffa000000000100000003fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000004700fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000a500fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000000000000000000006700000025000000004000000040000000800000008fc000000010000000200000004000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e0045006400690074010000009bffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c00730100000157ffffffff0000000000000000ffffffff0100000207ffffffff0000000000000000</Ui> <Ui>000000ff00000001fd00000002000000000000010000000250fc0200000001fc00000038000002500000000000fffffffaffffffff0200000004fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000000000000000fb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000000000000000fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000000000000000fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff00000000000000000000000300000776000000f2fc0100000001fc00000000000007760000000000fffffffaffffffff0100000003fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000000000000000fb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff0000000000000000fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000000000000000000006700000025000000004000000040000000800000008fc000000010000000200000003000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e0045006400690074010000009bffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c00730100000157ffffffff0000000000000000</Ui>
</UserConfig> </UserConfig>

23
src/beepo.v
View file

@ -30,6 +30,7 @@ module Beepo #(
localparam NUM_REGS = 4; localparam NUM_REGS = 4;
reg [2:0] r_state = IDLE; reg [2:0] r_state = IDLE;
reg [63:0] r_tick = 0;
// UART tx // UART tx
reg [7:0] r_tx_data = 0; reg [7:0] r_tx_data = 0;
@ -64,6 +65,8 @@ module Beepo #(
always @(r_registers[1]) r_tx_data <= r_registers[1]; always @(r_registers[1]) r_tx_data <= r_registers[1];
always @(posedge i_clk) r_tick <= r_tick + 1;
always @(posedge i_clk) begin always @(posedge i_clk) begin
case (r_state) case (r_state)
IDLE: begin IDLE: begin
@ -107,13 +110,13 @@ module Beepo #(
else begin else begin
case (r_arg_current_type) case (r_arg_current_type)
ARG_R: r_arg_regs[r_arg_index] <= w_mem_fetch; ARG_R: r_arg_regs[r_arg_index] <= w_mem_fetch;
ARG_O: r_arg_addr[r_arg_bit-1+:8] <= w_mem_fetch; ARG_O: r_arg_addr[r_arg_bit+:8] <= w_mem_fetch;
ARG_P: r_arg_addr[r_arg_bit-1+:8] <= w_mem_fetch; ARG_P: r_arg_addr[r_arg_bit+:8] <= w_mem_fetch;
ARG_B: r_arg_imm[r_arg_bit-1+:8] <= w_mem_fetch; ARG_B: r_arg_imm[r_arg_bit+:8] <= w_mem_fetch;
ARG_H: r_arg_imm[r_arg_bit-1+:8] <= w_mem_fetch; ARG_H: r_arg_imm[r_arg_bit+:8] <= w_mem_fetch;
ARG_W: r_arg_imm[r_arg_bit-1+:8] <= w_mem_fetch; ARG_W: r_arg_imm[r_arg_bit+:8] <= w_mem_fetch;
ARG_D: r_arg_imm[r_arg_bit-1+:8] <= w_mem_fetch; ARG_D: r_arg_imm[r_arg_bit+:8] <= w_mem_fetch;
ARG_A: r_arg_addr[r_arg_bit-1+:8] <= w_mem_fetch; ARG_A: r_arg_addr[r_arg_bit+:8] <= w_mem_fetch;
endcase endcase
r_pc_latch <= r_pc; r_pc_latch <= r_pc;
@ -129,7 +132,7 @@ module Beepo #(
if (r_arg_current_type == ARG_N) r_state <= EXEC; if (r_arg_current_type == ARG_N) r_state <= EXEC;
else begin else begin
r_arg_bit <= 0; r_arg_bit <= 0;
r_arg_bytes <= ARG_SIZES[r_arg_current_type+:4]; r_arg_bytes <= ARG_SIZES[r_arg_current_type*4+:4];
case (r_arg_current_type) case (r_arg_current_type)
ARG_R: r_arg_regs[r_arg_index] <= 0; ARG_R: r_arg_regs[r_arg_index] <= 0;
@ -147,11 +150,11 @@ module Beepo #(
end end
EXEC: begin EXEC: begin
case (r_instr) case (r_instr)
`ADD8: set_register(r_arg_regs[0], r_arg_regs[1] + r_arg_regs[2][7:0]); `ADD8: set_register(r_arg_regs[0], r_registers[r_arg_regs[1]] + r_registers[r_arg_regs[2]][7:0]);
`LI8: set_register(r_arg_regs[0], r_arg_imm); `LI8: set_register(r_arg_regs[0], r_arg_imm);
endcase endcase
r_state <= IDLE; r_state <= FETCHI;
end end
endcase endcase
end end

65280
src/first.mi
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File diff suppressed because it is too large Load diff

3
tests/beepo.v
View file

@ -19,7 +19,8 @@ always #(CLK_PERIOD/2) clk=~clk;
initial begin initial begin
$dumpfile("dump.vcd"); $dumpfile("dump.vcd");
$dumpvars(0, tb_beepo, bep.r_registers[1], $dumpvars(0, tb_beepo,
bep.r_registers[1], bep.r_registers[2],
bep.r_arg_types[0], bep.r_arg_types[1], bep.r_arg_types[0], bep.r_arg_types[1],
bep.r_arg_types[2], bep.r_arg_types[3], bep.r_arg_types[2], bep.r_arg_types[3],
bep.r_arg_regs[0], bep.r_arg_regs[1], bep.r_arg_regs[0], bep.r_arg_regs[1],

8
tests/spmem.v
View file

@ -16,5 +16,11 @@ module spMem(
168'h0 168'h0
}; };
assign dout = mem[ad*8+:8]; reg [7:0] r_out;
assign dout = r_out;
always @(negedge clk) begin
r_out <= mem[ad*8+:8];
end
endmodule endmodule