haha nevermind it's just uart
This commit is contained in:
parent
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commit
a1fbfe1188
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@ -20,5 +20,5 @@
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<ResultFile ResultFileType="RES.syn.report" ResultFilePath="impl/gwsynthesis/holeybeepo_syn.rpt.html"/>
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<ResultFile ResultFileType="RES.syn.report" ResultFilePath="impl/gwsynthesis/holeybeepo_syn.rpt.html"/>
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<ResultFile ResultFileType="RES.syn.resource" ResultFilePath="impl/gwsynthesis/holeybeepo_syn_rsc.xml"/>
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<ResultFile ResultFileType="RES.syn.resource" ResultFilePath="impl/gwsynthesis/holeybeepo_syn_rsc.xml"/>
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</ResultFileList>
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</ResultFileList>
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<Ui>000000ff00000001fd000000020000000000000100000002cafc0200000001fc00000038000002ca0000008a01000018fa000000020200000004fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000005600fffffffb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000007100fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000005200fffffffb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff00000000000000000000000300000776000000f2fc0100000001fc0000000000000776000000a500fffffffa000000000100000003fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000004700fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000a500fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff000000000000000000000670000002ca00000004000000040000000800000008fc000000010000000200000004000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e0045006400690074010000009bffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c00730100000157ffffffff0000000000000000ffffffff0100000207ffffffff0000000000000000</Ui>
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<Ui>000000ff00000001fd000000020000000000000100000002cafc0200000001fc00000038000002ca0000008a01000018fa000000000200000004fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000005600fffffffb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000007100fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000005200fffffffb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff00000000000000000000000300000776000000f2fc0100000001fc0000000000000776000000a500fffffffa000000000100000003fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000004700fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000a500fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff000000000000000000000670000002ca00000004000000040000000800000008fc000000010000000200000004000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e0045006400690074010000009bffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c00730100000157ffffffff0000000000000000ffffffff0100000207ffffffff0000000000000000</Ui>
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</UserConfig>
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</UserConfig>
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11
src/beepo.v
11
src/beepo.v
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@ -5,7 +5,9 @@ module Beepo #(
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) (
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) (
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input i_clk,
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input i_clk,
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input i_button1,
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input i_button1,
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output o_uart_tx
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output o_uart_tx,
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output [6:0] o_segments_drive,
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output [3:0] o_displays_neg
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);
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);
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// State values
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// State values
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localparam IDLE = 0; // Start fetching instruction
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localparam IDLE = 0; // Start fetching instruction
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@ -192,6 +194,13 @@ module Beepo #(
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.tx_pin(o_uart_tx)
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.tx_pin(o_uart_tx)
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);
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);
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Multi7 display (
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.i_clk(i_clk),
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.i_hex({r_registers[1][7:0], r_registers[2][7:0]}),
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.o_segments_drive(o_segments_drive),
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.o_displays_neg(o_displays_neg)
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);
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// TODO: Bus
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// TODO: Bus
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// For now this is just ROM
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// For now this is just ROM
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spMem memory (
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spMem memory (
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@ -11,3 +11,25 @@ IO_LOC "o_uart_tx" 69;
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IO_PORT "o_uart_tx" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_PORT "o_uart_tx" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "i_clk" 4;
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IO_LOC "i_clk" 4;
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IO_PORT "i_clk" PULL_MODE=UP BANK_VCCIO=1.8;
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IO_PORT "i_clk" PULL_MODE=UP BANK_VCCIO=1.8;
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IO_LOC "o_displays_neg[3]" 80;
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IO_PORT "o_displays_neg[3]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_displays_neg[2]" 76;
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IO_PORT "o_displays_neg[2]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_displays_neg[1]" 73;
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IO_PORT "o_displays_neg[1]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_displays_neg[0]" 74;
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IO_PORT "o_displays_neg[0]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[6]" 20;
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IO_PORT "o_segments_drive[6]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[5]" 19;
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IO_PORT "o_segments_drive[5]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[4]" 86;
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IO_PORT "o_segments_drive[4]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[3]" 53;
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IO_PORT "o_segments_drive[3]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[2]" 71;
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IO_PORT "o_segments_drive[2]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[1]" 18;
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IO_PORT "o_segments_drive[1]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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IO_LOC "o_segments_drive[0]" 72;
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IO_PORT "o_segments_drive[0]" PULL_MODE=UP DRIVE=8 BANK_VCCIO=1.8;
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112
src/multi7.v
Normal file
112
src/multi7.v
Normal file
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@ -0,0 +1,112 @@
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// displays multiple BCD digits on multiplexed seven segment displays
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module Multi7 #(
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parameter DISPLAYS = 4,
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parameter FREQ = 27_000_000,
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parameter DELAY_US = 5000,
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parameter integer DELAY = FREQ * (DELAY_US / 1_000_000.0),
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parameter ENABLE_HEX = 1,
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parameter ENABLE_CUSTOM = 0
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) (
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i_clk,
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i_hex,
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i_custom,
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i_mode, // if hex and custom are both enabled, 0 selects hex mode and 1 selects custom
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o_segments_drive,
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o_displays_neg
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);
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localparam d_0 = 7'b1111110;
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localparam d_1 = 7'b0110000;
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localparam d_2 = 7'b1101101;
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localparam d_3 = 7'b1111001;
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localparam d_4 = 7'b0110011;
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localparam d_5 = 7'b1011011;
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localparam d_6 = 7'b1011111;
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localparam d_7 = 7'b1110000;
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localparam d_8 = 7'b1111111;
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localparam d_9 = 7'b1111011;
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localparam d_a = 7'b1110111;
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localparam d_b = 7'b0011111;
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localparam d_c = 7'b1001110;
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localparam d_d = 7'b0111101;
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localparam d_e = 7'b1001111;
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localparam d_f = 7'b1000111;
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input i_clk, i_mode;
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input [(ENABLE_HEX * (DISPLAYS*4-1)):0] i_hex;
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input [(ENABLE_CUSTOM * (DISPLAYS*7-1)):0] i_custom;
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// 6543210
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// gfedcba
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output [6:0] o_segments_drive;
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output [(DISPLAYS-1):0] o_displays_neg;
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reg [$clog2(DELAY):0] r_tick = 0;
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reg [(DISPLAYS*7-1):0] r_hex_state;
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reg [$clog2(DISPLAYS):0] r_display_select = 0;
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reg [(DISPLAYS-1):0] r_displays_neg = ~1;
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reg [6:0] r_display_output;
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assign o_segments_drive = r_display_output;
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assign o_displays_neg = r_displays_neg;
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always @(posedge i_clk) begin
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if (r_tick == DELAY - 1) begin
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r_tick <= 0;
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r_displays_neg <= (r_displays_neg << 1) | r_displays_neg[DISPLAYS-1];
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if (r_display_select == DISPLAYS - 1) begin
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r_display_select <= 0;
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end else begin
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r_display_select <= r_display_select + 1;
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end
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end else begin
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r_tick <= r_tick + 1;
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end
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end
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generate
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if (ENABLE_HEX) begin
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for (genvar i = 0; i < DISPLAYS; i = i + 1) begin
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localparam TOP = i * 4 + 4 - 1;
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localparam BOTTOM = i * 4;
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localparam G = i * 7 + 7 - 1;
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localparam A = i * 7;
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always @(i_hex[(TOP):(BOTTOM)]) begin
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case (i_hex[(TOP):(BOTTOM)])
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4'h0: r_hex_state[G:A] <= d_0;
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4'h1: r_hex_state[G:A] <= d_1;
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4'h2: r_hex_state[G:A] <= d_2;
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4'h3: r_hex_state[G:A] <= d_3;
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4'h4: r_hex_state[G:A] <= d_4;
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4'h5: r_hex_state[G:A] <= d_5;
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4'h6: r_hex_state[G:A] <= d_6;
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4'h7: r_hex_state[G:A] <= d_7;
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4'h8: r_hex_state[G:A] <= d_8;
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4'h9: r_hex_state[G:A] <= d_9;
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4'hA: r_hex_state[G:A] <= d_a;
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4'hB: r_hex_state[G:A] <= d_b;
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4'hC: r_hex_state[G:A] <= d_c;
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4'hD: r_hex_state[G:A] <= d_d;
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4'hE: r_hex_state[G:A] <= d_e;
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4'hF: r_hex_state[G:A] <= d_f;
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endcase
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end
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end
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end
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endgenerate
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generate
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if (ENABLE_HEX && ENABLE_CUSTOM) begin
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always @(r_hex_state or i_custom or i_mode or r_display_select)
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r_display_output <= (i_mode ? i_custom : r_hex_state) >> (r_display_select * 7);
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end else if (ENABLE_HEX) begin
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always @(r_hex_state or r_display_select)
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r_display_output <= r_hex_state >> (r_display_select * 7);
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end else if (ENABLE_CUSTOM) begin
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always @(i_custom or r_display_select)
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r_display_output <= i_custom >> (r_display_select * 7);
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end
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endgenerate
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endmodule
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