From 2a83ff75cae82bf7c7719ed6143ec6ac49ce023f Mon Sep 17 00:00:00 2001 From: Erin Date: Sun, 1 Oct 2023 01:52:26 +0200 Subject: [PATCH] Sus2 --- hbbytecode/instructions.in | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hbbytecode/instructions.in b/hbbytecode/instructions.in index 398a4e3..fb125dd 100644 --- a/hbbytecode/instructions.in +++ b/hbbytecode/instructions.in @@ -1,23 +1,23 @@ // OPCODE, MNEMONIC, TYPE, DOC; -0, UN, N, "Cause an unreachable code trap" ; -1, TX, N, "Termiante execution" ; -2, NOP, N, "Do nothing" ; +0, UN, N, "Cause an unreachable code trap" ; +1, TX, N, "Termiante execution" ; +2, NOP, N, "Do nothing" ; -3, ADD, RRR, "Addition" ; -4, SUB, RRR, "Subtraction" ; -5, MUL, RRR, "Multiplication" ; -6, AND, RRR, "Bitand" ; -7, OR, RRR, "Bitor" ; -8, XOR, RRR, "Bitxor" ; -9, SL, RRR, "Unsigned left bitshift" ; +3, ADD, RRR, "Addition" ; +4, SUB, RRR, "Subtraction" ; +5, MUL, RRR, "Multiplication" ; +6, AND, RRR, "Bitand" ; +7, OR, RRR, "Bitor" ; +8, XOR, RRR, "Bitxor" ; +9, SL, RRR, "Unsigned left bitshift" ; 10, SR, RRR, "Unsigned right bitshift" ; 11, SRS, RRR, "Signed right bitshift" ; 12, CMP, RRR, "Signed comparsion" ; 13, CMPU, RRR, "Unsigned comparsion" ; 14, DIR, RRRR, "Merged divide-remainder" ; 15, NEG, RR, "Bit negation" ; -15, NOT, RR, "Logical negation" ; +16, NOT, RR, "Logical negation" ; 17, ADDI, RRD, "Addition with immediate" ; 18, MULI, RRD, "Multiplication with immediate" ; 19, ANDI, RRD, "Bitand with immediate" ;