bee/holey-bytes
1
0
Fork 0
forked from AbleOS/holey-bytes
Code Issues Pull requests Packages Projects Releases Wiki Activity

Changed CMP handling and added simple JMP

Browse source
This commit is contained in:
Erin 2023-09-15 08:42:56 +02:00 committed by ondra05
parent dcd692405e
commit 65e05c809c
4 changed files with 62 additions and 53 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
hbbytecode/hbbytecode.h
View file

@ -18,10 +18,10 @@ enum hbbc_Opcode: uint8_t {
hbbc_Op_CMP , hbbc_Op_CMPU , hbbc_Op_DIR , hbbc_Op_NEG , hbbc_Op_NOT , hbbc_Op_ADDI , hbbc_Op_CMP , hbbc_Op_CMPU , hbbc_Op_DIR , hbbc_Op_NEG , hbbc_Op_NOT , hbbc_Op_ADDI ,
hbbc_Op_MULI , hbbc_Op_ANDI , hbbc_Op_ORI , hbbc_Op_XORI , hbbc_Op_SLI , hbbc_Op_SRI , hbbc_Op_MULI , hbbc_Op_ANDI , hbbc_Op_ORI , hbbc_Op_XORI , hbbc_Op_SLI , hbbc_Op_SRI ,
hbbc_Op_SRSI , hbbc_Op_CMPI , hbbc_Op_CMPUI , hbbc_Op_CP , hbbc_Op_SWA , hbbc_Op_LI , hbbc_Op_SRSI , hbbc_Op_CMPI , hbbc_Op_CMPUI , hbbc_Op_CP , hbbc_Op_SWA , hbbc_Op_LI ,
hbbc_Op_LD , hbbc_Op_ST , hbbc_Op_BMC , hbbc_Op_BRC , hbbc_Op_JMP , hbbc_Op_JEQ , hbbc_Op_LD , hbbc_Op_ST , hbbc_Op_BMC , hbbc_Op_BRC , hbbc_Op_JMP , hbbc_Op_JAL ,
hbbc_Op_JNE , hbbc_Op_JLT , hbbc_Op_JGT , hbbc_Op_JLTU , hbbc_Op_JGTU , hbbc_Op_ECALL , hbbc_Op_JEQ , hbbc_Op_JNE , hbbc_Op_JLT , hbbc_Op_JGT , hbbc_Op_JLTU , hbbc_Op_JGTU ,
hbbc_Op_ADDF , hbbc_Op_SUBF , hbbc_Op_MULF , hbbc_Op_DIRF , hbbc_Op_FMAF , hbbc_Op_NEGF , hbbc_Op_ECALL , hbbc_Op_ADDF , hbbc_Op_SUBF , hbbc_Op_MULF , hbbc_Op_DIRF , hbbc_Op_FMAF ,
hbbc_Op_ITF , hbbc_Op_FTI , hbbc_Op_ADDFI , hbbc_Op_MULFI , hbbc_Op_NEGF , hbbc_Op_ITF , hbbc_Op_FTI , hbbc_Op_ADDFI , hbbc_Op_MULFI ,
} typedef hbbc_Opcode; } typedef hbbc_Opcode;
static_assert(sizeof(hbbc_Opcode) == 1); static_assert(sizeof(hbbc_Opcode) == 1);

37
hbbytecode/src/lib.rs
View file

@ -110,26 +110,27 @@ constmod!(pub opcode(u8) {
BMC = 32, "BBD; [#0] ← [#1], imm #2 bytes"; BMC = 32, "BBD; [#0] ← [#1], imm #2 bytes";
BRC = 33, "BBB; #0 ← #1, imm #2 registers"; BRC = 33, "BBB; #0 ← #1, imm #2 registers";
JAL = 34, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]"; JMP = 34, "D; Unconditional, non-linking absolute jump";
JEQ = 35, "BBD; if #0 = #1 → jump imm #2"; JAL = 35, "BD; Copy PC to #0 and unconditional jump [#1 + imm #2]";
JNE = 36, "BBD; if #0 ≠ #1 → jump imm #2"; JEQ = 36, "BBD; if #0 = #1 → jump imm #2";
JLT = 37, "BBD; if #0 < #1 → jump imm #2"; JNE = 37, "BBD; if #0 ≠ #1 → jump imm #2";
JGT = 38, "BBD; if #0 > #1 → jump imm #2"; JLT = 38, "BBD; if #0 < #1 → jump imm #2";
JLTU = 39, "BBD; if #0 < #1 → jump imm #2 (unsigned)"; JGT = 39, "BBD; if #0 > #1 → jump imm #2";
JGTU = 40, "BBD; if #0 > #1 → jump imm #2 (unsigned)"; JLTU = 40, "BBD; if #0 < #1 → jump imm #2 (unsigned)";
ECALL = 41, "N; Issue system call"; JGTU = 41, "BBD; if #0 > #1 → jump imm #2 (unsigned)";
ECALL = 42, "N; Issue system call";
ADDF = 42, "BBB; #0 ← #1 +. #2"; ADDF = 43, "BBB; #0 ← #1 +. #2";
SUBF = 43, "BBB; #0 ← #1 -. #2"; SUBF = 44, "BBB; #0 ← #1 -. #2";
MULF = 44, "BBB; #0 ← #1 +. #2"; MULF = 45, "BBB; #0 ← #1 +. #2";
DIRF = 45, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3"; DIRF = 46, "BBBB; #0 ← #2 / #3, #1 ← #2 % #3";
FMAF = 46, "BBBB; #0 ← (#1 * #2) + #3"; FMAF = 47, "BBBB; #0 ← (#1 * #2) + #3";
NEGF = 47, "BB; #0 ← -#1"; NEGF = 48, "BB; #0 ← -#1";
ITF = 48, "BB; #0 ← #1 as float"; ITF = 49, "BB; #0 ← #1 as float";
FTI = 49, "BB; #0 ← #1 as int"; FTI = 50, "BB; #0 ← #1 as int";
ADDFI = 50, "BBD; #0 ← #1 +. imm #2"; ADDFI = 51, "BBD; #0 ← #1 +. imm #2";
MULFI = 51, "BBD; #0 ← #1 *. imm #2"; MULFI = 52, "BBD; #0 ← #1 *. imm #2";
}); });
#[repr(packed)] #[repr(packed)]

10
hbvm/src/vmrun.rs
View file

@ -73,9 +73,9 @@ where
SRS => self.binary_op(|l, r| i64::wrapping_shl(l, r as u32)), SRS => self.binary_op(|l, r| i64::wrapping_shl(l, r as u32)),
CMP => { CMP => {
// Compare a0 <=> a1 // Compare a0 <=> a1
// < → -1 // < → 0
// > → 1 // > → 1
// = → 0 // = → 2
let ParamBBB(tg, a0, a1) = self.decode(); let ParamBBB(tg, a0, a1) = self.decode();
self.write_reg( self.write_reg(
@ -83,7 +83,8 @@ where
self.read_reg(a0) self.read_reg(a0)
.cast::<i64>() .cast::<i64>()
.cmp(&self.read_reg(a1).cast::<i64>()) .cmp(&self.read_reg(a1).cast::<i64>())
as i64, as i64
+ 1,
); );
} }
CMPU => { CMPU => {
@ -94,7 +95,8 @@ where
self.read_reg(a0) self.read_reg(a0)
.cast::<u64>() .cast::<u64>()
.cmp(&self.read_reg(a1).cast::<u64>()) .cmp(&self.read_reg(a1).cast::<u64>())
as i64, as i64
+ 1,
); );
} }
NOT => { NOT => {

48
spec.md
View file

@ -68,9 +68,9 @@
#### Comparsion table #### Comparsion table
| #1 *op* #2 | Result | | #1 *op* #2 | Result |
|:----------:|:------:| |:----------:|:------:|
| < | -1 | | < | 0 |
| = | 0 | | = | 1 |
| > | 1 | | > | 2 |
### Division-remainder ### Division-remainder
- Type BBBB - Type BBBB
@ -179,11 +179,17 @@
## Control flow ## Control flow
### Unconditional jump ### Unconditional jump
- Type D
| Opcode | Name | Action |
|:------:|:----:|:-------------------------------:|
| 34 | JMP | Unconditional, non-linking jump |
### Unconditional linking jump
- Type BBD - Type BBD
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:--------------------------------------------------:| |:------:|:----:|:--------------------------------------------------:|
| 34 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` | | 35 | JAL | Save PC past JAL to `#0` and jump at `#1 + imm #2` |
### Conditional jumps ### Conditional jumps
- Type BBD - Type BBD
@ -191,19 +197,19 @@
| Opcode | Name | Comparsion | | Opcode | Name | Comparsion |
|:------:|:----:|:------------:| |:------:|:----:|:------------:|
| 35 | JEQ | = | | 36 | JEQ | = |
| 36 | JNE | ≠ | | 37 | JNE | ≠ |
| 37 | JLT | < (signed) | | 38 | JLT | < (signed) |
| 38 | JGT | > (signed) | | 39 | JGT | > (signed) |
| 39 | JLTU | < (unsigned) | | 40 | JLTU | < (unsigned) |
| 40 | JGTU | > (unsigned) | | 41 | JGTU | > (unsigned) |
### Environment call ### Environment call
- Type N - Type N
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:-----:|:-------------------------------------:| |:------:|:-----:|:-------------------------------------:|
| 41 | ECALL | Cause an trap to the host environment | | 42 | ECALL | Cause an trap to the host environment |
## Floating point operations ## Floating point operations
- Type BBB - Type BBB
@ -211,29 +217,29 @@
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:--------------:| |:------:|:----:|:--------------:|
| 42 | ADDF | Addition | | 43 | ADDF | Addition |
| 43 | SUBF | Subtraction | | 44 | SUBF | Subtraction |
| 44 | MULF | Multiplication | | 45 | MULF | Multiplication |
### Division-remainder ### Division-remainder
- Type BBBB - Type BBBB
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:-------------------------:| |:------:|:----:|:-------------------------:|
| 45 | DIRF | Same as for integer `DIR` | | 46 | DIRF | Same as for integer `DIR` |
### Fused Multiply-Add ### Fused Multiply-Add
- Type BBBB - Type BBBB
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:---------------------:| |:------:|:----:|:---------------------:|
| 46 | FMAF | `#0 ← (#1 * #2) + #3` | | 47 | FMAF | `#0 ← (#1 * #2) + #3` |
### Negation ### Negation
- Type BB - Type BB
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:----------:| |:------:|:----:|:----------:|
| 47 | NEGF | `#0 ← -#1` | | 48 | NEGF | `#0 ← -#1` |
### Conversion ### Conversion
- Type BB - Type BB
@ -242,8 +248,8 @@
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:----:|:------------:| |:------:|:----:|:------------:|
| 48 | ITF | Int to Float | | 49 | ITF | Int to Float |
| 49 | FTI | Float to Int | | 50 | FTI | Float to Int |
## Floating point immediate operations ## Floating point immediate operations
- Type BBD - Type BBD
@ -251,8 +257,8 @@
| Opcode | Name | Action | | Opcode | Name | Action |
|:------:|:-----:|:--------------:| |:------:|:-----:|:--------------:|
| 50 | ADDFI | Addition | | 51 | ADDFI | Addition |
| 51 | MULFI | Multiplication | | 52 | MULFI | Multiplication |
# Registers # Registers
- There is 255 registers + one zero register (with index 0) - There is 255 registers + one zero register (with index 0)