forked from AbleOS/ableos
269 lines
8.9 KiB
Rust
269 lines
8.9 KiB
Rust
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use core::num;
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use alloc::boxed::Box;
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use spin::{Mutex, Once};
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use crate::memory::{MemoryManager, PhysicalAddress, VirtualAddress};
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use super::PAGE_SIZE;
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pub enum PageSize {
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Size4KiB,
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Size2MiB,
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Size1GiB,
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// FIXME: SV48 support
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// Size512GiB,
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// FIXME: SV57 support
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// Size256TiB,
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}
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impl PageSize {
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fn level(&self) -> usize {
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match self {
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PageSize::Size4KiB => 0,
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PageSize::Size2MiB => 1,
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PageSize::Size1GiB => 2,
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// FIXME: SV48 and SV57 support
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}
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}
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}
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pub struct PageTable {
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entries: [PageEntry; 512]
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}
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impl PageTable {
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/// Walk the page table to convert a virtual address to a physical address.
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/// If a page fault would occur, this returns None. Otherwise, it returns the physical address.
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pub fn virt_to_phys(&self, vaddr: VirtualAddress) -> Option<PhysicalAddress> {
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let vpn = vaddr.vpns();
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let mut v = &self.entries[vpn[2]];
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for i in (0..=2).rev() {
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if v.is_invalid() {
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// This is an invalid entry, page fault.
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break;
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} else if v.is_leaf() {
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// In RISC-V, a leaf can be at any level.
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// The offset mask masks off the PPN. Each PPN is 9 bits and they start at bit #12.
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// So, our formula 12 + i * 9
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let off_mask = (1 << (12 + i * 9)) - 1;
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let vaddr_pgoff = vaddr.as_addr() & off_mask;
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let addr = ((v.entry() << 2) as usize) & !off_mask;
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return Some((addr | vaddr_pgoff).into());
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}
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// Set v to the next entry which is pointed to by this entry.
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// However, the address was shifted right by 2 places when stored in the page table
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// entry, so we shift it left to get it back into place.
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let entry = v.addr().as_ptr::<PageEntry>();
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// We do i - 1 here, however we should get None or Some() above
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// before we do 0 - 1 = -1.
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v = unsafe { entry.add(vpn[i - 1]).as_ref().unwrap() };
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}
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// If we get here, we've exhausted all valid tables and haven't
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// found a leaf.
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None
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}
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/// Maps a virtual address to a physical address
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/// flags should contain only the following:
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/// Read, Write, Execute, User, and/or Global
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/// flags MUST include one or more of the following:
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/// Read, Write, Execute
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/// The valid bit automatically gets added
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pub fn map(&mut self, vaddr: VirtualAddress, paddr: PhysicalAddress, flags: PageEntryFlags, page_size: PageSize) {
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assert!(flags as usize & 0xe != 0);
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let vpn = vaddr.vpns();
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let ppn = paddr.ppns();
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let level = page_size.level();
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let mut v = &mut self.entries[vpn[2]];
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// Now, we're going to traverse the page table and set the bits properly. We expect the root
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// to be valid, however we're required to create anything beyond the root
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for i in (level..2).rev() {
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if v.is_invalid() {
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let mut mm = MEMORY_MANAGER.get().unwrap().lock();
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let page = mm.zallocate_pages(1).unwrap().as_addr();
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v.set_entry((page as usize >> 2) | PageEntryFlags::Valid as usize);
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}
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let entry = v.addr().as_mut_ptr::<PageEntry>();
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v = unsafe { entry.add(vpn[i]).as_mut().unwrap() };
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}
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// When we get here, we should be at VPN[0] and v should be pointing to our entry.
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// The entry structure is Figure 4.18 in the RISC-V Privileged Specification
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let entry = (ppn[2] << 28) as usize // PPN[2] = [53:28]
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| (ppn[1] << 19) as usize // PPN[1] = [27:19]
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| (ppn[0] << 10) as usize // PPN[0] = [18:10]
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| flags as usize // Specified bits, such as User, Read, Write, etc.
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| PageEntryFlags::Valid as usize;
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v.set_entry(entry);
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}
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/// Identity maps a page of memory
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pub fn identity_map(&mut self, addr: PhysicalAddress, flags: PageEntryFlags, page_size: PageSize) {
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// log::debug!("identity mapped {addr}");
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self.map(addr.as_addr().into(), addr, flags, page_size);
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}
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/// Identity maps a range of contiguous memory
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/// This assumes that start <= end
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pub fn identity_map_range(&mut self, start: PhysicalAddress, end: PhysicalAddress, flags: PageEntryFlags) {
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log::debug!("start: {start}, end: {end}");
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let mut mem_addr = start.as_addr() & !(PAGE_SIZE - 1);
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let num_pages = (align_val(end.as_addr(), 12) - mem_addr - 1) / PAGE_SIZE + 1;
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for _ in 0..num_pages {
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// FIXME: we can merge these page entries if possible into Size2MiB or larger entries
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self.identity_map(mem_addr.into(), flags, PageSize::Size4KiB);
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mem_addr += 1 << 12;
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}
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}
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/// Unmaps a page of memory at vaddr
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pub fn unmap(&mut self, vaddr: VirtualAddress) {
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let vpn = vaddr.vpns();
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// Now, we're going to traverse the page table and clear the bits
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let mut v = &mut self.entries[vpn[2]];
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for i in (0..2).rev() {
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if v.is_invalid() {
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// This is an invalid entry, page is already unmapped
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return;
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} else if v.is_leaf() {
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// This is a leaf, which can be at any level
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// In order to make this page unmapped, we need to clear the entry
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v.set_entry(0);
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return;
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}
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let entry = v.addr().as_mut_ptr::<PageEntry>();
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v = unsafe { entry.add(vpn[i]).as_mut().unwrap() };
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}
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// If we're here this is an unmapped page
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return;
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}
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/// Unmaps a range of contiguous memory
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/// This assumes that start <= end
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pub fn unmap_range(&mut self, start: VirtualAddress, end: VirtualAddress) {
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let mut mem_addr = start.as_addr() & !(PAGE_SIZE - 1);
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let num_pages = (align_val(end.as_addr(), 12) - mem_addr) / PAGE_SIZE;
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for _ in 0..num_pages {
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self.unmap(mem_addr.into());
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mem_addr += 1 << 12;
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}
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}
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/// Frees all memory associated with a table.
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/// NOTE: This does NOT free the table directly. This must be freed manually.
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fn destroy(&mut self) {
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for entry in &mut self.entries {
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entry.destroy()
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}
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}
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}
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#[repr(usize)]
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#[derive(Clone, Copy, Debug)]
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pub enum PageEntryFlags {
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None = 0,
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Valid = 1,
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Read = 1 << 1,
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Write = 1 << 2,
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Execute = 1 << 3,
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User = 1 << 4,
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Global = 1 << 5,
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Access = 1 << 6,
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Dirty = 1 << 7,
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// for convenience
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ReadWrite = Self::Read as usize | Self::Write as usize,
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ReadExecute = Self::Read as usize | Self::Execute as usize,
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ReadWriteExecute = Self::Read as usize | Self::Write as usize | Self::Execute as usize,
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UserReadWrite = Self::User as usize | Self::ReadWrite as usize,
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UserReadExecute = Self::User as usize | Self::ReadExecute as usize,
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UserReadWriteExecute = Self::User as usize | Self::ReadWriteExecute as usize,
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}
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struct PageEntry(usize);
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impl PageEntry {
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fn is_valid(&self) -> bool {
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self.0 & PageEntryFlags::Valid as usize != 0
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}
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fn is_invalid(&self) -> bool {
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!self.is_valid()
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}
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fn is_leaf(&self) -> bool {
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self.0 & PageEntryFlags::ReadWriteExecute as usize != 0
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}
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fn is_branch(&self) -> bool {
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!self.is_leaf()
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}
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fn entry(&self) -> usize {
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self.0
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}
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fn set_entry(&mut self, entry: usize) {
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self.0 = entry;
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}
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fn clear_flag(&mut self, flag: PageEntryFlags) {
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self.0 &= !(flag as usize);
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}
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fn set_flag(&mut self, flag: PageEntryFlags) {
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self.0 |= flag as usize;
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}
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fn addr(&self) -> PhysicalAddress {
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((self.entry() as usize & !0x3ff) << 2).into()
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}
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fn destroy(&mut self) {
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if self.is_valid() && self.is_branch() {
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// This is a valid entry so drill down and free
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let memaddr = self.addr();
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let table = memaddr.as_mut_ptr::<PageTable>();
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unsafe {
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(*table).destroy();
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let mut mm = MEMORY_MANAGER.get().unwrap().lock();
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mm.deallocate_pages(memaddr.into(), 0);
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}
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}
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}
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}
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// FIXME: PageTable should be integrated into MemoryManager *somehow*
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pub static MEMORY_MANAGER: Once<Mutex<MemoryManager>> = Once::new();
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pub static PAGE_TABLE: Once<Mutex<PhysicalAddress>> = Once::new();
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pub fn init(start_addr: PhysicalAddress, page_count: usize) {
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let mut memory_manager = MemoryManager::new();
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unsafe {
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memory_manager.add_range(start_addr, page_count);
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PAGE_TABLE.call_once(|| Mutex::new(memory_manager.zallocate_pages(0).unwrap()));
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}
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MEMORY_MANAGER.call_once(|| Mutex::new(memory_manager));
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}
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/// Align (set to a multiple of some power of two)
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/// This function always rounds up.
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fn align_val(val: usize, order: usize) -> usize {
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let o = (1 << order) - 1;
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(val + o) & !o
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}
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