forked from AbleOS/ableos
71 lines
1.9 KiB
Rust
71 lines
1.9 KiB
Rust
//! A not-very-useful abstraction of GPIOs in Rust
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#![allow(dead_code)]
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use core::sync::atomic::{AtomicBool, Ordering::SeqCst};
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const REG_P0_PIN_CNF_BASE: *mut u32 = 0x5000_0700 as *mut u32;
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const REG_P0_OUT_SET: *mut u32 = 0x5000_0508 as *mut u32;
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const REG_P0_OUT_CLR: *mut u32 = 0x5000_050C as *mut u32;
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const PIN_CNF_DIR_OUTPUT: u32 = 0x0000_0001;
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const PIN_CNF_INPUT_CONNECT: u32 = 0x0000_0000;
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const PIN_CNF_PULL_DISABLED: u32 = 0x0000_0000;
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const PIN_CNF_DRIVE_S0S1: u32 = 0x0000_0000;
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const PIN_CNF_SENSE_DISABLED: u32 = 0x0000_0000;
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/// A struct that represents an nRF52 Pin
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pub struct Pin(u8);
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impl Pin {
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/// Set a pin to be a push pull output
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pub fn set_push_pull_output(&mut self, level: Level) {
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// set level
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match level {
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Level::High => self.set_high(),
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Level::Low => self.set_low(),
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}
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let set_val = PIN_CNF_DIR_OUTPUT
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| PIN_CNF_INPUT_CONNECT
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| PIN_CNF_PULL_DISABLED
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| PIN_CNF_DRIVE_S0S1
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| PIN_CNF_SENSE_DISABLED;
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unsafe {
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core::ptr::write_volatile(REG_P0_PIN_CNF_BASE.offset(self.0 as isize), set_val);
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}
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}
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/// Set a pin to output level low
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pub fn set_low(&mut self) {
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unsafe { core::ptr::write_volatile(REG_P0_OUT_SET, 1 << (self.0 as u32)) }
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}
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/// Set a pin to output level high
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pub fn set_high(&mut self) {
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unsafe { core::ptr::write_volatile(REG_P0_OUT_CLR, 1 << (self.0 as u32)) }
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}
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}
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/// The level of a GPIO
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#[derive(Copy, Clone)]
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pub enum Level {
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Low,
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High,
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}
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/// A struct that represents P0 of the nRF52
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pub struct Pins {
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pub p0_31: Pin,
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}
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impl Pins {
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/// A function to obtain a Port 0 singleton structure
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pub fn take() -> Self {
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static TAKEN: AtomicBool = AtomicBool::new(false);
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// Enforce this as a singleton
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assert!(!TAKEN.swap(true, SeqCst));
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Self { p0_31: Pin(31) }
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}
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}
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