.{memory, log} := @use("../../../libraries/stn/src/lib.hb");
.{bit0, bit5, bit6, bit7} := @use("bits.hb");
.{Port, port_at_startup} := @use("port.hb")

$disable_port1 := fn(): void memory.outb(0x64, 0xAD)
$enable_port1 := fn(): void memory.outb(0x64, 0xAE)
$disable_port2 := fn(): void memory.outb(0x64, 0xA7)
$enable_port2 := fn(): void memory.outb(0x64, 0xA8)

test_port1 := fn(): bool {
	memory.outb(0x64, 0xAB)
	loop if has_input(get_info()) break
	input := get_input()
	return input == 0x0
}

test_port2 := fn(): bool {
	memory.outb(0x64, 0xA9)
	loop if has_input(get_info()) break
	input := get_input()
	return input == 0x0
}

get_config_byte := fn(): u8 {
	memory.outb(0x64, 0x20)
	loop if has_input(get_info()) break
	return get_input()
}

Info := struct {d: u8}

$get_info := fn(): u8 return .(memory.inb(0x64))
$has_input := fn(info: Info): bool return bit0(info.d)
$timed_out := fn(info: Info): bool return bit6(info.d)
$check_parity := fn(info: Info): bool return bit7(info.d)
get_port := fn(info: Info): ^Port {
	if bit5(info.d) {
		return &port2
	} else {
		return &port1
	}
}

$get_input := fn(): u8 return memory.inb(0x60)
$write_out := fn(data: u8): void memory.outb(0x60, data)

flush_input := fn(): void {
	loop if has_input(get_info()) == false break else get_info()
}

port1 := port_at_startup
port2 := port_at_startup

init := fn(): void {
	disable_port1()
	disable_port2()
	//Disables ports to make sure that they won't interfere with the setup process.

	flush_input()

	enable_port2()
	port2.exists = bit5(@inline(get_config_byte)) == false
	disable_port2()

	flush_input()

	port1.exists = test_port1()

	if port2.exists {
		port2.exists = test_port2()
	}

	if (port1.exists | port2.exists) == false {
		log.error("No ports detected! No input will be processed! Cannot handle this!\0")
	}

	if port1.exists {
		log.info("Port 1 exists.\0")
		enable_port1()
		port1.commands.length = 1
	}
	if port2.exists {
		log.info("Port 2 exists.\0")
		enable_port2()
		port2.commands.length = 1
	}
}