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minor changes and a bug fix

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able 2023-05-23 02:29:31 -05:00
parent e53a5eb835
commit 4223055c0c
3 changed files with 12 additions and 13 deletions
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BIN
hbvm/assets/inf_loop.hb Normal file
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3
hbvm/src/engine/mod.rs
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@ -284,8 +284,7 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
panic!("Not a register.")
}
}
self.index += 4;
self.index += 5;
}
(2, 2) => {
let mut lhs_array = [0; 8];

16
hbvm/src/main.rs
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@ -5,25 +5,25 @@ use hbvm::{
};
fn main() -> Result<(), RuntimeErrors> {
// TODO: Grab program from cmdline
#[rustfmt::skip]
let prog: Vec<u8> = vec![
// NOP as u8, NOP as u8,
// 255, 10,
ADD as u8, EightBit as u8, 100, 20, 0xA7,
NOP as u8,
255, 10,
// ADD as u8, EightBit as u8, 100, 20, 0xA7,
// ADD as u8,
// EightBit as u8, 1, 0, 0xB0,
// ADD as u8,
// SixtyFourBit as u8,
// 0, 0, 0, 0, 0, 0, 0, 0,
// 0, 0, 0, 0, 0, 0, 0, 2, 0xD0,
// SUB as u8, EightBit as u8, 255, 0, 0xA7,
// DIV as u8, EightBit as u8, 12, 5, 0xA8,
// ADD as u8, Register8 as u8, 0xA7, 0xB0, 0xA7,
SUB as u8, EightBit as u8, 255, 0, 0xA0,
// This currently fails because of a lack of register to register addition
// ADD as u8, Register8 as u8, 0xA0, 0xA0, 0xA1,
// LOAD as u8, AddrToReg as u8,
// 0, 0, 0, 0, 0, 0, 0, 2,
// 0xA0,
// JUMP as u8, 0, 0, 0, 0, 0, 0, 0, 0,
JUMP as u8, 0, 0, 0, 0, 0, 0, 0, 0,
];
let mut eng = Engine::new(prog);