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Erin 2023-10-01 01:52:26 +02:00
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22
hbbytecode/instructions.in
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@ -1,23 +1,23 @@
// OPCODE, MNEMONIC, TYPE, DOC; // OPCODE, MNEMONIC, TYPE, DOC;
0, UN, N, "Cause an unreachable code trap" ; 0, UN, N, "Cause an unreachable code trap" ;
1, TX, N, "Termiante execution" ; 1, TX, N, "Termiante execution" ;
2, NOP, N, "Do nothing" ; 2, NOP, N, "Do nothing" ;
3, ADD, RRR, "Addition" ; 3, ADD, RRR, "Addition" ;
4, SUB, RRR, "Subtraction" ; 4, SUB, RRR, "Subtraction" ;
5, MUL, RRR, "Multiplication" ; 5, MUL, RRR, "Multiplication" ;
6, AND, RRR, "Bitand" ; 6, AND, RRR, "Bitand" ;
7, OR, RRR, "Bitor" ; 7, OR, RRR, "Bitor" ;
8, XOR, RRR, "Bitxor" ; 8, XOR, RRR, "Bitxor" ;
9, SL, RRR, "Unsigned left bitshift" ; 9, SL, RRR, "Unsigned left bitshift" ;
10, SR, RRR, "Unsigned right bitshift" ; 10, SR, RRR, "Unsigned right bitshift" ;
11, SRS, RRR, "Signed right bitshift" ; 11, SRS, RRR, "Signed right bitshift" ;
12, CMP, RRR, "Signed comparsion" ; 12, CMP, RRR, "Signed comparsion" ;
13, CMPU, RRR, "Unsigned comparsion" ; 13, CMPU, RRR, "Unsigned comparsion" ;
14, DIR, RRRR, "Merged divide-remainder" ; 14, DIR, RRRR, "Merged divide-remainder" ;
15, NEG, RR, "Bit negation" ; 15, NEG, RR, "Bit negation" ;
15, NOT, RR, "Logical negation" ; 16, NOT, RR, "Logical negation" ;
17, ADDI, RRD, "Addition with immediate" ; 17, ADDI, RRD, "Addition with immediate" ;
18, MULI, RRD, "Multiplication with immediate" ; 18, MULI, RRD, "Multiplication with immediate" ;
19, ANDI, RRD, "Bitand with immediate" ; 19, ANDI, RRD, "Bitand with immediate" ;