forked from AbleOS/ableos
Fixed immediate ops
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aca8045a98
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c5c8d23470
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@ -19,7 +19,7 @@ macro_rules! handler {
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($self:expr, |$ty:ident ($($ident:pat),* $(,)?)| $expr:expr) => {{
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let $ty($($ident),*) = $self.decode::<$ty>();
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#[allow(clippy::no_effect)] let e = $expr;
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$self.bump_pc::<$ty, true>();
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$self.bump_pc::<$ty>();
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e
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}};
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}
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@ -57,11 +57,11 @@ where
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unsafe {
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match self.memory.prog_read::<u8>(self.pc as _) {
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UN => {
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self.bump_pc::<OpsN, true>();
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self.bump_pc::<OpsN>();
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return Err(VmRunError::Unreachable);
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}
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TX => {
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self.bump_pc::<OpsN, true>();
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self.bump_pc::<OpsN>();
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return Ok(VmRunOk::End);
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}
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NOP => handler!(self, |OpsN()| ()),
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@ -217,7 +217,7 @@ where
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// We are done, shift program counter
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core::task::Poll::Ready(Ok(())) => {
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self.copier = None;
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self.bump_pc::<OpsRRH, true>();
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self.bump_pc::<OpsRRH>();
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}
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// Error, shift program counter (for consistency)
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// and yield error
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@ -270,7 +270,7 @@ where
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if self.read_reg(a0).cast::<u64>() != self.read_reg(a1).cast::<u64>() {
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self.pc = self.pcrel(ja, 3);
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} else {
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self.bump_pc::<OpsRRP, true>();
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self.bump_pc::<OpsRRP>();
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}
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}
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JLTS => self.cond_jmp::<u64>(Ordering::Less),
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@ -283,11 +283,11 @@ where
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self.timer = self.timer.wrapping_add(1);
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}
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self.bump_pc::<OpsN, true>();
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self.bump_pc::<OpsN>();
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return Ok(VmRunOk::Ecall);
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}
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EBP => {
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self.bump_pc::<OpsN, true>();
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self.bump_pc::<OpsN>();
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return Ok(VmRunOk::Breakpoint);
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}
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FADD32 => self.binary_op::<f32>(ops::Add::add),
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@ -373,10 +373,8 @@ where
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/// Bump instruction pointer
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#[inline(always)]
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fn bump_pc<T: Copy, const PAST_OP: bool>(&mut self) {
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self.pc = self
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.pc
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.wrapping_add(core::mem::size_of::<T>() + PAST_OP as usize);
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fn bump_pc<T: Copy>(&mut self) {
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self.pc = self.pc.wrapping_add(core::mem::size_of::<T>());
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}
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/// Decode instruction operands
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@ -442,17 +440,19 @@ where
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tg,
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op(self.read_reg(a0).cast::<T>(), self.read_reg(a1).cast::<T>()),
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);
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self.bump_pc::<OpsRRR, true>();
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self.bump_pc::<OpsRRR>();
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}
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/// Perform binary operation over register and immediate
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#[inline(always)]
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unsafe fn binary_op_imm<T: ValueVariant>(&mut self, op: impl Fn(T, T) -> T) {
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let OpsRR(tg, reg) = self.decode();
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let imm: T = self.decode();
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#[derive(Clone, Copy)]
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#[repr(packed)]
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struct OpsRRImm<I>(OpsRR, I);
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let OpsRRImm::<T>(OpsRR(tg, reg), imm) = self.decode();
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self.write_reg(tg, op(self.read_reg(reg).cast::<T>(), imm));
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self.bump_pc::<OpsRR, false>();
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self.bump_pc::<T, true>();
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self.bump_pc::<OpsRRImm<T>>();
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}
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/// Perform binary operation over register and shift immediate
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@ -466,7 +466,7 @@ where
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self.read_reg(a1).cast::<u32>(),
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),
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);
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self.bump_pc::<OpsRRR, true>();
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self.bump_pc::<OpsRRR>();
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}
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/// Perform binary operation over register and shift immediate
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@ -474,7 +474,7 @@ where
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unsafe fn binary_op_ims<T: ValueVariant>(&mut self, op: impl Fn(T, u32) -> T) {
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let OpsRRB(tg, reg, imm) = self.decode();
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self.write_reg(tg, op(self.read_reg(reg).cast::<T>(), imm.into()));
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self.bump_pc::<OpsRRW, true>();
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self.bump_pc::<OpsRRW>();
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}
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/// Fused division-remainder
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@ -540,7 +540,7 @@ where
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{
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self.pc = self.pcrel(ja, 3);
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} else {
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self.bump_pc::<OpsRRP, true>();
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self.bump_pc::<OpsRRP>();
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}
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}
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