forked from AbleOS/holey-bytes
49 lines
2 KiB
Plaintext
49 lines
2 KiB
Plaintext
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sb0[]-[]:
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0: iCall { func: 1 }:[Def: v3i fixed(p1i)]
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1: iCInt { value: 0 }:[Def: v6i reg]
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2: iCInt { value: 30 }:[Def: v5i reg]
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3: iCInt { value: 100 }:[Def: v4i reg]
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4: iLoop:[]
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eb0[VReg(vreg = 4, class = Int), VReg(vreg = 6, class = Int), VReg(vreg = 6, class = Int), VReg(vreg = 6, class = Int)]-[Block(1)]:
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sb1[VReg(vreg = 26, class = Int), VReg(vreg = 8, class = Int), VReg(vreg = 15, class = Int), VReg(vreg = 18, class = Int)]-[Block(0), Block(11)]:
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5: iIf:[Use: v8i reg, Use: v5i reg]
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eb1[]-[Block(2), Block(10)]:
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sb2[]-[Block(1)]:
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6: iBinOp { op: Add }:[Def: v19i reg, Use: v18i reg]
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7: iCall { func: 2 }:[Def: v20i fixed(p1i), Use: v6i fixed(p2i), Use: v19i fixed(p3i), Use: v5i fixed(p4i)]
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8: iIf:[Use: v20i reg, Use: v15i reg]
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eb2[]-[Block(3), Block(4)]:
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sb3[]-[Block(2)]:
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9: iReturn:[Use: v6i fixed(p1i)]
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eb3[]-[]:
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sb4[]-[Block(2)]:
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10: iIf:[Use: v19i reg, Use: v4i reg]
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eb4[]-[Block(5), Block(9)]:
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sb5[]-[Block(4)]:
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11: iBinOp { op: Add }:[Def: v35i reg, Use: v26i reg]
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12: iLoop:[]
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eb5[VReg(vreg = 19, class = Int)]-[Block(6)]:
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sb6[VReg(vreg = 38, class = Int)]-[Block(5), Block(7)]:
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13: iIf:[Use: v35i reg, Use: v38i reg]
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eb6[]-[Block(7), Block(8)]:
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sb7[]-[Block(6)]:
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14: iBinOp { op: Add }:[Def: v43i reg, Use: v38i reg]
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15: iLoop:[]
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eb7[VReg(vreg = 43, class = Int)]-[Block(6)]:
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sb8[]-[Block(6)]:
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16: iReturn:[Use: v15i fixed(p1i)]
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eb8[]-[]:
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sb9[]-[Block(4)]:
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17: iRegion:[]
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eb9[VReg(vreg = 6, class = Int), VReg(vreg = 19, class = Int), VReg(vreg = 15, class = Int)]-[Block(11)]:
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sb10[]-[Block(1)]:
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18: iBinOp { op: Add }:[Def: v16i reg, Use: v15i reg]
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19: iBinOp { op: Add }:[Def: v14i reg, Use: v8i reg]
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20: iRegion:[]
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eb10[VReg(vreg = 14, class = Int), VReg(vreg = 18, class = Int), VReg(vreg = 16, class = Int)]-[Block(11)]:
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sb11[VReg(vreg = 32, class = Int), VReg(vreg = 33, class = Int), VReg(vreg = 34, class = Int)]-[Block(10), Block(9)]:
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21: iLoop:[]
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eb11[VReg(vreg = 0, class = Int), VReg(vreg = 32, class = Int), VReg(vreg = 34, class = Int), VReg(vreg = 33, class = Int)]-[Block(1)]:
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