forked from AbleOS/holey-bytes
Mapping + bye bye memory leaks
This commit is contained in:
parent
ac7fdc7688
commit
6fe1fd91bf
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@ -15,9 +15,29 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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} else {
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} else {
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unsafe {
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unsafe {
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let mut vm = Vm::<_, 0>::new_unchecked(&prog, TestTrapHandler);
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let mut vm = Vm::<_, 0>::new_unchecked(&prog, TestTrapHandler);
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vm.memory.insert_test_page();
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let data = {
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let ptr = std::alloc::alloc_zeroed(std::alloc::Layout::from_size_align_unchecked(
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4096, 4096,
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));
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if ptr.is_null() {
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panic!("Alloc error tbhl");
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}
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ptr
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};
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vm.memory
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.map(
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data,
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0,
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hbvm::vm::mem::paging::Permission::Write,
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PageSize::Size4K,
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)
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.unwrap();
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println!("Program interrupt: {:?}", vm.run());
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println!("Program interrupt: {:?}", vm.run());
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println!("{:?}", vm.registers);
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println!("{:?}", vm.registers);
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std::alloc::dealloc(data, std::alloc::Layout::from_size_align_unchecked(4096, 4096));
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vm.memory.unmap(0).unwrap();
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}
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}
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}
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}
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Ok(())
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Ok(())
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@ -56,11 +56,11 @@ impl Memory {
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for _ in 0..4 {
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for _ in 0..4 {
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let mut pt = Box::<PageTable>::default();
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let mut pt = Box::<PageTable>::default();
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pt[0] = entry;
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pt.table[0] = entry;
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entry = PtEntry::new(Box::into_raw(pt) as _, Permission::Node);
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entry = PtEntry::new(Box::into_raw(pt) as _, Permission::Node);
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}
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}
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(*self.root_pt)[0] = entry;
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(*self.root_pt).table[0] = entry;
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}
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}
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}
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}
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@ -70,17 +70,95 @@ impl Memory {
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/// Who knows.
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/// Who knows.
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pub unsafe fn map(
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pub unsafe fn map(
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&mut self,
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&mut self,
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mut host: *mut u8,
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host: *mut u8,
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target: usize,
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target: u64,
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perm: Permission,
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pagesize: PageSize,
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pagesize: PageSize,
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count: usize,
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) -> Result<(), MapError> {
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) {
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let mut current_pt = self.root_pt;
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todo!()
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let lookup_depth = match pagesize {
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PageSize::Size4K => 4,
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PageSize::Size2M => 3,
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PageSize::Size1G => 2,
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};
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// Lookup pagetable above
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for lvl in (0..lookup_depth).rev() {
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let entry = (*current_pt)
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.table
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.get_unchecked_mut(addr_extract_index(target, lvl));
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let ptr = entry.ptr();
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match entry.permission() {
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Permission::Empty => {
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(*current_pt).childen += 1;
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let table = Box::into_raw(Box::new(paging::PtPointedData {
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pt: PageTable::default(),
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}));
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core::ptr::write(entry, PtEntry::new(table, Permission::Node));
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current_pt = table as _;
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}
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Permission::Node => current_pt = ptr as _,
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_ => return Err(MapError::AlreadyMapped),
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}
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}
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// Write entry
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(*current_pt).childen += 1;
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core::ptr::write(
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(*current_pt)
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.table
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.get_unchecked_mut(addr_extract_index(target, 4 - lookup_depth)),
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PtEntry::new(host.cast(), perm),
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);
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Ok(())
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}
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}
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/// Unmaps pages from VM's memory
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/// Unmaps pages from VM's memory
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pub fn unmap(&mut self, addr: usize, count: usize) {
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pub fn unmap(&mut self, addr: u64) -> Result<(), NothingToUnmap> {
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todo!()
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let mut current_pt = self.root_pt;
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let mut page_tables = [core::ptr::null_mut(); 5];
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for lvl in (0..5).rev() {
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let entry = unsafe {
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(*current_pt)
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.table
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.get_unchecked_mut(addr_extract_index(addr, lvl))
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};
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let ptr = entry.ptr();
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match entry.permission() {
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Permission::Empty => return Err(NothingToUnmap),
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Permission::Node => {
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page_tables[lvl as usize] = entry;
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current_pt = ptr as _
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}
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_ => unsafe {
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core::ptr::write(entry, Default::default());
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},
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}
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}
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for entry in page_tables.into_iter() {
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if entry.is_null() {
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continue;
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}
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unsafe {
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let children = &mut (*(*entry).ptr()).pt.childen;
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*children -= 1;
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if *children == 0 {
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core::mem::drop(Box::from_raw((*entry).ptr() as *mut PageTable));
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}
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core::ptr::write(entry, Default::default());
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}
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}
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Ok(())
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}
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}
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/// Load value from an address
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/// Load value from an address
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@ -338,10 +416,9 @@ impl Iterator for AddrPageLookuper {
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for lvl in (0..5).rev() {
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for lvl in (0..5).rev() {
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// Get an entry
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// Get an entry
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unsafe {
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unsafe {
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let entry = (*current_pt).get_unchecked(
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let entry = (*current_pt)
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usize::try_from((self.addr >> (lvl * 9 + 12)) & ((1 << 9) - 1))
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.table
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.expect("?conradluget a better CPU"),
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.get_unchecked(addr_extract_index(self.addr, lvl));
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);
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let ptr = entry.ptr();
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let ptr = entry.ptr();
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match entry.permission() {
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match entry.permission() {
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@ -356,7 +433,7 @@ impl Iterator for AddrPageLookuper {
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// Node → proceed waking
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// Node → proceed waking
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Permission::Node => current_pt = ptr as _,
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Permission::Node => current_pt = ptr as _,
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// Leaft → return relevant data
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// Leaf → return relevant data
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perm => {
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perm => {
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break 'a (
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break 'a (
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// Pointer in host memory
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// Pointer in host memory
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@ -386,6 +463,11 @@ impl Iterator for AddrPageLookuper {
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}
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}
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}
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}
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fn addr_extract_index(addr: u64, lvl: u8) -> usize {
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debug_assert!(lvl <= 4);
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usize::try_from((addr >> (lvl * 9 + 12)) & ((1 << 9) - 1)).expect("?conradluget a better CPU")
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}
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/// Page size
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/// Page size
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum PageSize {
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pub enum PageSize {
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@ -401,7 +483,7 @@ pub enum PageSize {
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impl PageSize {
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impl PageSize {
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/// Convert page table level to size of page
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/// Convert page table level to size of page
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fn from_lvl(lvl: u8) -> Option<Self> {
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const fn from_lvl(lvl: u8) -> Option<Self> {
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match lvl {
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match lvl {
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0 => Some(PageSize::Size4K),
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0 => Some(PageSize::Size4K),
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1 => Some(PageSize::Size2M),
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1 => Some(PageSize::Size2M),
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@ -419,6 +501,9 @@ pub struct LoadError(u64);
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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pub struct StoreError(u64);
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pub struct StoreError(u64);
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#[derive(Clone, Copy, Display, Debug)]
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pub struct NothingToUnmap;
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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pub enum MemoryAccessReason {
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pub enum MemoryAccessReason {
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Load,
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Load,
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@ -451,3 +536,8 @@ impl From<StoreError> for VmRunError {
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Self::StoreAccessEx(value.0)
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Self::StoreAccessEx(value.0)
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}
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}
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}
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}
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#[derive(Clone, Copy, Display, Debug, PartialEq, Eq)]
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pub enum MapError {
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AlreadyMapped,
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}
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@ -1,14 +1,6 @@
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//! Page table and associated structures implementation
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//! Page table and associated structures implementation
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use {
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use core::{fmt::Debug, mem::MaybeUninit};
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core::{
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fmt::Debug,
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mem::MaybeUninit,
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ops::{Index, IndexMut},
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slice::SliceIndex,
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},
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delegate::delegate,
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};
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/// Page entry permission
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/// Page entry permission
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#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)]
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#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)]
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@ -66,78 +58,18 @@ impl Debug for PtEntry {
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/// Page table
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/// Page table
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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#[repr(align(4096))]
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#[repr(align(4096))]
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pub struct PageTable([PtEntry; 512]);
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pub struct PageTable {
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pub childen: u8,
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impl PageTable {
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pub table: [PtEntry; 256],
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delegate!(to self.0 {
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/// Returns a reference to an element or subslice depending on the type of
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/// index.
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///
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/// - If given a position, returns a reference to the element at that
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/// position or `None` if out of bounds.
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/// - If given a range, returns the subslice corresponding to that range,
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/// or `None` if out of bounds.
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///
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pub fn get<I>(&self, ix: I) -> Option<&I::Output>
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where I: SliceIndex<[PtEntry]>;
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/// Returns a mutable reference to an element or subslice depending on the
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/// type of index (see [`get`]) or `None` if the index is out of bounds.
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pub fn get_mut<I>(&mut self, ix: I) -> Option<&mut I::Output>
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where I: SliceIndex<[PtEntry]>;
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/// Returns a reference to an element or subslice, without doing bounds
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/// checking.
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///
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/// For a safe alternative see [`get`].
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///
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/// # Safety
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///
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/// Calling this method with an out-of-bounds index is *[undefined behavior]*
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/// even if the resulting reference is not used.
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pub unsafe fn get_unchecked<I>(&self, index: I) -> &I::Output
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where I: SliceIndex<[PtEntry]>;
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/// Returns a mutable reference to an element or subslice, without doing
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/// bounds checking.
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///
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/// For a safe alternative see [`get_mut`].
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///
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/// # Safety
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///
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/// Calling this method with an out-of-bounds index is *[undefined behavior]*
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/// even if the resulting reference is not used.
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pub unsafe fn get_unchecked_mut<I>(&mut self, index: I) -> &mut I::Output
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where I: SliceIndex<[PtEntry]>;
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});
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}
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impl<Idx> Index<Idx> for PageTable
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where
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Idx: SliceIndex<[PtEntry]>,
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{
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type Output = Idx::Output;
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#[inline(always)]
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fn index(&self, index: Idx) -> &Self::Output {
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&self.0[index]
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}
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}
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impl<Idx> IndexMut<Idx> for PageTable
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where
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Idx: SliceIndex<[PtEntry]>,
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{
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#[inline(always)]
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fn index_mut(&mut self, index: Idx) -> &mut Self::Output {
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&mut self.0[index]
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}
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}
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}
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impl Default for PageTable {
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impl Default for PageTable {
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fn default() -> Self {
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fn default() -> Self {
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// SAFETY: It's fine, zeroed page table entry is valid (= empty)
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// SAFETY: It's fine, zeroed page table entry is valid (= empty)
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Self(unsafe { MaybeUninit::zeroed().assume_init() })
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Self {
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childen: 0,
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table: unsafe { MaybeUninit::zeroed().assume_init() },
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}
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}
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}
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}
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}
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