forked from AbleOS/holey-bytes
removing return value temporary optimization sadly
This commit is contained in:
parent
da7cd5926c
commit
7448339605
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@ -1181,3 +1181,18 @@ clobber := fn(): void {
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var = 0
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var = 0
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}
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}
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```
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```
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#### overwrite_aliasing_overoptimization
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```hb
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Foo := struct {a: int, b: int}
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Bar := struct {f: Foo, b: int}
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main := fn(): int {
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value := Bar.{b: 1, f: .(4, 1)}
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value.f = opaque()
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return value.f.a - value.f.b - value.b
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}
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opaque := fn(): Foo {
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return .(3, 2)
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}
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@ -1002,57 +1002,47 @@ impl Nodes {
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}
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}
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}
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}
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// TODO: this can be an offset already due to previous peeps so handle that
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debug_assert_matches!(
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if let &[mcall] = unidentifed.as_slice()
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self[last_store].kind,
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&& matches!(self[mcall].kind, Kind::Call { .. })
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Kind::Stre | Kind::Mem,
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&& self[mcall].inputs.last() == Some(&stack)
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"{:?}",
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{
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self[last_store]
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self.modify_input(mcall, self[mcall].inputs.len() - 1, region);
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);
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debug_assert_matches!(
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self[first_store].kind,
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Kind::Stre | Kind::Mem,
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"{:?}",
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self[first_store]
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);
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return Some(last_store);
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if !unidentifed.is_empty() {
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} else {
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break 'eliminate;
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debug_assert_matches!(
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self[last_store].kind,
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Kind::Stre | Kind::Mem,
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"{:?}",
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self[last_store]
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);
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debug_assert_matches!(
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self[first_store].kind,
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Kind::Stre | Kind::Mem,
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"{:?}",
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self[first_store]
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);
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if !unidentifed.is_empty() {
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break 'eliminate;
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}
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// FIXME: when the loads and stores become parallel we will need to get saved
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// differently
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let mut prev_store = store;
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for mut oper in saved.into_iter().rev() {
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let mut region = region;
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if let Kind::BinOp { op } = self[oper].kind {
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debug_assert_eq!(self[oper].outputs.len(), 1);
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debug_assert_eq!(self[self[oper].outputs[0]].kind, Kind::Stre);
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region = self.new_node(self[oper].ty, Kind::BinOp { op }, [
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VOID,
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region,
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self[oper].inputs[2],
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]);
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oper = self[oper].outputs[0];
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}
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let mut inps = self[oper].inputs.clone();
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debug_assert_eq!(inps.len(), 4);
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inps[2] = region;
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inps[3] = prev_store;
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prev_store = self.new_node(self[oper].ty, Kind::Stre, inps);
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}
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return Some(prev_store);
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}
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}
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// FIXME: when the loads and stores become parallel we will need to get saved
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// differently
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let mut prev_store = store;
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for mut oper in saved.into_iter().rev() {
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let mut region = region;
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if let Kind::BinOp { op } = self[oper].kind {
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debug_assert_eq!(self[oper].outputs.len(), 1);
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debug_assert_eq!(self[self[oper].outputs[0]].kind, Kind::Stre);
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region = self.new_node(self[oper].ty, Kind::BinOp { op }, [
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VOID,
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region,
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self[oper].inputs[2],
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]);
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oper = self[oper].outputs[0];
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}
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let mut inps = self[oper].inputs.clone();
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debug_assert_eq!(inps.len(), 4);
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inps[2] = region;
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inps[3] = prev_store;
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prev_store = self.new_node(self[oper].ty, Kind::Stre, inps);
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}
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return Some(prev_store);
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}
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}
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if value != VOID
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if value != VOID
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@ -4080,5 +4070,6 @@ mod tests {
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infinite_loop_after_peephole;
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infinite_loop_after_peephole;
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aliasing_overoptimization;
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aliasing_overoptimization;
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global_aliasing_overptimization;
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global_aliasing_overptimization;
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overwrite_aliasing_overoptimization;
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}
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}
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}
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}
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@ -985,14 +985,17 @@ impl<'a> Function<'a> {
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)
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|| matches!(self.nodes[n].kind, Kind::Stre
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|| matches!(self.nodes[n].kind, Kind::Stre
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg
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&& self.nodes[n].inputs[1] != nid)
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&& self.nodes[n].inputs[1] != nid)
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|| matches!(self.nodes[n].kind, Kind::BinOp { op: TokenKind::Add }
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|| matches!(self.nodes[n].kind, Kind::BinOp { op: TokenKind::Add }
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if self.nodes.is_const(self.nodes[n].inputs[2])
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if self.nodes.is_const(self.nodes[n].inputs[2])
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&& self.nodes[n]
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&& self.nodes[n]
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.outputs
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.outputs
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.iter()
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.iter()
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.all(|&n| matches!(self.nodes[n].kind, Kind::Stre | Kind::Load
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.all(|&n| matches!(self.nodes[n].kind, Kind::Load
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)))
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)
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|| matches!(self.nodes[n].kind, Kind::Stre
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg
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&& self.nodes[n].inputs[1] != nid)))
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}) => self.nodes.lock(nid),
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}) => self.nodes.lock(nid),
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Kind::Stck if self.tys.size_of(node.ty) == 0 => self.nodes.lock(nid),
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Kind::Stck if self.tys.size_of(node.ty) == 0 => self.nodes.lock(nid),
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Kind::Stck => {
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Kind::Stck => {
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@ -1,17 +1,20 @@
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deinit:
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deinit:
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ADDI64 r254, r254, -16d
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ADDI64 r254, r254, -48d
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ST r31, r254, 0a, 16h
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ST r31, r254, 24a, 24h
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CP r32, r2
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LD r5, r2, 16a, 8h
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LD r5, r2, 16a, 8h
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CP r32, r2
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LI64 r4, 8d
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LI64 r4, 8d
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MUL64 r3, r5, r4
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MUL64 r3, r5, r4
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CP r5, r32
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CP r5, r32
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LD r2, r5, 0a, 8h
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LD r2, r5, 0a, 8h
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JAL r31, r0, :free
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JAL r31, r0, :free
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CP r1, r32
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ADDI64 r33, r254, 0d
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CP r1, r33
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JAL r31, r0, :new
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JAL r31, r0, :new
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LD r31, r254, 0a, 16h
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CP r2, r32
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ADDI64 r254, r254, 16d
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BMC r33, r2, 24h
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LD r31, r254, 24a, 24h
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ADDI64 r254, r254, 48d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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free:
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free:
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CP r10, r2
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CP r10, r2
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@ -23,21 +26,23 @@ free:
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ECA
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ECA
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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main:
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main:
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ADDI64 r254, r254, -48d
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ADDI64 r254, r254, -80d
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ST r31, r254, 24a, 24h
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ST r31, r254, 48a, 32h
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ADDI64 r32, r254, 0d
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ADDI64 r32, r254, 24d
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CP r1, r32
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CP r1, r32
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JAL r31, r0, :new
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JAL r31, r0, :new
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ADDI64 r33, r254, 0d
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BMC r32, r33, 24h
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LI64 r3, 69d
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LI64 r3, 69d
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CP r2, r32
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CP r2, r33
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JAL r31, r0, :push
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JAL r31, r0, :push
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LD r9, r254, 0a, 8h
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LD r12, r254, 0a, 8h
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LD r33, r9, 0a, 8h
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LD r34, r12, 0a, 8h
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CP r2, r32
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CP r2, r33
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JAL r31, r0, :deinit
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JAL r31, r0, :deinit
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CP r1, r33
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CP r1, r34
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LD r31, r254, 24a, 24h
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LD r31, r254, 48a, 32h
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ADDI64 r254, r254, 48d
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ADDI64 r254, r254, 80d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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malloc:
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malloc:
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CP r9, r2
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CP r9, r2
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@ -121,6 +126,6 @@ push:
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4: LD r31, r254, 0a, 72h
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4: LD r31, r254, 0a, 72h
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ADDI64 r254, r254, 72d
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ADDI64 r254, r254, 72d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 945
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code size: 980
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ret: 69
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ret: 69
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status: Ok(())
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status: Ok(())
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36
lang/tests/son_tests_overwrite_aliasing_overoptimization.txt
Normal file
36
lang/tests/son_tests_overwrite_aliasing_overoptimization.txt
Normal file
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@ -0,0 +1,36 @@
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main:
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ADDI64 r254, r254, -72d
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ST r31, r254, 56a, 16h
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ADDI64 r32, r254, 0d
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JAL r31, r0, :opaque
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ST r1, r254, 0a, 16h
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LI64 r6, 4d
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ADDI64 r5, r254, 40d
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ADDI64 r8, r254, 16d
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ST r6, r254, 40a, 8h
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LI64 r7, 1d
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ST r7, r254, 48a, 8h
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ST r7, r254, 32a, 8h
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BMC r5, r8, 16h
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BMC r32, r8, 16h
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LD r7, r254, 24a, 8h
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LD r9, r254, 32a, 8h
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ADD64 r11, r9, r7
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LD r9, r254, 16a, 8h
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SUB64 r1, r9, r11
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LD r31, r254, 56a, 16h
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ADDI64 r254, r254, 72d
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JALA r0, r31, 0a
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opaque:
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ADDI64 r254, r254, -16d
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LI64 r3, 3d
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ADDI64 r2, r254, 0d
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ST r3, r254, 0a, 8h
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LI64 r6, 2d
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ST r6, r254, 8a, 8h
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LD r1, r2, 0a, 16h
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ADDI64 r254, r254, 16d
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JALA r0, r31, 0a
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code size: 339
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ret: 0
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status: Ok(())
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@ -1,27 +1,29 @@
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main:
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main:
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ADDI64 r254, r254, -12d
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ADDI64 r254, r254, -24d
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ST r31, r254, 4a, 8h
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ST r31, r254, 8a, 16h
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ADDI64 r2, r254, 0d
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ADDI64 r32, r254, 4d
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JAL r31, r0, :random_color
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JAL r31, r0, :random_color
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ST r1, r254, 0a, 4h
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ST r1, r254, 4a, 4h
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LD r5, r254, 0a, 1h
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ADDI64 r5, r254, 0d
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LD r8, r254, 1a, 1h
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BMC r32, r5, 4h
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LD r12, r254, 2a, 1h
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LD r8, r254, 0a, 1h
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ANDI r9, r5, 255d
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LD r11, r254, 1a, 1h
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ANDI r1, r8, 255d
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LD r3, r254, 2a, 1h
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LD r6, r254, 3a, 1h
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ANDI r12, r8, 255d
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ANDI r5, r12, 255d
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ANDI r4, r11, 255d
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ADD64 r4, r1, r9
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LD r9, r254, 3a, 1h
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ANDI r10, r6, 255d
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ANDI r8, r3, 255d
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ADD64 r9, r4, r5
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ADD64 r7, r4, r12
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ADD64 r1, r9, r10
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ANDI r1, r9, 255d
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LD r31, r254, 4a, 8h
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ADD64 r12, r7, r8
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ADDI64 r254, r254, 12d
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ADD64 r1, r12, r1
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LD r31, r254, 8a, 16h
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ADDI64 r254, r254, 24d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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random_color:
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random_color:
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LRA r1, r0, :white
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LRA r1, r0, :white
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LD r1, r1, 0a, 4h
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LD r1, r1, 0a, 4h
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 241
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code size: 257
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ret: 1020
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ret: 1020
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status: Ok(())
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status: Ok(())
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@ -1,23 +1,24 @@
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main:
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main:
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ADDI64 r254, r254, -56d
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ADDI64 r254, r254, -72d
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ST r31, r254, 32a, 24h
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ST r31, r254, 48a, 24h
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LI64 r3, 4d
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LI64 r3, 4d
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ADDI64 r2, r254, 16d
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ADDI64 r2, r254, 32d
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ST r3, r254, 16a, 8h
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ST r3, r254, 32a, 8h
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LI64 r32, 3d
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LI64 r32, 3d
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ST r32, r254, 24a, 8h
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ST r32, r254, 40a, 8h
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ADDI64 r33, r254, 0d
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ADDI64 r33, r254, 16d
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LD r3, r2, 0a, 16h
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LD r3, r2, 0a, 16h
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JAL r31, r0, :odher_pass
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JAL r31, r0, :odher_pass
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ST r1, r254, 0a, 16h
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ST r1, r254, 16a, 16h
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LD r2, r254, 8a, 8h
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ADDI64 r2, r254, 0d
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JNE r2, r32, :0
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BMC r33, r2, 16h
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CP r2, r33
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LD r4, r254, 8a, 8h
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JNE r4, r32, :0
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JAL r31, r0, :pass
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JAL r31, r0, :pass
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JMP :1
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JMP :1
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0: LI64 r1, 0d
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0: LI64 r1, 0d
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1: LD r31, r254, 32a, 24h
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1: LD r31, r254, 48a, 24h
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ADDI64 r254, r254, 56d
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ADDI64 r254, r254, 72d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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odher_pass:
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odher_pass:
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ADDI64 r254, r254, -16d
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ADDI64 r254, r254, -16d
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@ -29,6 +30,6 @@ odher_pass:
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pass:
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pass:
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LD r1, r2, 0a, 8h
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LD r1, r2, 0a, 8h
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 305
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code size: 318
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ret: 4
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ret: 4
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status: Ok(())
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status: Ok(())
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|
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@ -1,17 +1,19 @@
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main:
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main:
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ADDI64 r254, r254, -24d
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ADDI64 r254, r254, -48d
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ST r31, r254, 16a, 8h
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ST r31, r254, 32a, 16h
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ADDI64 r3, r254, 0d
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ADDI64 r32, r254, 16d
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LI64 r4, 0d
|
LI64 r4, 0d
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CP r3, r4
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CP r3, r4
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JAL r31, r0, :maina
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JAL r31, r0, :maina
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ST r1, r254, 0a, 16h
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ST r1, r254, 16a, 16h
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LD r8, r254, 12a, 1h
|
ADDI64 r7, r254, 0d
|
||||||
LD r9, r254, 3a, 1h
|
BMC r32, r7, 16h
|
||||||
SUB8 r11, r9, r8
|
LD r11, r254, 12a, 1h
|
||||||
ANDI r1, r11, 255d
|
LD r12, r254, 3a, 1h
|
||||||
LD r31, r254, 16a, 8h
|
SUB8 r2, r12, r11
|
||||||
ADDI64 r254, r254, 24d
|
ANDI r1, r2, 255d
|
||||||
|
LD r31, r254, 32a, 16h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
maina:
|
maina:
|
||||||
ADDI64 r254, r254, -36d
|
ADDI64 r254, r254, -36d
|
||||||
|
@ -48,6 +50,6 @@ small_struct:
|
||||||
LD r1, r3, 0a, 4h
|
LD r1, r3, 0a, 4h
|
||||||
ADDI64 r254, r254, 4d
|
ADDI64 r254, r254, 4d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 498
|
code size: 514
|
||||||
ret: 2
|
ret: 2
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
Loading…
Reference in a new issue