From 7eaa01f53c53b605f81a62dffd688c339bfb0f20 Mon Sep 17 00:00:00 2001 From: Erin Date: Sun, 28 May 2023 23:37:43 +0200 Subject: [PATCH] fixup32 --- hbvm/src/engine/regs.rs | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hbvm/src/engine/regs.rs b/hbvm/src/engine/regs.rs index 5600f98..60e7d42 100644 --- a/hbvm/src/engine/regs.rs +++ b/hbvm/src/engine/regs.rs @@ -24,7 +24,7 @@ impl IndexMut for Registers { impl Default for Registers { fn default() -> Self { - Self([Value { u: 0 }; 60]) + Self([Value { i: 0 }; 60]) } } @@ -55,13 +55,12 @@ macro_rules! value_def { } value_def! { - u: u64, unsigned; - s: i64, signed; + i: u64, int; f: f64, float; } impl Debug for Value { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.unsigned().fmt(f) + self.int().fmt(f) } }