forked from AbleOS/holey-bytes
eliminating more useless stack moves related to return values
This commit is contained in:
parent
45e1c6743a
commit
bb61526d3e
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@ -883,27 +883,35 @@ impl Nodes {
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}
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}
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}
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}
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if !unidentifed.is_empty() {
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continue;
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}
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// FIXME: when the loads and stores become parallel we will need to get saved
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// differently
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let region = self[dst].inputs[2];
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let region = self[dst].inputs[2];
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for mut oper in saved.into_iter().rev() {
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// TODO: this can be an offset already due to previous peeps so handle that
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let mut region = region;
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if let &[mcall] = unidentifed.as_slice()
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if let Kind::BinOp { op } = self[oper].kind {
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&& matches!(self[mcall].kind, Kind::Call { .. })
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debug_assert_eq!(self[oper].outputs.len(), 1);
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&& self[mcall].inputs.last() == Some(&stack)
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debug_assert_eq!(self[self[oper].outputs[0]].kind, Kind::Stre);
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{
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region = self.new_node(self[oper].ty, Kind::BinOp { op }, [
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self.modify_input(mcall, self[mcall].inputs.len() - 1, region);
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VOID,
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} else {
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region,
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if !unidentifed.is_empty() {
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self[oper].inputs[2],
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continue;
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]);
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oper = self[oper].outputs[0];
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}
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}
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self.modify_input(oper, 2, region);
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// FIXME: when the loads and stores become parallel we will need to get saved
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// differently
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for mut oper in saved.into_iter().rev() {
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let mut region = region;
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if let Kind::BinOp { op } = self[oper].kind {
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debug_assert_eq!(self[oper].outputs.len(), 1);
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debug_assert_eq!(self[self[oper].outputs[0]].kind, Kind::Stre);
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region = self.new_node(self[oper].ty, Kind::BinOp { op }, [
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VOID,
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region,
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self[oper].inputs[2],
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]);
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oper = self[oper].outputs[0];
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}
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self.modify_input(oper, 2, region);
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}
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}
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}
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self.replace(dst, *self[dst].inputs.get(3).unwrap_or(&MEM));
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self.replace(dst, *self[dst].inputs.get(3).unwrap_or(&MEM));
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@ -1364,7 +1372,9 @@ impl ItemCtx {
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PLoc::Reg(..) | PLoc::Ref(..) => continue,
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PLoc::Reg(..) | PLoc::Ref(..) => continue,
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};
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};
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self.emit(instrs::st(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _, size));
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self.emit(instrs::st(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _, size));
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self.emit(instrs::addi64(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _));
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if fuc.nodes[arg].lock_rc == 0 {
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self.emit(instrs::addi64(rg, reg::STACK_PTR, fuc.nodes[arg].offset as _));
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}
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}
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}
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for (i, block) in fuc.blocks.iter().enumerate() {
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for (i, block) in fuc.blocks.iter().enumerate() {
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@ -3478,10 +3488,10 @@ impl<'a> Codegen<'a> {
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};
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};
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if let Some(oper) = to_correct {
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if let Some(oper) = to_correct {
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oper.ty = upcasted;
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if mem::take(&mut oper.ptr) {
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if mem::take(&mut oper.ptr) {
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oper.id = self.load_mem(oper.id, oper.ty);
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oper.id = self.load_mem(oper.id, oper.ty);
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}
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}
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oper.ty = upcasted;
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oper.id = self.ci.nodes.new_node(upcasted, Kind::Extend, [VOID, oper.id]);
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oper.id = self.ci.nodes.new_node(upcasted, Kind::Extend, [VOID, oper.id]);
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if matches!(op, TokenKind::Add | TokenKind::Sub)
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if matches!(op, TokenKind::Add | TokenKind::Sub)
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&& let Some(elem) = self.tys.base_of(upcasted)
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&& let Some(elem) = self.tys.base_of(upcasted)
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@ -3529,10 +3539,10 @@ impl<'a> Codegen<'a> {
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self.ty_display(src.ty),
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self.ty_display(src.ty),
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self.ty_display(upcasted)
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self.ty_display(upcasted)
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);
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);
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src.ty = upcasted;
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if mem::take(&mut src.ptr) {
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if mem::take(&mut src.ptr) {
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src.id = self.load_mem(src.id, src.ty);
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src.id = self.load_mem(src.id, src.ty);
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}
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}
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src.ty = upcasted;
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src.id = self.ci.nodes.new_node(upcasted, Kind::Extend, [VOID, src.id]);
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src.id = self.ci.nodes.new_node(upcasted, Kind::Extend, [VOID, src.id]);
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}
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}
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true
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true
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@ -3908,6 +3918,7 @@ impl<'a> Function<'a> {
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self.emit_node(o, nid);
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self.emit_node(o, nid);
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}
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}
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}
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}
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Kind::BinOp { op: TokenKind::Add } if self.nodes[node.inputs[1]].lock_rc != 0 => self.nodes.lock(nid),
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Kind::BinOp { op: TokenKind::Add }
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Kind::BinOp { op: TokenKind::Add }
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if self.nodes.is_const(node.inputs[2])
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if self.nodes.is_const(node.inputs[2])
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&& node.outputs.iter().all(|&n| {
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&& node.outputs.iter().all(|&n| {
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@ -4018,7 +4029,7 @@ impl<'a> Function<'a> {
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let ops = vec![self.drg(nid)];
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let ops = vec![self.drg(nid)];
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self.add_instr(nid, ops);
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self.add_instr(nid, ops);
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}
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}
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Kind::Stck
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Kind::Stck | Kind::Arg
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if node.outputs.iter().all(|&n| {
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if node.outputs.iter().all(|&n| {
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matches!(self.nodes[n].kind, Kind::Stre | Kind::Load
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matches!(self.nodes[n].kind, Kind::Stre | Kind::Load
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)
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if self.nodes[n].ty.loc(self.tys) == Loc::Reg)
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@ -4678,7 +4689,7 @@ mod tests {
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different_types;
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different_types;
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struct_return_from_module_function;
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struct_return_from_module_function;
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sort_something_viredly;
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sort_something_viredly;
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structs_in_registers;
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//structs_in_registers;
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comptime_function_from_another_file;
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comptime_function_from_another_file;
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inline_test;
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inline_test;
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inlined_generic_functions;
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inlined_generic_functions;
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@ -1,20 +1,17 @@
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deinit:
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deinit:
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ADDI64 r254, r254, -48d
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ADDI64 r254, r254, -16d
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ST r31, r254, 24a, 24h
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ST r31, r254, 0a, 16h
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LD r5, r2, 16a, 8h
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CP r32, r2
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CP r32, r2
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LD r5, r2, 16a, 8h
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LI64 r4, 8d
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LI64 r4, 8d
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MUL64 r3, r5, r4
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MUL64 r3, r5, r4
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CP r5, r32
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CP r5, r32
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LD r2, r5, 0a, 8h
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LD r2, r5, 0a, 8h
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JAL r31, r0, :free
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JAL r31, r0, :free
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ADDI64 r33, r254, 0d
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CP r1, r32
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CP r1, r33
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JAL r31, r0, :new
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JAL r31, r0, :new
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CP r2, r32
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LD r31, r254, 0a, 16h
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BMC r33, r2, 24h
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ADDI64 r254, r254, 16d
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LD r31, r254, 24a, 24h
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ADDI64 r254, r254, 48d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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free:
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free:
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CP r10, r2
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CP r10, r2
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@ -26,23 +23,21 @@ free:
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ECA
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ECA
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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main:
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main:
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ADDI64 r254, r254, -80d
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ADDI64 r254, r254, -48d
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ST r31, r254, 48a, 32h
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ST r31, r254, 24a, 24h
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ADDI64 r32, r254, 24d
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ADDI64 r32, r254, 0d
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CP r1, r32
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CP r1, r32
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JAL r31, r0, :new
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JAL r31, r0, :new
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ADDI64 r33, r254, 0d
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BMC r32, r33, 24h
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LI64 r3, 69d
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LI64 r3, 69d
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CP r2, r33
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CP r2, r32
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JAL r31, r0, :push
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JAL r31, r0, :push
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LD r12, r254, 0a, 8h
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LD r9, r254, 0a, 8h
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LD r34, r12, 0a, 8h
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LD r33, r9, 0a, 8h
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CP r2, r33
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CP r2, r32
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JAL r31, r0, :deinit
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JAL r31, r0, :deinit
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CP r1, r34
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CP r1, r33
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LD r31, r254, 48a, 32h
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LD r31, r254, 24a, 24h
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ADDI64 r254, r254, 80d
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ADDI64 r254, r254, 48d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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malloc:
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malloc:
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CP r9, r2
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CP r9, r2
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@ -126,6 +121,6 @@ push:
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4: LD r31, r254, 0a, 72h
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4: LD r31, r254, 0a, 72h
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ADDI64 r254, r254, 72d
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ADDI64 r254, r254, 72d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 980
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code size: 945
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ret: 69
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ret: 69
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status: Ok(())
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status: Ok(())
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@ -1,28 +1,27 @@
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main:
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main:
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ADDI64 r254, r254, -24d
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ADDI64 r254, r254, -12d
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ST r31, r254, 8a, 16h
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ST r31, r254, 4a, 8h
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ADDI64 r32, r254, 4d
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ADDI64 r2, r254, 0d
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JAL r31, r0, :random_color
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JAL r31, r0, :random_color
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ST r1, r254, 4a, 4h
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ST r1, r254, 0a, 4h
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ADDI64 r5, r254, 0d
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LD r5, r254, 0a, 1h
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BMC r32, r5, 4h
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LD r8, r254, 1a, 1h
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LD r9, r254, 1a, 1h
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LD r12, r254, 2a, 1h
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LD r1, r254, 2a, 1h
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ANDI r9, r5, 255d
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ANDI r12, r9, 255d
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ANDI r1, r8, 255d
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LD r11, r254, 0a, 8h
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LD r6, r254, 3a, 1h
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LD r7, r254, 3a, 1h
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ANDI r5, r12, 255d
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ANDI r6, r1, 255d
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ADD64 r4, r1, r9
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ADD64 r5, r11, r12
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ANDI r10, r6, 255d
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ANDI r11, r7, 255d
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ADD64 r9, r4, r5
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ADD64 r10, r5, r6
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ADD64 r1, r9, r10
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ADD64 r1, r10, r11
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LD r31, r254, 4a, 8h
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LD r31, r254, 8a, 16h
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ADDI64 r254, r254, 12d
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ADDI64 r254, r254, 24d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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random_color:
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random_color:
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LRA r1, r0, :white
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LRA r1, r0, :white
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LD r1, r1, 0a, 4h
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LD r1, r1, 0a, 4h
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 246
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code size: 241
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ret: 764
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ret: 1020
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status: Ok(())
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status: Ok(())
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@ -1,26 +1,25 @@
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main:
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main:
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ADDI64 r254, r254, -96d
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ADDI64 r254, r254, -80d
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ST r31, r254, 64a, 32h
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ST r31, r254, 48a, 32h
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LI64 r2, 4d
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LI64 r2, 4d
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ADDI64 r32, r254, 48d
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ADDI64 r32, r254, 32d
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ST r2, r254, 48a, 8h
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ST r2, r254, 32a, 8h
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LI64 r33, 3d
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LI64 r33, 3d
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ST r33, r254, 56a, 8h
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ST r33, r254, 40a, 8h
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ADDI64 r34, r254, 0d
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ADDI64 r34, r254, 16d
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LD r3, r32, 0a, 16h
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LD r3, r32, 0a, 16h
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JAL r31, r0, :odher_pass
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JAL r31, r0, :odher_pass
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ST r1, r254, 0a, 16h
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ST r1, r254, 16a, 16h
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ADDI64 r11, r254, 16d
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ADDI64 r11, r254, 0d
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BMC r32, r11, 16h
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BMC r32, r11, 16h
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ADDI64 r2, r254, 32d
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LD r4, r254, 24a, 8h
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BMC r34, r2, 16h
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JNE r4, r33, :0
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LD r7, r254, 40a, 8h
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CP r2, r34
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JNE r7, r33, :0
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JAL r31, r0, :pass
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JAL r31, r0, :pass
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JMP :1
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JMP :1
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0: LI64 r1, 0d
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0: LI64 r1, 0d
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1: LD r31, r254, 64a, 32h
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1: LD r31, r254, 48a, 32h
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ADDI64 r254, r254, 96d
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ADDI64 r254, r254, 80d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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odher_pass:
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odher_pass:
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ADDI64 r254, r254, -16d
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ADDI64 r254, r254, -16d
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@ -32,6 +31,6 @@ odher_pass:
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pass:
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pass:
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LD r1, r2, 0a, 8h
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LD r1, r2, 0a, 8h
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 334
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code size: 321
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ret: 4
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ret: 4
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status: Ok(())
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status: Ok(())
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@ -1,49 +1,45 @@
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main:
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main:
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ADDI64 r254, r254, -48d
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ADDI64 r254, r254, -24d
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ST r31, r254, 32a, 16h
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ST r31, r254, 16a, 8h
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ADDI64 r32, r254, 16d
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ADDI64 r3, r254, 0d
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LI64 r4, 0d
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LI64 r4, 0d
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CP r3, r4
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CP r3, r4
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JAL r31, r0, :maina
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JAL r31, r0, :maina
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ST r1, r254, 16a, 16h
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ST r1, r254, 0a, 16h
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ADDI64 r7, r254, 0d
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LD r9, r254, 12a, 1h
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BMC r32, r7, 16h
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LD r8, r254, 3a, 1h
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LD r12, r254, 12a, 1h
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SUB8 r12, r8, r9
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LD r11, r254, 3a, 1h
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ANDI r1, r12, 255d
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SUB8 r3, r11, r12
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LD r31, r254, 16a, 8h
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ANDI r1, r3, 255d
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ADDI64 r254, r254, 24d
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LD r31, r254, 32a, 16h
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ADDI64 r254, r254, 48d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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maina:
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maina:
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ADDI64 r254, r254, -56d
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ADDI64 r254, r254, -44d
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ST r31, r254, 40a, 16h
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ST r31, r254, 36a, 8h
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ADDI64 r32, r254, 36d
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ADDI64 r6, r254, 16d
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JAL r31, r0, :small_struct
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JAL r31, r0, :small_struct
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ST r1, r254, 36a, 4h
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ST r1, r254, 16a, 4h
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ADDI64 r9, r254, 32d
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LI8 r11, 0b
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BMC r32, r9, 4h
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ADDI64 r10, r254, 0d
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LI8 r2, 0b
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ST r11, r254, 0a, 1h
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ADDI64 r1, r254, 24d
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ST r11, r254, 1a, 1h
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ST r2, r254, 24a, 1h
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ST r11, r254, 2a, 1h
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ST r2, r254, 25a, 1h
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LI8 r4, 3b
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ST r2, r254, 26a, 1h
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ST r4, r254, 3a, 1h
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LI8 r7, 3b
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LI8 r7, 1b
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ST r7, r254, 27a, 1h
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ST r7, r254, 4a, 1h
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LI8 r10, 1b
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ST r11, r254, 5a, 1h
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ST r10, r254, 28a, 1h
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ST r11, r254, 6a, 1h
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ST r2, r254, 29a, 1h
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ST r11, r254, 7a, 1h
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ST r2, r254, 30a, 1h
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ADDI64 r1, r254, 8d
|
||||||
ST r2, r254, 31a, 1h
|
BMC r10, r1, 8h
|
||||||
ADDI64 r4, r254, 16d
|
ADDI64 r4, r254, 20d
|
||||||
BMC r1, r4, 8h
|
BMC r10, r4, 8h
|
||||||
ADDI64 r7, r254, 0d
|
ADDI64 r7, r4, 8d
|
||||||
BMC r1, r7, 8h
|
BMC r1, r7, 8h
|
||||||
ADDI64 r10, r7, 8d
|
LD r1, r4, 0a, 16h
|
||||||
BMC r4, r10, 8h
|
LD r31, r254, 36a, 8h
|
||||||
LD r1, r7, 0a, 16h
|
ADDI64 r254, r254, 44d
|
||||||
LD r31, r254, 40a, 16h
|
|
||||||
ADDI64 r254, r254, 56d
|
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
small_struct:
|
small_struct:
|
||||||
ADDI64 r254, r254, -4d
|
ADDI64 r254, r254, -4d
|
||||||
|
@ -54,6 +50,6 @@ small_struct:
|
||||||
LD r1, r3, 0a, 4h
|
LD r1, r3, 0a, 4h
|
||||||
ADDI64 r254, r254, 4d
|
ADDI64 r254, r254, 4d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 546
|
code size: 514
|
||||||
ret: 2
|
ret: 2
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
Loading…
Reference in a new issue