forked from AbleOS/holey-bytes
fixing nasty bug
This commit is contained in:
parent
f386c332e5
commit
f5ef62c6bb
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@ -331,10 +331,11 @@ function cacheInputs(target) {
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}
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}
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}
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}
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function updaetTab() {
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/** @param {string} [path] */
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function updaetTab(path) {
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for (const elem of document.querySelectorAll("button[hx-push-url]")) {
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for (const elem of document.querySelectorAll("button[hx-push-url]")) {
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if (elem instanceof HTMLButtonElement)
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if (elem instanceof HTMLButtonElement)
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elem.disabled = elem.getAttribute("hx-push-url") === window.location.pathname;
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elem.disabled = elem.getAttribute("hx-push-url") === (path ?? window.location.pathname);
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}
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}
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}
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}
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@ -368,17 +369,11 @@ if (window.location.hostname === 'localhost') {
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document.body.addEventListener('htmx:afterSwap', (ev) => {
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document.body.addEventListener('htmx:afterSwap', (ev) => {
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if (!(ev.target instanceof HTMLElement)) never();
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if (!(ev.target instanceof HTMLElement)) never();
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wireUp(ev.target);
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wireUp(ev.target);
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if (ev.target.tagName == "MAIN") updaetTab();
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if (ev.target.tagName == "MAIN" || ev.target.tagName == "BODY")
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updaetTab(ev['detail'].pathInfo.finalRequestPath);
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console.log(ev);
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});
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});
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//document.body.addEventListener('htmx:beforeSend', (ev) => {
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// const target = ev.target;
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// if (target instanceof HTMLButtonElement && target.hasAttribute("hx-push-url")) {
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//
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// document.getElementById("extra-style").textContent = `[hx-push-url="${target.getAttribute("hx-push-url")}"]{background: var(--primary)}`
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// }
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//});
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getFmtInstance().then(inst => {
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getFmtInstance().then(inst => {
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document.body.addEventListener('htmx:configRequest', (ev) => {
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document.body.addEventListener('htmx:configRequest', (ev) => {
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const details = ev['detail'];
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const details = ev['detail'];
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@ -175,8 +175,8 @@ impl Page for Feed {
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let mut last_timestamp = None;
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let mut last_timestamp = None;
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for post in cursor {
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for post in cursor {
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write!(buf, "{}", post).unwrap();
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write!(buf, "{}", post).unwrap();
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last_timestamp = Some(post.timestamp);
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if buf.len() - base_len > MAX_FEED_SIZE {
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if buf.len() - base_len > MAX_FEED_SIZE {
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last_timestamp = Some(post.timestamp);
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break;
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break;
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}
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}
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}
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}
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@ -561,9 +561,6 @@ fn base(body: impl FnOnce(&mut String), path: &str, session: Option<&Session>) -
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<meta name="charset" content="UTF-8">
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<meta name="charset" content="UTF-8">
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<meta name="viewport" content="width=device-width, initial-scale=1">
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<meta name="viewport" content="width=device-width, initial-scale=1">
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<link rel="stylesheet" href="/index.css">
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<link rel="stylesheet" href="/index.css">
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//<style id="extra-style">
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// "[hx-push-url='" !path "']{background:var(--primary)}"
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//</style>
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</head>
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</head>
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<body>
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<body>
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<nav>
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<nav>
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@ -204,7 +204,15 @@ Rect := struct {
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b: Point,
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b: Point,
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}
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}
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Color := packed struct {b: u8, g: u8, r: u8, a: u8}
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main := fn(): int {
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main := fn(): int {
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i := Color.(0, 0, 0, 0)
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i += .(1, 1, 1, 1)
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if i.r + i.g + i.b + i.a != 4 {
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return 1008
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}
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a := Point.(1, 2)
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a := Point.(1, 2)
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b := Point.(3, 4)
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b := Point.(3, 4)
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@ -13,6 +13,7 @@ use {
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},
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},
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alloc::{boxed::Box, string::String, vec::Vec},
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alloc::{boxed::Box, string::String, vec::Vec},
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core::fmt::Display,
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core::fmt::Display,
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std::assert_matches::debug_assert_matches,
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};
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};
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type Offset = u32;
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type Offset = u32;
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@ -409,7 +410,7 @@ impl Loc {
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}
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}
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fn is_reg(&self) -> bool {
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fn is_reg(&self) -> bool {
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matches!(self, Self::Rt { derefed: false, reg: _, stack: None, offset: 0 })
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matches!(self, Self::Rt { derefed: false, reg: _, stack, offset } if ({ debug_assert_eq!(*offset, 0); debug_assert_matches!(stack, None); true }))
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}
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}
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}
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}
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@ -2126,7 +2127,7 @@ impl Codegen {
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let size = self.tys.size_of(ty);
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let size = self.tys.size_of(ty);
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match size {
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match size {
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0 => Loc::default(),
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0 => Loc::default(),
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1..=8 => Loc::reg(self.loc_to_reg(loc, size)),
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1..=8 if !loc.is_stack() => Loc::reg(self.loc_to_reg(loc, size)),
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_ if loc.is_ref() => {
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_ if loc.is_ref() => {
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let new_loc = Loc::stack(self.ci.stack.allocate(size));
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let new_loc = Loc::stack(self.ci.stack.allocate(size));
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self.store_sized(loc, &new_loc, size);
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self.store_sized(loc, &new_loc, size);
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@ -2367,7 +2368,17 @@ impl Codegen {
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let value = ensure_loaded(value, derefed, size) << (8 * (off % 8));
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let value = ensure_loaded(value, derefed, size) << (8 * (off % 8));
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self.ci.emit(ori(freg, freg, value));
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self.ci.emit(ori(freg, freg, value));
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}
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}
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(lpat!(true, src, soff, ref ssta), lpat!(true, dst, doff, ref dsta)) => {
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(lpat!(true, src, soff, ref ssta), lpat!(true, dst, doff, ref dsta)) => 'a: {
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if size <= 8 {
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let tmp = self.ci.regs.allocate();
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let off = self.opt_stack_reloc(ssta.as_ref(), soff, 3);
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self.ci.emit(ld(tmp.get(), src.get(), off, size as _));
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let off = self.opt_stack_reloc(dsta.as_ref(), soff, 3);
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self.ci.emit(st(tmp.get(), dst.get(), off, size as _));
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self.ci.regs.free(tmp);
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break 'a;
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}
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// TODO: some oportuinies to ellit more optimal code
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// TODO: some oportuinies to ellit more optimal code
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let src_off = if src.is_ref() { self.ci.regs.allocate() } else { src.as_ref() };
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let src_off = if src.is_ref() { self.ci.regs.allocate() } else { src.as_ref() };
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let dst_off = if dst.is_ref() { self.ci.regs.allocate() } else { dst.as_ref() };
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let dst_off = if dst.is_ref() { self.ci.regs.allocate() } else { dst.as_ref() };
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@ -1,6 +1,6 @@
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main:
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main:
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ADDI64 r254, r254, -80d
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ADDI64 r254, r254, -76d
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ST r31, r254, 32a, 48h
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ST r31, r254, 28a, 48h
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LI64 r32, 511d
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LI64 r32, 511d
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LI64 r33, 0d
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LI64 r33, 0d
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ST r33, r254, 0a, 1h
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ST r33, r254, 0a, 1h
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@ -13,29 +13,26 @@ main:
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SRUI16 r33, r33, 8b
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SRUI16 r33, r33, 8b
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ANDI r33, r33, 255d
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ANDI r33, r33, 255d
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ST r33, r254, 3a, 1h
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ST r33, r254, 3a, 1h
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CP r33, r0
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ADDI64 r33, r254, 0d
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LD r33, r254, 0a, 4h
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ST r33, r254, 4a, 4h
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ADDI64 r33, r254, 4d
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LI64 r34, 1d
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LI64 r34, 1d
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ST r34, r254, 8a, 8h
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ST r34, r254, 4a, 8h
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LI64 r34, 2d
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LI64 r34, 2d
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ST r34, r254, 16a, 8h
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ST r34, r254, 12a, 8h
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LI64 r34, 4d
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LI64 r34, 4d
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ST r34, r254, 24a, 8h
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ST r34, r254, 20a, 8h
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ADDI64 r34, r254, 8d
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ADDI64 r34, r254, 4d
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CP r2, r34
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CP r2, r34
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JAL r31, r0, :pass
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JAL r31, r0, :pass
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CP r34, r1
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CP r34, r1
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ADDI64 r35, r254, 4d
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ADDI64 r35, r254, 0d
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LI64 r36, 3d
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LI64 r36, 3d
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ADD64 r35, r35, r36
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ADD64 r35, r35, r36
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CP r36, r0
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CP r36, r0
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LD r36, r35, 4a, 1h
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LD r36, r35, 0a, 1h
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SXT8 r36, r36
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SXT8 r36, r36
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ADD64 r1, r34, r36
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ADD64 r1, r34, r36
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LD r31, r254, 32a, 48h
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LD r31, r254, 28a, 48h
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ADDI64 r254, r254, 80d
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ADDI64 r254, r254, 76d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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pass:
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pass:
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ADDI64 r254, r254, -48d
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ADDI64 r254, r254, -48d
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@ -65,6 +62,6 @@ pass:
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LD r31, r254, 0a, 48h
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LD r31, r254, 0a, 48h
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ADDI64 r254, r254, 48d
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ADDI64 r254, r254, 48d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 586
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code size: 557
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ret: 7
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ret: 8
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status: Ok(())
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status: Ok(())
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@ -75,8 +75,8 @@ new:
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ADDI64 r254, r254, 24d
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ADDI64 r254, r254, 24d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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push:
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push:
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ADDI64 r254, r254, -72d
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ADDI64 r254, r254, -80d
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ST r31, r254, 0a, 72h
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ST r31, r254, 0a, 80h
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CP r32, r2
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CP r32, r2
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CP r33, r3
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CP r33, r3
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LD r34, r32, 8a, 8h
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LD r34, r32, 8a, 8h
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@ -111,7 +111,8 @@ push:
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JMP :6
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JMP :6
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5: CP r38, r36
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5: CP r38, r36
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CP r39, r35
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CP r39, r35
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BMC r39, r38, 8h
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LD r40, r39, 0a, 8h
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ST r40, r38, 0a, 8h
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ADDI64 r35, r35, 8d
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ADDI64 r35, r35, 8d
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ADDI64 r36, r36, 8d
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ADDI64 r36, r36, 8d
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JMP :7
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JMP :7
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@ -135,9 +136,9 @@ push:
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ADDI64 r38, r38, 1d
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ADDI64 r38, r38, 1d
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ST r38, r32, 8a, 8h
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ST r38, r32, 8a, 8h
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CP r1, r39
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CP r1, r39
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4: LD r31, r254, 0a, 72h
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4: LD r31, r254, 0a, 80h
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ADDI64 r254, r254, 72d
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ADDI64 r254, r254, 80d
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JALA r0, r31, 0a
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JALA r0, r31, 0a
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code size: 1204
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code size: 1225
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ret: 69
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ret: 69
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status: Ok(())
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status: Ok(())
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@ -1,75 +1,130 @@
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main:
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main:
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ADDI64 r254, r254, -152d
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ADDI64 r254, r254, -160d
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ST r31, r254, 128a, 24h
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ST r31, r254, 136a, 24h
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LI64 r32, 0d
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ST r32, r254, 0a, 1h
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LI64 r32, 0d
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ST r32, r254, 1a, 1h
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LI64 r32, 0d
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ST r32, r254, 2a, 1h
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LI64 r32, 0d
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ST r32, r254, 3a, 1h
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LI64 r32, 1d
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LI64 r32, 1d
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ST r32, r254, 0a, 8h
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ST r32, r254, 4a, 1h
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LI64 r32, 2d
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LI64 r32, 1d
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ST r32, r254, 8a, 8h
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ST r32, r254, 5a, 1h
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LI64 r32, 3d
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LI64 r32, 1d
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ST r32, r254, 16a, 8h
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ST r32, r254, 6a, 1h
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LI64 r32, 4d
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LI64 r32, 1d
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ST r32, r254, 24a, 8h
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ST r32, r254, 7a, 1h
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LD r32, r254, 0a, 8h
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CP r32, r0
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LD r33, r254, 16a, 8h
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LD r32, r254, 0a, 1h
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ADD64 r32, r32, r33
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CP r33, r0
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ST r32, r254, 32a, 8h
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LD r33, r254, 4a, 1h
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LD r32, r254, 8a, 8h
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ADD8 r32, r32, r33
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LD r33, r254, 24a, 8h
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ST r32, r254, 0a, 1h
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ADD64 r32, r32, r33
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CP r32, r0
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ST r32, r254, 40a, 8h
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LD r32, r254, 1a, 1h
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LD r32, r254, 16a, 8h
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CP r33, r0
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LD r33, r254, 0a, 8h
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LD r33, r254, 5a, 1h
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SUB64 r32, r32, r33
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ADD8 r32, r32, r33
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ST r32, r254, 48a, 8h
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ST r32, r254, 1a, 1h
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LD r32, r254, 24a, 8h
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CP r32, r0
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LD r32, r254, 2a, 1h
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CP r33, r0
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LD r33, r254, 6a, 1h
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ADD8 r32, r32, r33
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ST r32, r254, 2a, 1h
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CP r32, r0
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LD r32, r254, 3a, 1h
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CP r33, r0
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LD r33, r254, 7a, 1h
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ADD8 r32, r32, r33
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ST r32, r254, 3a, 1h
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CP r32, r0
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LD r32, r254, 2a, 1h
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CP r33, r0
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LD r33, r254, 1a, 1h
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ADD8 r32, r32, r33
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CP r33, r0
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LD r33, r254, 0a, 1h
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ADD8 r32, r32, r33
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CP r33, r0
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LD r33, r254, 3a, 1h
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ADD8 r32, r32, r33
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LI64 r33, 4d
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JEQ r32, r33, :0
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LI64 r1, 1008d
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JMP :1
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0: LI64 r33, 1d
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ST r33, r254, 8a, 8h
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LI64 r33, 2d
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ST r33, r254, 16a, 8h
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LI64 r33, 3d
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ST r33, r254, 24a, 8h
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LI64 r33, 4d
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ST r33, r254, 32a, 8h
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LD r33, r254, 8a, 8h
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LD r33, r254, 8a, 8h
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SUB64 r32, r32, r33
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LD r32, r254, 24a, 8h
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ST r32, r254, 56a, 8h
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ADD64 r33, r33, r32
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LI64 r32, 0d
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ST r33, r254, 40a, 8h
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ST r32, r254, 64a, 8h
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LI64 r32, 0d
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ST r32, r254, 72a, 8h
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LD r32, r254, 64a, 8h
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LD r33, r254, 16a, 8h
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LD r33, r254, 16a, 8h
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SUB64 r32, r32, r33
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ST r32, r254, 80a, 8h
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LD r32, r254, 72a, 8h
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LD r33, r254, 24a, 8h
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SUB64 r32, r32, r33
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ST r32, r254, 88a, 8h
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ADDI64 r32, r254, 0d
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ADDI64 r33, r254, 96d
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BMC r32, r33, 16h
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LD r33, r254, 80a, 8h
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LD r32, r254, 32a, 8h
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LD r32, r254, 32a, 8h
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ADD64 r33, r33, r32
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ADD64 r33, r33, r32
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ST r33, r254, 48a, 8h
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LD r33, r254, 24a, 8h
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LD r32, r254, 8a, 8h
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SUB64 r33, r33, r32
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ST r33, r254, 56a, 8h
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LD r33, r254, 32a, 8h
|
||||||
|
LD r32, r254, 16a, 8h
|
||||||
|
SUB64 r33, r33, r32
|
||||||
|
ST r33, r254, 64a, 8h
|
||||||
|
LI64 r33, 0d
|
||||||
|
ST r33, r254, 72a, 8h
|
||||||
|
LI64 r33, 0d
|
||||||
ST r33, r254, 80a, 8h
|
ST r33, r254, 80a, 8h
|
||||||
LD r33, r254, 88a, 8h
|
LD r33, r254, 72a, 8h
|
||||||
LD r32, r254, 40a, 8h
|
LD r32, r254, 24a, 8h
|
||||||
ADD64 r33, r33, r32
|
SUB64 r33, r33, r32
|
||||||
ST r33, r254, 88a, 8h
|
ST r33, r254, 88a, 8h
|
||||||
LD r33, r254, 96a, 8h
|
|
||||||
LD r32, r254, 48a, 8h
|
|
||||||
ADD64 r33, r33, r32
|
|
||||||
ST r33, r254, 96a, 8h
|
|
||||||
LD r33, r254, 104a, 8h
|
|
||||||
LD r32, r254, 56a, 8h
|
|
||||||
ADD64 r33, r33, r32
|
|
||||||
ST r33, r254, 104a, 8h
|
|
||||||
LD r33, r254, 80a, 8h
|
LD r33, r254, 80a, 8h
|
||||||
|
LD r32, r254, 32a, 8h
|
||||||
|
SUB64 r33, r33, r32
|
||||||
|
ST r33, r254, 96a, 8h
|
||||||
|
ADDI64 r33, r254, 8d
|
||||||
|
ADDI64 r32, r254, 104d
|
||||||
|
BMC r33, r32, 16h
|
||||||
|
LD r32, r254, 88a, 8h
|
||||||
|
LD r33, r254, 40a, 8h
|
||||||
|
ADD64 r32, r32, r33
|
||||||
|
ST r32, r254, 88a, 8h
|
||||||
LD r32, r254, 96a, 8h
|
LD r32, r254, 96a, 8h
|
||||||
ADD64 r33, r33, r32
|
LD r33, r254, 48a, 8h
|
||||||
ST r33, r254, 112a, 8h
|
ADD64 r32, r32, r33
|
||||||
LD r33, r254, 88a, 8h
|
ST r32, r254, 96a, 8h
|
||||||
LD r32, r254, 104a, 8h
|
LD r32, r254, 104a, 8h
|
||||||
ADD64 r33, r33, r32
|
LD r33, r254, 56a, 8h
|
||||||
ST r33, r254, 120a, 8h
|
ADD64 r32, r32, r33
|
||||||
|
ST r32, r254, 104a, 8h
|
||||||
|
LD r32, r254, 112a, 8h
|
||||||
|
LD r33, r254, 64a, 8h
|
||||||
|
ADD64 r32, r32, r33
|
||||||
|
ST r32, r254, 112a, 8h
|
||||||
|
LD r32, r254, 88a, 8h
|
||||||
|
LD r33, r254, 104a, 8h
|
||||||
|
ADD64 r32, r32, r33
|
||||||
|
ST r32, r254, 120a, 8h
|
||||||
|
LD r32, r254, 96a, 8h
|
||||||
LD r33, r254, 112a, 8h
|
LD r33, r254, 112a, 8h
|
||||||
|
ADD64 r32, r32, r33
|
||||||
|
ST r32, r254, 128a, 8h
|
||||||
LD r32, r254, 120a, 8h
|
LD r32, r254, 120a, 8h
|
||||||
ADD64 r1, r33, r32
|
LD r33, r254, 128a, 8h
|
||||||
LD r31, r254, 128a, 24h
|
ADD64 r1, r32, r33
|
||||||
ADDI64 r254, r254, 152d
|
1: LD r31, r254, 136a, 24h
|
||||||
|
ADDI64 r254, r254, 160d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 778
|
code size: 1264
|
||||||
ret: 10
|
ret: 10
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -40,26 +40,25 @@ fib_iter:
|
||||||
ADDI64 r254, r254, 40d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -42d
|
ADDI64 r254, r254, -34d
|
||||||
ST r31, r254, 2a, 40h
|
ST r31, r254, 2a, 32h
|
||||||
LI64 r32, 10d
|
LI64 r32, 10d
|
||||||
ST r32, r254, 0a, 1h
|
ST r32, r254, 0a, 1h
|
||||||
LI64 r32, 10d
|
LI64 r32, 10d
|
||||||
ST r32, r254, 1a, 1h
|
ST r32, r254, 1a, 1h
|
||||||
CP r32, r0
|
CP r32, r0
|
||||||
LD r32, r254, 0a, 1h
|
LD r32, r254, 1a, 1h
|
||||||
CP r33, r0
|
CP r2, r0
|
||||||
LD r33, r254, 1a, 1h
|
LD r2, r254, 0a, 1h
|
||||||
CP r2, r32
|
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
CP r34, r1
|
CP r33, r1
|
||||||
CP r2, r33
|
CP r2, r32
|
||||||
JAL r31, r0, :fib_iter
|
JAL r31, r0, :fib_iter
|
||||||
CP r35, r1
|
CP r34, r1
|
||||||
SUB64 r1, r34, r35
|
SUB64 r1, r33, r34
|
||||||
LD r31, r254, 2a, 40h
|
LD r31, r254, 2a, 32h
|
||||||
ADDI64 r254, r254, 42d
|
ADDI64 r254, r254, 34d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 452
|
code size: 449
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -23,7 +23,8 @@ main:
|
||||||
ST r34, r254, 7a, 1h
|
ST r34, r254, 7a, 1h
|
||||||
LD r34, r254, 0a, 8h
|
LD r34, r254, 0a, 8h
|
||||||
ST r34, r254, 8a, 8h
|
ST r34, r254, 8a, 8h
|
||||||
ST r34, r254, 16a, 8h
|
LD r34, r254, 0a, 8h
|
||||||
|
ST r34, r254, 8a, 8h
|
||||||
LD r1, r254, 8a, 16h
|
LD r1, r254, 8a, 16h
|
||||||
LD r31, r254, 24a, 32h
|
LD r31, r254, 24a, 32h
|
||||||
ADDI64 r254, r254, 56d
|
ADDI64 r254, r254, 56d
|
||||||
|
@ -40,6 +41,6 @@ small_struct:
|
||||||
LD r31, r254, 4a, 16h
|
LD r31, r254, 4a, 16h
|
||||||
ADDI64 r254, r254, 20d
|
ADDI64 r254, r254, 20d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 440
|
code size: 453
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
Loading…
Reference in a new issue