forked from AbleOS/holey-bytes
fixed imm shl/r
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4ca4e81ac3
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fce3fa5210
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@ -48,19 +48,16 @@ macro_rules! binary_op {
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),
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),
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);
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);
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}};
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}};
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}
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/// Parform bitshift operations
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($self:expr, $ty:ident, $handler:expr, $con:ty) => {{
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macro_rules! binary_op_sh {
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($self:expr, $ty:ident, $handler:expr) => {{
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let ParamBBB(tg, a0, a1) = param!($self, ParamBBB);
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let ParamBBB(tg, a0, a1) = param!($self, ParamBBB);
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$self.write_reg(
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$self.write_reg(
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tg,
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tg,
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$handler(
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$handler(
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Value::$ty(&$self.read_reg(a0)),
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Value::$ty(&$self.read_reg(a0)),
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$self.read_reg(a1).as_u64() as u32,
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Value::$ty(&$self.read_reg(a1)) as $con,
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)
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),
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)
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);
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}};
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}};
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}
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}
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@ -73,6 +70,14 @@ macro_rules! binary_op_imm {
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$handler(Value::$ty(&$self.read_reg(a0)), Value::$ty(&imm.into())),
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$handler(Value::$ty(&$self.read_reg(a0)), Value::$ty(&imm.into())),
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);
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);
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}};
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}};
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($self:expr, $ty:ident, $handler:expr, $con:ty) => {{
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let ParamBBD(tg, a0, imm) = param!($self, ParamBBD);
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$self.write_reg(
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tg,
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$handler(Value::$ty(&$self.read_reg(a0)), Value::$ty(&imm.into()) as $con),
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);
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}};
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}
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}
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/// Jump at `#3` if ordering on `#0 <=> #1` is equal to expected
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/// Jump at `#3` if ordering on `#0 <=> #1` is equal to expected
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@ -182,9 +187,9 @@ impl<'a, PfHandler: HandlePageFault, const TIMER_QUOTIENT: usize>
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AND => binary_op!(self, as_u64, ops::BitAnd::bitand),
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AND => binary_op!(self, as_u64, ops::BitAnd::bitand),
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OR => binary_op!(self, as_u64, ops::BitOr::bitor),
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OR => binary_op!(self, as_u64, ops::BitOr::bitor),
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XOR => binary_op!(self, as_u64, ops::BitXor::bitxor),
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XOR => binary_op!(self, as_u64, ops::BitXor::bitxor),
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SL => binary_op_sh!(self, as_u64, u64::wrapping_shl),
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SL => binary_op!(self, as_u64, u64::wrapping_shl, u32),
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SR => binary_op_sh!(self, as_u64, u64::wrapping_shr),
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SR => binary_op!(self, as_u64, u64::wrapping_shr, u32),
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SRS => binary_op_sh!(self, as_i64, i64::wrapping_shr),
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SRS => binary_op!(self, as_i64, i64::wrapping_shr, u32),
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CMP => {
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CMP => {
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// Compare a0 <=> a1
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// Compare a0 <=> a1
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// < → -1
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// < → -1
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@ -234,9 +239,9 @@ impl<'a, PfHandler: HandlePageFault, const TIMER_QUOTIENT: usize>
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ANDI => binary_op_imm!(self, as_u64, ops::BitAnd::bitand),
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ANDI => binary_op_imm!(self, as_u64, ops::BitAnd::bitand),
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ORI => binary_op_imm!(self, as_u64, ops::BitOr::bitor),
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ORI => binary_op_imm!(self, as_u64, ops::BitOr::bitor),
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XORI => binary_op_imm!(self, as_u64, ops::BitXor::bitxor),
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XORI => binary_op_imm!(self, as_u64, ops::BitXor::bitxor),
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SLI => binary_op_imm!(self, as_u64, ops::Shl::shl),
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SLI => binary_op_imm!(self, as_u64, u64::wrapping_shl, u32),
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SRI => binary_op_imm!(self, as_u64, ops::Shr::shr),
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SRI => binary_op_imm!(self, as_u64, u64::wrapping_shr, u32),
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SRSI => binary_op_imm!(self, as_i64, ops::Shr::shr),
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SRSI => binary_op_imm!(self, as_i64, i64::wrapping_shr, u32),
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CMPI => {
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CMPI => {
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let ParamBBD(tg, a0, imm) = param!(self, ParamBBD);
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let ParamBBD(tg, a0, imm) = param!(self, ParamBBD);
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self.write_reg(
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self.write_reg(
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