forked from AbleOS/holey-bytes
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28958d0810
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fef23d0f93
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@ -5,6 +5,14 @@ this leaves us with an amount of registers that should be defined
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I'd like to use a letter and a number to represent registers
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like `a0` or `d0` the first of which would be reserved for 8 bit numbers and the later of which 64 bit.
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holeybytes will be a load-store machine
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instructions
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### NOP
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`0`
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4
assets/example.asm
Normal file
4
assets/example.asm
Normal file
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@ -0,0 +1,4 @@
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load 0 a0 ;; 05 00 A0
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load 10 a1 ;; 05 10 A1
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add a0 1 a0 ;; 01 A0 01 A0
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jump_neq a0 a1 0 ;; a1 A0 A1 0
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4
assets/example.bytes
Normal file
4
assets/example.bytes
Normal file
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@ -0,0 +1,4 @@
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load 10 A1
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load 0 A0
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add A0 1
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jump_less_than A0 A1
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3
rustfmt.toml
Normal file
3
rustfmt.toml
Normal file
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@ -0,0 +1,3 @@
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hex_literal_case = "Upper"
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imports_granularity = "One"
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struct_field_align_threshold = 5
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@ -6,27 +6,38 @@ pub enum Operations {
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MUL = 3,
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DIV = 4,
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// READs a register/memory address/constant into a register
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READ = 5,
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// WRITEs a register/memory address/constant into a memory address
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WRITE = 6,
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// LOADs a memory address/constant into a register
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LOAD = 5,
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// STOREs a register/constant into a memory address
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STORE = 6,
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JUMP = 100,
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JumpEq = 101,
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JumpNeq = 102,
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JumpCond = 101,
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RET = 103,
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}
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pub enum MathTypes {
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pub enum SubTypes {
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EightBit = 1,
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SixtyFourBit = 2,
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Register8 = 3,
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Register64 = 4,
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}
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pub enum MathOpSubTypes {
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Unsigned = 0,
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Signed = 1,
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FloatingPoint = 2,
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}
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pub enum RWTypes {
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RegisterToAddress = 0,
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RegisterToRegister = 1,
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ConstantToAddress = 2,
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ConstantToRegister = 3,
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AddressToRegister = 4,
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AddressToAddress = 5,
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pub enum RWSubTypes {
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AddrToReg = 0,
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RegToAddr,
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ConstToReg,
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ConstToAddr,
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}
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pub enum JumpConditionals {
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Equal = 0,
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NotEqual = 1,
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LessThan = 2,
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GreaterThan = 3,
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}
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@ -1,4 +1,4 @@
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pub type CallStack = Vec<FnCall>;
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pub struct FnCall {
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ret: usize,
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pub ret: usize,
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}
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@ -2,17 +2,22 @@ pub mod call_stack;
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pub mod config;
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pub mod regs;
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use crate::bytecode::ops::Operations::*;
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use crate::bytecode::ops::*;
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use crate::bytecode::types::*;
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use crate::engine::call_stack::FnCall;
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use crate::HaltStatus;
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use crate::Page;
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use crate::RuntimeErrors;
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use config::EngineConfig;
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use regs::Registers;
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use self::call_stack::CallStack;
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pub struct Page {
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pub data: [u8; 4096 * 2],
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}
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pub struct Engine {
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pub index: usize,
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program: Vec<u8>,
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@ -26,6 +31,13 @@ pub struct Engine {
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call_stack: CallStack,
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}
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impl Engine {
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pub fn read_mem_addr(&mut self, address: u64) -> u8 {
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// println!("{}", address);
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255
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}
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}
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impl Engine {
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pub fn new(program: Vec<u8>) -> Self {
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Self {
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@ -129,11 +141,11 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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use RuntimeErrors::*;
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loop {
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// Break out of the loop
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if self.index == self.program.len() {
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if self.index + 1 == self.program.len() {
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break;
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}
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let op = (self.program[self.index], self.program[self.index + 1]);
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println!("OP {} INDEX {}", op.0, self.index);
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// println!("OP {} INDEX {}", op.0, self.index);
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match op {
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(0, _) => {
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println!("NO OP");
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@ -142,9 +154,9 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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// Add a 8 bit num
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(1, 1) => {
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let lhs = self.program[self.index + 2];
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println!("LHS 8BIT {}", lhs);
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// println!("LHS 8BIT {}", lhs);
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let rhs = self.program[self.index + 3];
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println!("RHS 8BIT {}", rhs);
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// println!("RHS 8BIT {}", rhs);
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let ret = lhs + rhs;
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let reg = self.program[self.index + 4];
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@ -161,7 +173,7 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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}
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}
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self.index += 5;
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self.index += 4;
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}
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// Add a 64 bit num
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(1, 2) => {
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@ -175,7 +187,7 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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lhs_array[index] = *byte;
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}
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let lhs = u64::from_be_bytes(lhs_array);
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println!("LHS 64BIT {}", lhs);
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// println!("LHS 64BIT {}", lhs);
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for (index, byte) in self.program[self.index + 10..self.index + 18]
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.into_iter()
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@ -186,12 +198,12 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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let rhs = u64::from_be_bytes(rhs_array);
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println!("RHS 64BIT {}", rhs);
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// println!("RHS 64BIT {}", rhs);
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let ret = lhs + rhs;
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let reg = self.program[self.index + 18];
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println!("Store {} in {:02X}", ret, reg);
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// println!("Store {} in {:02X}", ret, reg);
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match reg {
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0xA0..=0xC9 => {
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@ -207,8 +219,132 @@ F5-F9 {:016X} {:016X} {:016X} {:016X} {:016X}",
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self.index += 19;
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}
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op_pair => {
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println!("OP Pair {}", op_pair.0);
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(2, 1) => {
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let lhs = self.program[self.index + 2];
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// println!("LHS 8BIT {}", lhs);
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let rhs = self.program[self.index + 3];
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// println!("RHS 8BIT {}", rhs);
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let ret = lhs - rhs;
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let reg = self.program[self.index + 4];
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match reg {
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0xA0..=0xC9 => {
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self.set_register_8(reg, ret);
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}
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0xD0..=0xF9 => {
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panic!("Register oversized")
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}
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_ => {
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panic!("Not a register.")
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}
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}
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self.index += 4;
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}
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(2, 2) => {
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let mut lhs_array = [0; 8];
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let mut rhs_array = [0; 8];
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for (index, byte) in self.program[self.index + 2..self.index + 10]
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.into_iter()
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.enumerate()
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{
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lhs_array[index] = *byte;
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}
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let lhs = u64::from_be_bytes(lhs_array);
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// println!("LHS 64BIT {}", lhs);
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for (index, byte) in self.program[self.index + 10..self.index + 18]
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.into_iter()
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.enumerate()
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{
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rhs_array[index] = *byte;
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}
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let rhs = u64::from_be_bytes(rhs_array);
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// println!("RHS 64BIT {}", rhs);
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let ret = lhs - rhs;
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let reg = self.program[self.index + 18];
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// println!("Store {} in {:02X}", ret, reg);
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match reg {
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0xA0..=0xC9 => {
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panic!("Register undersized")
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}
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0xD0..=0xF9 => {
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self.set_register_64(reg, ret);
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}
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_ => {
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panic!("Not a register.")
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}
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}
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self.index += 19;
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}
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(2, 3) => {
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// 8 bit
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self.index += 4;
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}
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// TODO: Implement 64 bit register to register subtraction
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(2, 4) => {
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// 64 bit
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self.index += 19;
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}
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// Read from address to register
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(5, 0) => {
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let mut addr_array = [0; 8];
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for (index, byte) in self.program[self.index + 2..self.index + 10]
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.into_iter()
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.enumerate()
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{
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addr_array[index] = *byte;
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}
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let addr = u64::from_be_bytes(addr_array);
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println!("addr {}", addr);
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let ret = self.read_mem_addr(addr);
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let reg = self.program[self.index + 10];
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println!("reg {}", reg);
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self.set_register_8(reg, ret);
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self.index += 9;
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}
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(100, _) => {
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if self.call_stack.len() > self.config.call_stack_depth {
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panic!("Callstack {}", self.call_stack.len());
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}
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let mut addr_array = [0; 8];
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for (index, byte) in self.program[self.index + 1..self.index + 9]
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.into_iter()
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.enumerate()
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{
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println!("byte {}", byte);
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addr_array[index] = *byte;
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}
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let addr = usize::from_be_bytes(addr_array);
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if addr > self.program.len() {
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panic!("Invalid jump address {}", addr)
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} else {
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let call = FnCall { ret: self.index };
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self.call_stack.push(call);
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self.index = addr;
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println!("Jumping to {}", addr);
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self.dump();
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// panic!();
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}
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}
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_op_pair => {
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// println!("OP Pair {}", op_pair.0);
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self.index += 1;
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}
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}
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@ -1,13 +1,10 @@
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pub mod bytecode;
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pub mod engine;
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use bytecode::ops::*;
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use bytecode::types::{CONST_F64, CONST_U8};
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use engine::Engine;
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pub struct Page {
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pub data: [u8; 4096 * 2],
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}
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pub fn time() -> u32 {
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9
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}
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24
src/main.rs
24
src/main.rs
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@ -1,21 +1,29 @@
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use holey_bytes::bytecode::ops::Operations::*;
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use holey_bytes::bytecode::types::CONST_U64;
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use holey_bytes::RuntimeErrors;
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use holey_bytes::{bytecode::types::CONST_U8, engine::Engine};
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use holey_bytes::{
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bytecode::{
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ops::{Operations::*, RWSubTypes, RWSubTypes::*, SubTypes::*},
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types::*,
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},
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engine::Engine,
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RuntimeErrors,
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};
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fn main() -> Result<(), RuntimeErrors> {
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use holey_bytes::bytecode::ops::MathTypes::*;
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#[rustfmt::skip]
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let prog: Vec<u8> = vec![
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NOP as u8, NOP as u8,
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// NOP as u8, NOP as u8,
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ADD as u8, EightBit as u8, 100, 20, 0xA7,
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ADD as u8,
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EightBit as u8, 1, 0, 0xB0,
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ADD as u8,
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SixtyFourBit as u8,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 2, 0xD0
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0, 0, 0, 0, 0, 0, 0, 2, 0xD0,
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SUB as u8, EightBit as u8, 255, 0, 0xA7,
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ADD as u8, Register8 as u8, 0xA7, 0xB0, 0xA7,
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LOAD as u8, AddrToReg as u8,
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0, 0, 0, 0, 0, 0, 0, 2,
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0xA0,
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JUMP as u8, 0, 0, 0, 0, 0, 0, 0, 5,
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];
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let mut eng = Engine::new(prog);
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// eng.timer_callback = Some(time);
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