ableos-framebuffer/hblang/tests/codegen_tests_inline_test.txt

main:
    ADDI64 r254, r254, -64d
    ST r31, r254, 48a, 16h
    LI64 r32, 0d
    ST r32, r254, 0a, 8h
    LI64 r32, 0d
    ST r32, r254, 8a, 8h
    LD r2, r254, 0a, 16h
    LI64 r32, 0d
    ST r32, r254, 16a, 8h
    LI64 r32, 0d
    ST r32, r254, 24a, 8h
    LD r4, r254, 16a, 16h
    LI64 r32, 0d
    ST r32, r254, 32a, 8h
    LI64 r32, 0d
    ST r32, r254, 40a, 8h
    LD r6, r254, 32a, 16h
    LI64 r8, 10d
    JAL r31, r0, :line
    LI64 r32, 0d
    ST r32, r254, 0a, 8h
    LI64 r32, 0d
    ST r32, r254, 8a, 8h
    LD r2, r254, 0a, 16h
    LI64 r32, 0d
    ST r32, r254, 16a, 8h
    LI64 r32, 0d
    ST r32, r254, 24a, 8h
    LD r4, r254, 16a, 16h
    LI64 r32, 0d
    ST r32, r254, 32a, 8h
    LI64 r32, 0d
    ST r32, r254, 40a, 8h
    LD r6, r254, 32a, 16h
    LI64 r8, 10d
    JAL r31, r0, :rect_line
    JAL r31, r0, :example
    LI64 r1, 0d
    LD r31, r254, 48a, 16h
    ADDI64 r254, r254, 64d
    JALA r0, r31, 0a
example:
    ADDI64 r254, r254, -48d
    ST r31, r254, 0a, 48h
    LI64 r2, 3d
    LI64 r3, 4d
    ECA 
    CP r33, r1
    LI64 r34, 0d
    LI64 r35, 0d
    CMPS r34, r34, r35
    CMPUI r34, r34, 0d
    LI64 r35, 1024d
    LI64 r36, 0d
    CMPS r35, r35, r36
    CMPUI r35, r35, 0d
    OR r34, r34, r35
    JEQ r34, r0, :0
    LI64 r35, 1024d
    ADDI64 r35, r35, 0d
    ADDI64 r35, r35, 1d
    DIRS64 r0, r34, r33, r35
    ADDI64 r32, r34, 0d
    JMP :1
 0: CP r32, r33
 1: LI64 r2, 0d
    LI64 r3, 768d
    JAL r31, r0, :integer
    CP r33, r1
    CP r34, r32
    JMP :2
 2: LD r31, r254, 0a, 48h
    ADDI64 r254, r254, 48d
    JALA r0, r31, 0a
integer:
    ADDI64 r254, r254, -56d
    ST r31, r254, 0a, 56h
    CP r32, r2
    CP r33, r3
    LI64 r2, 3d
    LI64 r3, 4d
    ECA 
    CP r34, r1
    LI64 r36, 0d
    CMPS r35, r32, r36
    CMPUI r35, r35, 0d
    LI64 r37, 0d
    CMPS r36, r33, r37
    CMPUI r36, r36, 0d
    OR r35, r35, r36
    JEQ r35, r0, :0
    SUB64 r33, r33, r32
    ADDI64 r33, r33, 1d
    DIRS64 r0, r35, r34, r33
    ADD64 r1, r35, r32
    JMP :1
 0: CP r1, r34
 1: LD r31, r254, 0a, 56h
    ADDI64 r254, r254, 56d
    JALA r0, r31, 0a
rect_line:
    ADDI64 r254, r254, -112d
    ST r31, r254, 48a, 64h
    ST r2, r254, 0a, 16h
    ST r4, r254, 16a, 16h
    ST r6, r254, 32a, 16h
    CP r32, r8
    LI64 r33, 0d
    LI64 r34, 0d
    LI64 r35, 0d
 5: JNE r33, r32, :0
    JMP :1
 0: LD r34, r254, 8a, 8h
    LD r35, r254, 0a, 8h
 4: LD r36, r254, 8a, 8h
    LD r38, r254, 16a, 8h
    ADD64 r37, r36, r38
    JNE r34, r37, :2
    JMP :3
 2: LI64 r37, 1d
    LI64 r38, 10d
    ADD64 r37, r37, r38
    LI64 r38, 1d
    LI64 r36, 2d
    ADD64 r37, r38, r36
    ADDI64 r34, r34, 1d
    JMP :4
 3: ADDI64 r33, r33, 1d
    JMP :5
 1: LD r31, r254, 48a, 64h
    ADDI64 r254, r254, 112d
    JALA r0, r31, 0a
line:
    ADDI64 r254, r254, -80d
    ST r31, r254, 48a, 32h
    ST r2, r254, 16a, 16h
    ST r4, r254, 0a, 16h
    ST r6, r254, 32a, 16h
    CP r32, r8
    LI64 r33, 1d
    JEQ r33, r0, :0
    LD r33, r254, 16a, 8h
    LD r34, r254, 0a, 8h
    JGTS r33, r34, :1
    JMP :1
 1: JMP :2
 0: LD r34, r254, 24a, 8h
    LD r33, r254, 8a, 8h
    JGTS r34, r33, :2
    JMP :2
 2: LD r31, r254, 48a, 32h
    ADDI64 r254, r254, 80d
    JALA r0, r31, 0a
code size: 1404
ret: 0
status: Ok(())
adding disasembler 2024-09-03 15:34:17 -05:00			`main:`
			`ADDI64 r254, r254, -64d`
			`ST r31, r254, 48a, 16h`
			`LI64 r32, 0d`
			`ST r32, r254, 0a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 8a, 8h`
			`LD r2, r254, 0a, 16h`
			`LI64 r32, 0d`
			`ST r32, r254, 16a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 24a, 8h`
			`LD r4, r254, 16a, 16h`
			`LI64 r32, 0d`
			`ST r32, r254, 32a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 40a, 8h`
			`LD r6, r254, 32a, 16h`
			`LI64 r8, 10d`
			`JAL r31, r0, :line`
			`LI64 r32, 0d`
			`ST r32, r254, 0a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 8a, 8h`
			`LD r2, r254, 0a, 16h`
			`LI64 r32, 0d`
			`ST r32, r254, 16a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 24a, 8h`
			`LD r4, r254, 16a, 16h`
			`LI64 r32, 0d`
			`ST r32, r254, 32a, 8h`
			`LI64 r32, 0d`
			`ST r32, r254, 40a, 8h`
			`LD r6, r254, 32a, 16h`
			`LI64 r8, 10d`
			`JAL r31, r0, :rect_line`
			`JAL r31, r0, :example`
			`LI64 r1, 0d`
			`LD r31, r254, 48a, 16h`
			`ADDI64 r254, r254, 64d`
			`JALA r0, r31, 0a`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`example:`
			`ADDI64 r254, r254, -48d`
			`ST r31, r254, 0a, 48h`
			`LI64 r2, 3d`
			`LI64 r3, 4d`
			`ECA`
			`CP r33, r1`
			`LI64 r34, 0d`
			`LI64 r35, 0d`
			`CMPS r34, r34, r35`
			`CMPUI r34, r34, 0d`
			`LI64 r35, 1024d`
			`LI64 r36, 0d`
			`CMPS r35, r35, r36`
			`CMPUI r35, r35, 0d`
			`OR r34, r34, r35`
			`JEQ r34, r0, :0`
			`LI64 r35, 1024d`
			`ADDI64 r35, r35, 0d`
			`ADDI64 r35, r35, 1d`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`DIRS64 r0, r34, r33, r35`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`ADDI64 r32, r34, 0d`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`JMP :1`
			`0: CP r32, r33`
			`1: LI64 r2, 0d`
			`LI64 r3, 768d`
			`JAL r31, r0, :integer`
			`CP r33, r1`
			`CP r34, r32`
			`JMP :2`
			`2: LD r31, r254, 0a, 48h`
			`ADDI64 r254, r254, 48d`
			`JALA r0, r31, 0a`
			`integer:`
			`ADDI64 r254, r254, -56d`
			`ST r31, r254, 0a, 56h`
			`CP r32, r2`
			`CP r33, r3`
			`LI64 r2, 3d`
			`LI64 r3, 4d`
			`ECA`
			`CP r34, r1`
			`LI64 r36, 0d`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`CMPS r35, r32, r36`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`CMPUI r35, r35, 0d`
			`LI64 r37, 0d`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`CMPS r36, r33, r37`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`CMPUI r36, r36, 0d`
			`OR r35, r35, r36`
			`JEQ r35, r0, :0`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`SUB64 r33, r33, r32`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`ADDI64 r33, r33, 1d`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`DIRS64 r0, r35, r34, r33`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`ADD64 r1, r35, r32`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`JMP :1`
			`0: CP r1, r34`
			`1: LD r31, r254, 0a, 56h`
			`ADDI64 r254, r254, 56d`
			`JALA r0, r31, 0a`
adding disasembler 2024-09-03 15:34:17 -05:00			`rect_line:`
			`ADDI64 r254, r254, -112d`
			`ST r31, r254, 48a, 64h`
			`ST r2, r254, 0a, 16h`
			`ST r4, r254, 16a, 16h`
			`ST r6, r254, 32a, 16h`
			`CP r32, r8`
			`LI64 r33, 0d`
			`LI64 r34, 0d`
			`LI64 r35, 0d`
fixing more bugs and also adding uninig memory and also optimizing cong jumps 2024-09-09 12:36:53 -05:00			`5: JNE r33, r32, :0`
adding disasembler 2024-09-03 15:34:17 -05:00			`JMP :1`
			`0: LD r34, r254, 8a, 8h`
			`LD r35, r254, 0a, 8h`
fixing more bugs and also adding uninig memory and also optimizing cong jumps 2024-09-09 12:36:53 -05:00			`4: LD r36, r254, 8a, 8h`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`LD r38, r254, 16a, 8h`
			`ADD64 r37, r36, r38`
			`JNE r34, r37, :2`
adding disasembler 2024-09-03 15:34:17 -05:00			`JMP :3`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`2: LI64 r37, 1d`
			`LI64 r38, 10d`
			`ADD64 r37, r37, r38`
			`LI64 r38, 1d`
			`LI64 r36, 2d`
			`ADD64 r37, r38, r36`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`ADDI64 r34, r34, 1d`
adding disasembler 2024-09-03 15:34:17 -05:00			`JMP :4`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`3: ADDI64 r33, r33, 1d`
adding disasembler 2024-09-03 15:34:17 -05:00			`JMP :5`
			`1: LD r31, r254, 48a, 64h`
			`ADDI64 r254, r254, 112d`
			`JALA r0, r31, 0a`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`line:`
			`ADDI64 r254, r254, -80d`
			`ST r31, r254, 48a, 32h`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`ST r2, r254, 16a, 16h`
			`ST r4, r254, 0a, 16h`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`ST r6, r254, 32a, 16h`
			`CP r32, r8`
			`LI64 r33, 1d`
			`JEQ r33, r0, :0`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`LD r33, r254, 16a, 8h`
			`LD r34, r254, 0a, 8h`
			`JGTS r33, r34, :1`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`JMP :1`
			`1: JMP :2`
optimizing accumulation 2024-09-09 18:15:18 -05:00			`0: LD r34, r254, 24a, 8h`
			`LD r33, r254, 8a, 8h`
			`JGTS r34, r33, :2`
implementing optimizations up to is statements 2024-09-05 04:16:11 -05:00			`JMP :2`
			`2: LD r31, r254, 48a, 32h`
			`ADDI64 r254, r254, 80d`
			`JALA r0, r31, 0a`
more oportunities to reduce register copies 2024-09-10 05:13:01 -05:00			`code size: 1404`
popping the inlined function arguments 2024-09-01 20:56:22 -05:00			`ret: 0`
			`status: Ok(())`