forked from AbleOS/holey-bytes
maybe fixed mandelbrot
This commit is contained in:
parent
7058efe75c
commit
12be64965f
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@ -71,7 +71,6 @@ pub mod fs;
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pub mod fuzz;
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pub mod fuzz;
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pub mod lexer;
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pub mod lexer;
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pub mod parser;
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pub mod parser;
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pub mod regalloc;
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pub mod son;
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pub mod son;
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mod utils;
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mod utils;
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@ -1,2 +0,0 @@
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@ -926,7 +926,11 @@ impl Nodes {
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let &[_, oper] = self[target].inputs.as_slice() else { unreachable!() };
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let &[_, oper] = self[target].inputs.as_slice() else { unreachable!() };
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let ty = self[target].ty;
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let ty = self[target].ty;
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if matches!(op, TokenKind::Number | TokenKind::Float) && ty == self[oper].ty {
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if matches!(op, TokenKind::Number | TokenKind::Float)
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&& tys.size_of(self[oper].ty) == tys.size_of(ty)
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&& self[oper].ty.is_integer()
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&& ty.is_integer()
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{
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return Some(oper);
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return Some(oper);
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}
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}
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@ -1059,7 +1063,6 @@ impl Nodes {
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}
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}
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K::Phi => {
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K::Phi => {
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let &[ctrl, lhs, rhs] = self[target].inputs.as_slice() else { unreachable!() };
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let &[ctrl, lhs, rhs] = self[target].inputs.as_slice() else { unreachable!() };
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let ty = self[target].ty;
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if rhs == target || lhs == rhs {
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if rhs == target || lhs == rhs {
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return Some(lhs);
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return Some(lhs);
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@ -1083,6 +1086,8 @@ impl Nodes {
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return Some(self.new_node(self[lhs].ty, Kind::Stre, vc, tys));
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return Some(self.new_node(self[lhs].ty, Kind::Stre, vc, tys));
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}
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}
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// broken
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//let ty = self[target].ty;
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//if let Kind::BinOp { op } = self[lhs].kind
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//if let Kind::BinOp { op } = self[lhs].kind
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// && self[rhs].kind == (Kind::BinOp { op })
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// && self[rhs].kind == (Kind::BinOp { op })
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//{
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//{
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@ -15,7 +15,6 @@ use {
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};
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};
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mod my_regalloc;
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mod my_regalloc;
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mod their_regalloc;
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struct FuncDt {
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struct FuncDt {
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offset: Offset,
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offset: Offset,
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@ -54,7 +53,6 @@ pub struct HbvmBackend {
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funcs: EntVec<ty::Func, FuncDt>,
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funcs: EntVec<ty::Func, FuncDt>,
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globals: EntVec<ty::Global, GlobalDt>,
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globals: EntVec<ty::Global, GlobalDt>,
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asm: Assembler,
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asm: Assembler,
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ralloc: their_regalloc::Regalloc,
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ralloc_my: my_regalloc::Res,
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ralloc_my: my_regalloc::Res,
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ret_relocs: Vec<Reloc>,
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ret_relocs: Vec<Reloc>,
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@ -260,11 +258,7 @@ impl Backend for HbvmBackend {
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nodes[MEM].outputs = mems;
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nodes[MEM].outputs = mems;
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}
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}
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let (saved, tail) = if self.use_in_house_regalloc {
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let (saved, tail) = self.emit_body_code_my(nodes, sig, tys, files);
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self.emit_body_code_my(nodes, sig, tys, files)
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} else {
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self.emit_body_code(nodes, sig, tys, files)
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};
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if let Some(last_ret) = self.ret_relocs.last()
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if let Some(last_ret) = self.ret_relocs.last()
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&& last_ret.offset as usize == self.code.len() - 5
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&& last_ret.offset as usize == self.code.len() - 5
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@ -1,689 +0,0 @@
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use {
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super::{HbvmBackend, Nid, Nodes},
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crate::{
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parser, reg,
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son::{debug_assert_matches, Kind, ARG_START, MEM, NEVER, VOID},
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ty::{self, Arg, Loc},
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utils::BitSet,
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HashMap, PLoc, Sig, Types,
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},
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alloc::{borrow::ToOwned, vec::Vec},
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core::mem,
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hbbytecode::{self as instrs},
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};
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pub struct Regalloc {
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env: regalloc2::MachineEnv,
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ctx: regalloc2::Ctx,
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}
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impl Default for Regalloc {
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fn default() -> Self {
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Self {
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env: regalloc2::MachineEnv {
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preferred_regs_by_class: [
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(1..13).map(|i| regalloc2::PReg::new(i, regalloc2::RegClass::Int)).collect(),
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vec![],
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vec![],
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],
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non_preferred_regs_by_class: [
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(13..64).map(|i| regalloc2::PReg::new(i, regalloc2::RegClass::Int)).collect(),
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vec![],
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vec![],
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],
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scratch_by_class: Default::default(),
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fixed_stack_slots: Default::default(),
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},
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ctx: Default::default(),
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}
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}
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}
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impl HbvmBackend {
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pub fn emit_body_code(
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&mut self,
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nodes: &mut Nodes,
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sig: Sig,
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tys: &Types,
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files: &[parser::Ast],
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) -> (usize, bool) {
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let mut ralloc = mem::take(&mut self.ralloc);
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let fuc = Function::new(nodes, tys, files, sig);
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log::info!("{:?}", fuc);
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if !fuc.tail {
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mem::swap(
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&mut ralloc.env.preferred_regs_by_class,
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&mut ralloc.env.non_preferred_regs_by_class,
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);
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};
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let options = regalloc2::RegallocOptions {
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verbose_log: false,
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validate_ssa: cfg!(debug_assertions),
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algorithm: regalloc2::Algorithm::Ion,
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};
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regalloc2::run_with_ctx(&fuc, &ralloc.env, &options, &mut ralloc.ctx).unwrap_or_else(
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|err| {
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if let regalloc2::RegAllocError::SSA(vreg, inst) = err {
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fuc.nodes[vreg.vreg() as Nid].lock_rc = Nid::MAX;
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fuc.nodes[fuc.instrs[inst.index()].nid].lock_rc = Nid::MAX - 1;
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}
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fuc.nodes.graphviz_in_browser(ty::Display::new(tys, files, ty::Id::VOID));
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panic!("{err}")
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},
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);
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if !fuc.tail {
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mem::swap(
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&mut ralloc.env.preferred_regs_by_class,
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&mut ralloc.env.non_preferred_regs_by_class,
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);
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};
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let mut saved_regs = HashMap::<u8, u8>::default();
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let mut atr = |allc: regalloc2::Allocation| {
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debug_assert!(allc.is_reg());
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let hvenc = regalloc2::PReg::from_index(allc.index()).hw_enc() as u8;
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if hvenc <= 12 {
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return hvenc;
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}
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let would_insert = saved_regs.len() as u8 + reg::RET_ADDR + 1;
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*saved_regs.entry(hvenc).or_insert(would_insert)
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};
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'_open_function: {
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self.emit(instrs::addi64(reg::STACK_PTR, reg::STACK_PTR, 0));
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self.emit(instrs::st(reg::RET_ADDR + fuc.tail as u8, reg::STACK_PTR, 0, 0));
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}
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let (retl, mut parama) = tys.parama(sig.ret);
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let mut typs = sig.args.args();
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let mut args = fuc.nodes[VOID].outputs[ARG_START..].iter();
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while let Some(aty) = typs.next(tys) {
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let Arg::Value(ty) = aty else { continue };
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let Some(loc) = parama.next(ty, tys) else { continue };
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let &arg = args.next().unwrap();
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let (rg, size) = match loc {
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PLoc::WideReg(rg, size) => (rg, size),
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PLoc::Reg(rg, size) if ty.loc(tys) == Loc::Stack => (rg, size),
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PLoc::Reg(..) | PLoc::Ref(..) => continue,
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};
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self.emit(instrs::st(rg, reg::STACK_PTR, self.offsets[arg as usize] as _, size));
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if fuc.nodes[arg].lock_rc == 0 {
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self.emit(instrs::addi64(rg, reg::STACK_PTR, self.offsets[arg as usize] as _));
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}
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}
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let mut alloc_buf = vec![];
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for (i, block) in fuc.blocks.iter().enumerate() {
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let blk = regalloc2::Block(i as _);
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self.offsets[block.nid as usize] = self.code.len() as _;
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for instr_or_edit in ralloc.ctx.output.block_insts_and_edits(&fuc, blk) {
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let inst = match instr_or_edit {
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regalloc2::InstOrEdit::Inst(inst) => inst,
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regalloc2::InstOrEdit::Edit(®alloc2::Edit::Move { from, to }) => {
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self.emit(instrs::cp(atr(to), atr(from)));
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continue;
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}
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};
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let nid = fuc.instrs[inst.index()].nid;
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if nid == NEVER {
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continue;
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};
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self.emit_instr(super::InstrCtx {
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nid,
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sig,
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is_next_block: fuc.backrefs[nid as usize] as usize == i + 1,
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is_last_block: i == fuc.blocks.len() - 1,
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retl,
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allocs: {
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alloc_buf.clear();
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alloc_buf.extend(
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ralloc.ctx.output.inst_allocs(inst).iter().copied().map(&mut atr),
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);
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alloc_buf.as_slice()
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},
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nodes: fuc.nodes,
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tys,
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files,
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});
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}
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}
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self.ralloc = ralloc;
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(saved_regs.len(), fuc.tail)
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}
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}
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#[derive(Debug)]
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struct Block {
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nid: Nid,
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preds: Vec<regalloc2::Block>,
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succs: Vec<regalloc2::Block>,
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instrs: regalloc2::InstRange,
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params: Vec<regalloc2::VReg>,
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branch_blockparams: Vec<regalloc2::VReg>,
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}
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#[derive(Debug)]
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struct Instr {
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nid: Nid,
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ops: Vec<regalloc2::Operand>,
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}
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pub struct Function<'a> {
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sig: Sig,
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nodes: &'a mut Nodes,
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tys: &'a Types,
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files: &'a [parser::Ast],
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tail: bool,
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visited: BitSet,
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backrefs: Vec<u16>,
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blocks: Vec<Block>,
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instrs: Vec<Instr>,
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}
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impl core::fmt::Debug for Function<'_> {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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for (i, block) in self.blocks.iter().enumerate() {
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writeln!(f, "sb{i}{:?}-{:?}:", block.params, block.preds)?;
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for inst in block.instrs.iter() {
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let instr = &self.instrs[inst.index()];
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writeln!(f, "{}: i{:?}:{:?}", inst.index(), self.nodes[instr.nid].kind, instr.ops)?;
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}
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writeln!(f, "eb{i}{:?}-{:?}:", block.branch_blockparams, block.succs)?;
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}
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Ok(())
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}
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}
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impl<'a> Function<'a> {
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fn new(nodes: &'a mut Nodes, tys: &'a Types, files: &'a [parser::Ast], sig: Sig) -> Self {
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let mut s = Self {
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tys,
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sig,
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files,
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tail: true,
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visited: Default::default(),
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backrefs: vec![u16::MAX; nodes.values.len()],
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blocks: Default::default(),
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instrs: Default::default(),
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nodes,
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};
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s.visited.clear(s.nodes.values.len());
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s.emit_node(VOID, VOID);
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s.add_block(0);
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s.blocks.pop();
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s
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}
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fn add_block(&mut self, nid: Nid) -> u16 {
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if let Some(prev) = self.blocks.last_mut() {
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prev.instrs = regalloc2::InstRange::new(
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prev.instrs.first(),
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regalloc2::Inst::new(self.instrs.len()),
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);
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}
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self.blocks.push(Block {
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nid,
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preds: Default::default(),
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succs: Default::default(),
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instrs: regalloc2::InstRange::new(
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regalloc2::Inst::new(self.instrs.len()),
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regalloc2::Inst::new(self.instrs.len() + 1),
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),
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params: Default::default(),
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branch_blockparams: Default::default(),
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});
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self.blocks.len() as u16 - 1
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}
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fn add_instr(&mut self, nid: Nid, ops: Vec<regalloc2::Operand>) {
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self.instrs.push(Instr { nid, ops });
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}
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fn urg(&mut self, nid: Nid) -> regalloc2::Operand {
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regalloc2::Operand::reg_use(self.rg(nid))
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}
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fn drg(&mut self, nid: Nid) -> regalloc2::Operand {
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regalloc2::Operand::reg_def(self.rg(nid))
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}
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fn rg(&mut self, nid: Nid) -> regalloc2::VReg {
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debug_assert!(
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!self.nodes.is_cfg(nid) || matches!(self.nodes[nid].kind, Kind::Call { .. }),
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"{:?}",
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self.nodes[nid]
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);
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debug_assert_eq!(
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{ self.nodes[nid].lock_rc },
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0,
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"{nid} {:?} {:?} {:?}",
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self.nodes[nid].clone(),
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nid,
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{
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self.nodes[nid].lock_rc = u16::MAX - 1;
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self.nodes.graphviz_in_browser(ty::Display::new(
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self.tys,
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self.files,
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ty::Id::VOID,
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));
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}
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);
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debug_assert!(self.nodes[nid].kind != Kind::Phi || self.nodes[nid].ty != ty::Id::VOID);
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if self.nodes.is_hard_zero(nid) {
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regalloc2::VReg::new(NEVER as _, regalloc2::RegClass::Int)
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} else {
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regalloc2::VReg::new(nid as _, regalloc2::RegClass::Int)
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}
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}
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fn emit_node(&mut self, nid: Nid, prev: Nid) {
|
|
||||||
if matches!(self.nodes[nid].kind, Kind::Region | Kind::Loop) {
|
|
||||||
let prev_bref = self.backrefs[prev as usize];
|
|
||||||
let node = self.nodes[nid].clone();
|
|
||||||
|
|
||||||
let idx = 1 + node.inputs.iter().position(|&i| i == prev).unwrap();
|
|
||||||
|
|
||||||
for ph in node.outputs {
|
|
||||||
if self.nodes[ph].kind != Kind::Phi || self.nodes[ph].ty == ty::Id::VOID {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
let rg = self.rg(self.nodes[ph].inputs[idx]);
|
|
||||||
self.blocks[prev_bref as usize].branch_blockparams.push(rg);
|
|
||||||
}
|
|
||||||
|
|
||||||
self.add_instr(nid, vec![]);
|
|
||||||
|
|
||||||
match (self.nodes[nid].kind, self.visited.set(nid)) {
|
|
||||||
(Kind::Loop, false) => {
|
|
||||||
for i in node.inputs {
|
|
||||||
self.bridge(i, nid);
|
|
||||||
}
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
(Kind::Region, true) => return,
|
|
||||||
_ => {}
|
|
||||||
}
|
|
||||||
} else if !self.visited.set(nid) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
if self.nodes.is_never_used(nid, self.tys) {
|
|
||||||
self.nodes.lock(nid);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
let mut node = self.nodes[nid].clone();
|
|
||||||
match node.kind {
|
|
||||||
Kind::Start => {
|
|
||||||
debug_assert_matches!(self.nodes[node.outputs[0]].kind, Kind::Entry);
|
|
||||||
self.emit_node(node.outputs[0], VOID)
|
|
||||||
}
|
|
||||||
Kind::If => {
|
|
||||||
self.backrefs[nid as usize] = self.backrefs[prev as usize];
|
|
||||||
|
|
||||||
let &[_, cnd] = node.inputs.as_slice() else { unreachable!() };
|
|
||||||
let &[mut then, mut else_] = node.outputs.as_slice() else { unreachable!() };
|
|
||||||
|
|
||||||
if let Some((_, swapped)) = self.nodes.cond_op(cnd) {
|
|
||||||
if swapped {
|
|
||||||
mem::swap(&mut then, &mut else_);
|
|
||||||
}
|
|
||||||
let &[_, lhs, rhs] = self.nodes[cnd].inputs.as_slice() else { unreachable!() };
|
|
||||||
let ops = vec![self.urg(lhs), self.urg(rhs)];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
} else {
|
|
||||||
mem::swap(&mut then, &mut else_);
|
|
||||||
let ops = vec![self.urg(cnd)];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
|
|
||||||
self.emit_node(then, nid);
|
|
||||||
self.emit_node(else_, nid);
|
|
||||||
}
|
|
||||||
Kind::Region | Kind::Loop => {
|
|
||||||
self.backrefs[nid as usize] = self.add_block(nid);
|
|
||||||
if node.kind == Kind::Region {
|
|
||||||
for i in node.inputs {
|
|
||||||
self.bridge(i, nid);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
let mut block = vec![];
|
|
||||||
for ph in node.outputs.clone() {
|
|
||||||
if self.nodes[ph].kind != Kind::Phi || self.nodes[ph].ty == ty::Id::VOID {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
block.push(self.rg(ph));
|
|
||||||
}
|
|
||||||
self.blocks[self.backrefs[nid as usize] as usize].params = block;
|
|
||||||
self.nodes.reschedule_block(nid, &mut node.outputs);
|
|
||||||
for o in node.outputs.into_iter().rev() {
|
|
||||||
self.emit_node(o, nid);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Kind::Return => {
|
|
||||||
let ops = match self.tys.parama(self.sig.ret).0 {
|
|
||||||
None => vec![],
|
|
||||||
Some(PLoc::Reg(..)) if self.sig.ret.loc(self.tys) == Loc::Stack => {
|
|
||||||
vec![self.urg(self.nodes[node.inputs[1]].inputs[1])]
|
|
||||||
}
|
|
||||||
Some(PLoc::Reg(r, ..)) => {
|
|
||||||
vec![regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(node.inputs[1]),
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
)]
|
|
||||||
}
|
|
||||||
Some(PLoc::WideReg(..)) => {
|
|
||||||
vec![self.urg(self.nodes[node.inputs[1]].inputs[1])]
|
|
||||||
}
|
|
||||||
Some(PLoc::Ref(..)) => {
|
|
||||||
vec![self.urg(self.nodes[node.inputs[1]].inputs[1]), self.urg(MEM)]
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
self.emit_node(node.outputs[0], nid);
|
|
||||||
}
|
|
||||||
Kind::Die => {
|
|
||||||
self.add_instr(nid, vec![]);
|
|
||||||
self.emit_node(node.outputs[0], nid);
|
|
||||||
}
|
|
||||||
Kind::CInt { value: 0 } if self.nodes.is_hard_zero(nid) => {}
|
|
||||||
Kind::CInt { .. } => {
|
|
||||||
let ops = vec![self.drg(nid)];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::Entry => {
|
|
||||||
self.backrefs[nid as usize] = self.add_block(nid);
|
|
||||||
|
|
||||||
self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
|
|
||||||
regalloc2::VReg::new(NEVER as _, regalloc2::RegClass::Int),
|
|
||||||
regalloc2::PReg::new(0, regalloc2::RegClass::Int),
|
|
||||||
)]);
|
|
||||||
|
|
||||||
let (ret, mut parama) = self.tys.parama(self.sig.ret);
|
|
||||||
let mut typs = self.sig.args.args();
|
|
||||||
#[expect(clippy::unnecessary_to_owned)]
|
|
||||||
let mut args = self.nodes[VOID].outputs[ARG_START..].to_owned().into_iter();
|
|
||||||
while let Some(ty) = typs.next_value(self.tys) {
|
|
||||||
let arg = args.next().unwrap();
|
|
||||||
debug_assert_eq!(self.nodes[arg].kind, Kind::Arg);
|
|
||||||
match parama.next(ty, self.tys) {
|
|
||||||
None => {}
|
|
||||||
Some(PLoc::Reg(r, _) | PLoc::WideReg(r, _) | PLoc::Ref(r, _)) => {
|
|
||||||
let a = self.rg(arg);
|
|
||||||
self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
|
|
||||||
a,
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
)]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if let Some(PLoc::Ref(r, ..)) = ret {
|
|
||||||
let m = self.rg(MEM);
|
|
||||||
self.add_instr(NEVER, vec![regalloc2::Operand::reg_fixed_def(
|
|
||||||
m,
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
)]);
|
|
||||||
}
|
|
||||||
|
|
||||||
self.nodes.reschedule_block(nid, &mut node.outputs);
|
|
||||||
for o in node.outputs.into_iter().rev() {
|
|
||||||
self.emit_node(o, nid);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Kind::Then | Kind::Else => {
|
|
||||||
self.backrefs[nid as usize] = self.add_block(nid);
|
|
||||||
self.bridge(prev, nid);
|
|
||||||
self.nodes.reschedule_block(nid, &mut node.outputs);
|
|
||||||
for o in node.outputs.into_iter().rev() {
|
|
||||||
self.emit_node(o, nid);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Kind::BinOp { .. } => {
|
|
||||||
let &[_, lhs, rhs] = node.inputs.as_slice() else { unreachable!() };
|
|
||||||
|
|
||||||
let ops = if let Kind::CInt { .. } = self.nodes[rhs].kind
|
|
||||||
&& self.nodes[rhs].lock_rc != 0
|
|
||||||
{
|
|
||||||
vec![self.drg(nid), self.urg(lhs)]
|
|
||||||
} else {
|
|
||||||
vec![self.drg(nid), self.urg(lhs), self.urg(rhs)]
|
|
||||||
};
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::UnOp { .. } => {
|
|
||||||
let ops = vec![self.drg(nid), self.urg(node.inputs[1])];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::Call { args, func } => {
|
|
||||||
self.tail &= func == ty::Func::ECA;
|
|
||||||
self.backrefs[nid as usize] = self.backrefs[prev as usize];
|
|
||||||
let mut ops = vec![];
|
|
||||||
|
|
||||||
let (ret, mut parama) = self.tys.parama(node.ty);
|
|
||||||
if ret.is_some() {
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_def(
|
|
||||||
self.rg(nid),
|
|
||||||
regalloc2::PReg::new(1, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
}
|
|
||||||
|
|
||||||
let mut tys = args.args();
|
|
||||||
let mut args = node.inputs[1..].iter();
|
|
||||||
while let Some(ty) = tys.next_value(self.tys) {
|
|
||||||
let mut i = *args.next().unwrap();
|
|
||||||
let Some(loc) = parama.next(ty, self.tys) else { continue };
|
|
||||||
|
|
||||||
match loc {
|
|
||||||
PLoc::Reg(r, _) if ty.loc(self.tys) == Loc::Reg => {
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(i),
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
}
|
|
||||||
PLoc::WideReg(r, size) | PLoc::Reg(r, size) => {
|
|
||||||
loop {
|
|
||||||
match self.nodes[i].kind {
|
|
||||||
Kind::Stre { .. } => i = self.nodes[i].inputs[2],
|
|
||||||
Kind::Load { .. } => i = self.nodes[i].inputs[1],
|
|
||||||
_ => break,
|
|
||||||
}
|
|
||||||
debug_assert_ne!(i, 0);
|
|
||||||
}
|
|
||||||
debug_assert!(i != 0);
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(i),
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
if size > 8 {
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(i),
|
|
||||||
regalloc2::PReg::new((r + 1) as _, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
PLoc::Ref(r, _) => {
|
|
||||||
loop {
|
|
||||||
match self.nodes[i].kind {
|
|
||||||
Kind::Stre { .. } => i = self.nodes[i].inputs[2],
|
|
||||||
Kind::Load { .. } => i = self.nodes[i].inputs[1],
|
|
||||||
_ => break,
|
|
||||||
}
|
|
||||||
debug_assert_ne!(i, 0);
|
|
||||||
}
|
|
||||||
debug_assert!(i != 0);
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(i),
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if let Some(PLoc::Ref(r, _)) = ret {
|
|
||||||
ops.push(regalloc2::Operand::reg_fixed_use(
|
|
||||||
self.rg(*node.inputs.last().unwrap()),
|
|
||||||
regalloc2::PReg::new(r as _, regalloc2::RegClass::Int),
|
|
||||||
));
|
|
||||||
} else if node.ty.loc(self.tys) == Loc::Stack {
|
|
||||||
ops.push(self.urg(*node.inputs.last().unwrap()));
|
|
||||||
}
|
|
||||||
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
|
|
||||||
self.nodes.reschedule_block(nid, &mut node.outputs);
|
|
||||||
for o in node.outputs.into_iter().rev() {
|
|
||||||
if self.nodes[o].inputs[0] == nid
|
|
||||||
|| (matches!(self.nodes[o].kind, Kind::Loop | Kind::Region)
|
|
||||||
&& self.nodes[o].inputs[1] == nid)
|
|
||||||
{
|
|
||||||
self.emit_node(o, nid);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Kind::Global { .. } => {
|
|
||||||
let ops = vec![self.drg(nid)];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::Stck => {
|
|
||||||
let ops = vec![self.drg(nid)];
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::Assert { .. } => unreachable!(),
|
|
||||||
Kind::End | Kind::Phi | Kind::Arg | Kind::Mem | Kind::Loops | Kind::Join => {}
|
|
||||||
Kind::Load { .. } => {
|
|
||||||
let (region, _) = self.nodes.strip_offset(node.inputs[1], node.ty, self.tys);
|
|
||||||
let ops = match self.nodes[region].kind {
|
|
||||||
Kind::Stck => vec![self.drg(nid)],
|
|
||||||
_ => vec![self.drg(nid), self.urg(region)],
|
|
||||||
};
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
Kind::Stre => {
|
|
||||||
debug_assert_ne!(self.tys.size_of(node.ty), 0);
|
|
||||||
let (region, _) = self.nodes.strip_offset(node.inputs[2], node.ty, self.tys);
|
|
||||||
let ops = match self.nodes[region].kind {
|
|
||||||
_ if node.ty.loc(self.tys) == Loc::Stack => {
|
|
||||||
if self.nodes[node.inputs[1]].kind == Kind::Arg {
|
|
||||||
vec![self.urg(region), self.urg(node.inputs[1])]
|
|
||||||
} else {
|
|
||||||
vec![self.urg(region), self.urg(self.nodes[node.inputs[1]].inputs[1])]
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Kind::Stck => vec![self.urg(node.inputs[1])],
|
|
||||||
_ => vec![self.urg(region), self.urg(node.inputs[1])],
|
|
||||||
};
|
|
||||||
self.add_instr(nid, ops);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
fn bridge(&mut self, pred: u16, succ: u16) {
|
|
||||||
if self.backrefs[pred as usize] == u16::MAX || self.backrefs[succ as usize] == u16::MAX {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
self.blocks[self.backrefs[pred as usize] as usize]
|
|
||||||
.succs
|
|
||||||
.push(regalloc2::Block::new(self.backrefs[succ as usize] as usize));
|
|
||||||
self.blocks[self.backrefs[succ as usize] as usize]
|
|
||||||
.preds
|
|
||||||
.push(regalloc2::Block::new(self.backrefs[pred as usize] as usize));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl regalloc2::Function for Function<'_> {
|
|
||||||
fn num_insts(&self) -> usize {
|
|
||||||
self.instrs.len()
|
|
||||||
}
|
|
||||||
|
|
||||||
fn num_blocks(&self) -> usize {
|
|
||||||
self.blocks.len()
|
|
||||||
}
|
|
||||||
|
|
||||||
fn entry_block(&self) -> regalloc2::Block {
|
|
||||||
regalloc2::Block(0)
|
|
||||||
}
|
|
||||||
|
|
||||||
fn block_insns(&self, block: regalloc2::Block) -> regalloc2::InstRange {
|
|
||||||
self.blocks[block.index()].instrs
|
|
||||||
}
|
|
||||||
|
|
||||||
fn block_succs(&self, block: regalloc2::Block) -> &[regalloc2::Block] {
|
|
||||||
&self.blocks[block.index()].succs
|
|
||||||
}
|
|
||||||
|
|
||||||
fn block_preds(&self, block: regalloc2::Block) -> &[regalloc2::Block] {
|
|
||||||
&self.blocks[block.index()].preds
|
|
||||||
}
|
|
||||||
|
|
||||||
fn block_params(&self, block: regalloc2::Block) -> &[regalloc2::VReg] {
|
|
||||||
&self.blocks[block.index()].params
|
|
||||||
}
|
|
||||||
|
|
||||||
fn is_ret(&self, insn: regalloc2::Inst) -> bool {
|
|
||||||
matches!(self.nodes[self.instrs[insn.index()].nid].kind, Kind::Return | Kind::Die)
|
|
||||||
}
|
|
||||||
|
|
||||||
fn is_branch(&self, insn: regalloc2::Inst) -> bool {
|
|
||||||
matches!(
|
|
||||||
self.nodes[self.instrs[insn.index()].nid].kind,
|
|
||||||
Kind::If | Kind::Then | Kind::Else | Kind::Entry | Kind::Loop | Kind::Region
|
|
||||||
)
|
|
||||||
}
|
|
||||||
|
|
||||||
fn branch_blockparams(
|
|
||||||
&self,
|
|
||||||
block: regalloc2::Block,
|
|
||||||
_insn: regalloc2::Inst,
|
|
||||||
_succ_idx: usize,
|
|
||||||
) -> &[regalloc2::VReg] {
|
|
||||||
debug_assert!(
|
|
||||||
self.blocks[block.index()].succs.len() == 1
|
|
||||||
|| self.blocks[block.index()].branch_blockparams.is_empty()
|
|
||||||
);
|
|
||||||
|
|
||||||
&self.blocks[block.index()].branch_blockparams
|
|
||||||
}
|
|
||||||
|
|
||||||
fn inst_operands(&self, insn: regalloc2::Inst) -> &[regalloc2::Operand] {
|
|
||||||
&self.instrs[insn.index()].ops
|
|
||||||
}
|
|
||||||
|
|
||||||
fn inst_clobbers(&self, insn: regalloc2::Inst) -> regalloc2::PRegSet {
|
|
||||||
let node = &self.nodes[self.instrs[insn.index()].nid];
|
|
||||||
if matches!(node.kind, Kind::Call { .. }) {
|
|
||||||
let mut set = regalloc2::PRegSet::default();
|
|
||||||
let returns = self.tys.parama(node.ty).0.is_some();
|
|
||||||
for i in 1 + returns as usize..13 {
|
|
||||||
set.add(regalloc2::PReg::new(i, regalloc2::RegClass::Int));
|
|
||||||
}
|
|
||||||
set
|
|
||||||
} else {
|
|
||||||
regalloc2::PRegSet::default()
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
fn num_vregs(&self) -> usize {
|
|
||||||
self.nodes.values.len()
|
|
||||||
}
|
|
||||||
|
|
||||||
fn spillslot_size(&self, regclass: regalloc2::RegClass) -> usize {
|
|
||||||
match regclass {
|
|
||||||
regalloc2::RegClass::Int => 1,
|
|
||||||
regalloc2::RegClass::Float => unreachable!(),
|
|
||||||
regalloc2::RegClass::Vector => unreachable!(),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
|
@ -1,44 +1,52 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
LI32 r32, 1148846080w
|
LI32 r32, 1148846080w
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
JAL r31, r0, :sin
|
JAL r31, r0, :sin
|
||||||
FMUL32 r33, r1, r32
|
CP r33, r1
|
||||||
FTI32 r1, r33, 1b
|
FMUL32 r32, r33, r32
|
||||||
LD r31, r254, 0a, 24h
|
FTI32 r32, r32, 1b
|
||||||
ADDI64 r254, r254, 24d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
sin:
|
sin:
|
||||||
LI32 r6, 1124073472w
|
ADDI64 r254, r254, -56d
|
||||||
LI32 r7, 1078530011w
|
ST r32, r254, 0a, 56h
|
||||||
FMUL32 r9, r2, r6
|
CP r13, r2
|
||||||
FDIV32 r11, r9, r7
|
LI32 r14, 1124073472w
|
||||||
FTI32 r1, r11, 1b
|
LI32 r15, 1078530011w
|
||||||
ANDI r12, r1, 255d
|
FMUL32 r14, r13, r14
|
||||||
ITF64 r6, r1
|
FDIV32 r14, r14, r15
|
||||||
MULI64 r5, r12, 4d
|
FTI32 r14, r14, 1b
|
||||||
LRA r4, r0, :SIN_TABLE
|
ANDI r15, r14, 255d
|
||||||
LI32 r9, 1086918619w
|
ITF64 r16, r14
|
||||||
FC64T32 r11, r6, 1b
|
MULI64 r15, r15, 4d
|
||||||
ADDI64 r6, r1, 64d
|
LRA r17, r0, :SIN_TABLE
|
||||||
ADD64 r10, r4, r5
|
LI32 r18, 1086918619w
|
||||||
LI32 r3, 1132462080w
|
FC64T32 r16, r16, 1b
|
||||||
FMUL32 r8, r11, r9
|
ADDI64 r14, r14, 64d
|
||||||
ANDI r9, r6, 255d
|
ADD64 r15, r17, r15
|
||||||
LI32 r7, 1056964608w
|
LI32 r19, 1132462080w
|
||||||
LD r5, r10, 0a, 4h
|
FMUL32 r16, r16, r18
|
||||||
FDIV32 r10, r8, r3
|
ANDI r14, r14, 255d
|
||||||
MULI64 r8, r9, 4d
|
LI32 r18, 1056964608w
|
||||||
FMUL32 r12, r5, r7
|
LD r15, r15, 0a, 4h
|
||||||
FSUB32 r1, r2, r10
|
FDIV32 r16, r16, r19
|
||||||
ADD64 r11, r4, r8
|
MULI64 r14, r14, 4d
|
||||||
FMUL32 r4, r1, r12
|
FMUL32 r18, r15, r18
|
||||||
LD r2, r11, 0a, 4h
|
FSUB32 r13, r13, r16
|
||||||
FSUB32 r7, r2, r4
|
ADD64 r14, r17, r14
|
||||||
FMUL32 r9, r7, r1
|
FMUL32 r16, r13, r18
|
||||||
FADD32 r1, r5, r9
|
LD r14, r14, 0a, 4h
|
||||||
|
FSUB32 r14, r14, r16
|
||||||
|
FMUL32 r13, r14, r13
|
||||||
|
FADD32 r13, r15, r13
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 56h
|
||||||
|
ADDI64 r254, r254, 56d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 1303
|
code size: 1363
|
||||||
ret: 826
|
ret: 826
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,27 +1,36 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -56d
|
ADDI64 r254, r254, -64d
|
||||||
ST r31, r254, 24a, 32h
|
ST r31, r254, 24a, 40h
|
||||||
LI64 r32, 1d
|
LI64 r32, 1d
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
ST r32, r254, 0a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
LI64 r33, 2d
|
LI64 r34, 2d
|
||||||
ST r33, r254, 8a, 8h
|
ST r34, r254, 8a, 8h
|
||||||
LI64 r34, 4d
|
LI64 r34, 4d
|
||||||
ST r34, r254, 16a, 8h
|
ST r34, r254, 16a, 8h
|
||||||
|
CP r2, r33
|
||||||
JAL r31, r0, :pass
|
JAL r31, r0, :pass
|
||||||
ADD64 r1, r1, r32
|
CP r33, r1
|
||||||
LD r31, r254, 24a, 32h
|
ADD64 r32, r33, r32
|
||||||
ADDI64 r254, r254, 56d
|
CP r1, r32
|
||||||
|
LD r31, r254, 24a, 40h
|
||||||
|
ADDI64 r254, r254, 64d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
pass:
|
pass:
|
||||||
LD r6, r2, 8a, 8h
|
ADDI64 r254, r254, -32d
|
||||||
MULI64 r9, r6, 8d
|
ST r32, r254, 0a, 32h
|
||||||
LD r7, r2, 0a, 8h
|
CP r13, r2
|
||||||
ADD64 r12, r9, r2
|
LD r14, r13, 8a, 8h
|
||||||
ADD64 r11, r6, r7
|
MULI64 r15, r14, 8d
|
||||||
LD r3, r12, 0a, 8h
|
LD r16, r13, 0a, 8h
|
||||||
ADD64 r1, r3, r11
|
ADD64 r13, r15, r13
|
||||||
|
ADD64 r14, r14, r16
|
||||||
|
LD r13, r13, 0a, 8h
|
||||||
|
ADD64 r13, r13, r14
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 231
|
code size: 294
|
||||||
ret: 8
|
ret: 8
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,7 +1,12 @@
|
||||||
main:
|
main:
|
||||||
LRA r3, r0, :SIN_TABLE
|
ADDI64 r254, r254, -8d
|
||||||
LD r1, r3, 80a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
|
LRA r13, r0, :SIN_TABLE
|
||||||
|
LD r13, r13, 80a, 8h
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 767
|
code size: 818
|
||||||
ret: 1736
|
ret: 1736
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,12 +1,18 @@
|
||||||
main:
|
main:
|
||||||
LI64 r1, 1d
|
ADDI64 r254, r254, -16d
|
||||||
JNE r2, r1, :0
|
ST r32, r254, 0a, 16h
|
||||||
|
CP r14, r2
|
||||||
|
LI64 r13, 1d
|
||||||
|
JNE r14, r13, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JNE r2, r0, :2
|
0: JNE r14, r0, :2
|
||||||
LI64 r1, 2d
|
LI64 r13, 2d
|
||||||
JMP :1
|
JMP :1
|
||||||
2: LI64 r1, 3d
|
2: LI64 r13, 3d
|
||||||
1: JALA r0, r31, 0a
|
1: CP r1, r13
|
||||||
code size: 69
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
|
JALA r0, r31, 0a
|
||||||
|
code size: 123
|
||||||
ret: 2
|
ret: 2
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,26 +1,36 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 16h
|
ST r31, r254, 0a, 32h
|
||||||
LRA r2, r0, :"abඞ\n\r\t56789\0"
|
LRA r32, r0, :"abඞ\n\r\t56789\0"
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :str_len
|
JAL r31, r0, :str_len
|
||||||
CP r32, r1
|
CP r32, r1
|
||||||
LRA r2, r0, :"fff\0"
|
LRA r33, r0, :"fff\0"
|
||||||
|
CP r2, r33
|
||||||
JAL r31, r0, :str_len
|
JAL r31, r0, :str_len
|
||||||
ADD64 r1, r1, r32
|
CP r33, r1
|
||||||
LD r31, r254, 0a, 16h
|
ADD64 r32, r33, r32
|
||||||
ADDI64 r254, r254, 16d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
str_len:
|
str_len:
|
||||||
CP r5, r0
|
ADDI64 r254, r254, -32d
|
||||||
CP r1, r5
|
ST r32, r254, 0a, 32h
|
||||||
2: LD r9, r2, 0a, 1h
|
CP r15, r2
|
||||||
ANDI r11, r9, 255d
|
CP r14, r0
|
||||||
JNE r11, r5, :0
|
CP r13, r14
|
||||||
|
2: LD r16, r15, 0a, 1h
|
||||||
|
ANDI r16, r16, 255d
|
||||||
|
JNE r16, r14, :0
|
||||||
|
CP r1, r13
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADDI64 r2, r2, 1d
|
0: ADDI64 r15, r15, 1d
|
||||||
ADDI64 r1, r1, 1d
|
ADDI64 r13, r13, 1d
|
||||||
JMP :2
|
JMP :2
|
||||||
1: JALA r0, r31, 0a
|
1: LD r32, r254, 0a, 32h
|
||||||
code size: 198
|
ADDI64 r254, r254, 32d
|
||||||
|
JALA r0, r31, 0a
|
||||||
|
code size: 264
|
||||||
ret: 16
|
ret: 16
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
foo:
|
foo:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -16d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 16h
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
LD r31, r254, 0a, 8h
|
LD r31, r254, 0a, 16h
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 88
|
code size: 88
|
||||||
ret: 0
|
ret: 0
|
||||||
|
|
|
@ -1,7 +1,12 @@
|
||||||
main:
|
main:
|
||||||
LRA r3, r0, :a
|
ADDI64 r254, r254, -8d
|
||||||
LD r1, r3, 0a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
|
LRA r13, r0, :a
|
||||||
|
LD r13, r13, 0a, 8h
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 47
|
code size: 98
|
||||||
ret: 50
|
ret: 50
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,7 +1,12 @@
|
||||||
main:
|
main:
|
||||||
LRA r3, r0, :a
|
ADDI64 r254, r254, -8d
|
||||||
LD r1, r3, 0a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
|
LRA r13, r0, :a
|
||||||
|
LD r13, r13, 0a, 8h
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 47
|
code size: 98
|
||||||
ret: 50
|
ret: 50
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -2,19 +2,18 @@ cond:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
JAL r31, r0, :cond
|
JAL r31, r0, :cond
|
||||||
|
CP r33, r1
|
||||||
CP r32, r0
|
CP r32, r0
|
||||||
CP r33, r32
|
JNE r33, r32, :0
|
||||||
JNE r1, r33, :0
|
|
||||||
CP r32, r33
|
|
||||||
CP r1, r32
|
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r1, 2d
|
0: LI64 r32, 2d
|
||||||
1: LD r31, r254, 0a, 24h
|
1: CP r1, r32
|
||||||
ADDI64 r254, r254, 24d
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 120
|
code size: 117
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,7 @@
|
||||||
main:
|
main:
|
||||||
|
CP r0, r2
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 22
|
code size: 25
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI32 r1, 69w
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI32 r13, 69w
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 25
|
code size: 76
|
||||||
ret: 69
|
ret: 69
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
main:
|
main:
|
||||||
UN
|
UN
|
||||||
code size: 9
|
UN
|
||||||
|
code size: 10
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Err(Unreachable)
|
status: Err(Unreachable)
|
||||||
|
|
|
@ -1,82 +1,88 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -208d
|
ADDI64 r254, r254, -160d
|
||||||
ST r31, r254, 80a, 128h
|
ST r31, r254, 80a, 80h
|
||||||
LRA r32, r0, :glob_stru
|
LRA r32, r0, :glob_stru
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :new_stru
|
JAL r31, r0, :new_stru
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
CP r1, r0
|
CP r33, r0
|
||||||
LD r33, r32, 0a, 8h
|
LD r34, r32, 0a, 8h
|
||||||
JEQ r33, r1, :0
|
JEQ r34, r33, :0
|
||||||
LI64 r1, 300d
|
LI64 r32, 300d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r34, 1d
|
0: LI64 r35, 1d
|
||||||
ST r34, r32, 0a, 8h
|
ST r35, r32, 0a, 8h
|
||||||
ST r34, r32, 8a, 8h
|
ST r35, r32, 8a, 8h
|
||||||
ST r1, r32, 0a, 8h
|
ST r33, r32, 0a, 8h
|
||||||
LD r35, r32, 0a, 8h
|
LD r34, r32, 0a, 8h
|
||||||
JEQ r35, r1, :2
|
JEQ r34, r33, :2
|
||||||
LI64 r1, 200d
|
LI64 r32, 200d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
2: CP r36, r1
|
2: LI64 r36, 3d
|
||||||
LI64 r37, 3d
|
ST r35, r32, 0a, 8h
|
||||||
ST r34, r32, 0a, 8h
|
ST r35, r32, 8a, 8h
|
||||||
ST r34, r32, 8a, 8h
|
ADDI64 r37, r254, 16d
|
||||||
ADDI64 r38, r254, 16d
|
ST r35, r254, 16a, 8h
|
||||||
ST r34, r254, 16a, 8h
|
ST r35, r254, 24a, 8h
|
||||||
ST r34, r254, 24a, 8h
|
ST r35, r254, 32a, 8h
|
||||||
ST r34, r254, 32a, 8h
|
ST r35, r254, 40a, 8h
|
||||||
ST r34, r254, 40a, 8h
|
ST r35, r254, 48a, 8h
|
||||||
ST r34, r254, 48a, 8h
|
ST r35, r254, 56a, 8h
|
||||||
ST r34, r254, 56a, 8h
|
CP r32, r33
|
||||||
CP r39, r36
|
8: JNE r32, r36, :3
|
||||||
8: JNE r39, r37, :3
|
LD r32, r254, 48a, 8h
|
||||||
LD r40, r254, 48a, 8h
|
JEQ r32, r33, :4
|
||||||
CP r1, r36
|
LI64 r32, 100d
|
||||||
JEQ r40, r1, :4
|
CP r1, r32
|
||||||
LI64 r1, 100d
|
|
||||||
JMP :1
|
JMP :1
|
||||||
4: ST r1, r254, 0a, 8h
|
4: ST r33, r254, 0a, 8h
|
||||||
ST r1, r254, 8a, 8h
|
ST r33, r254, 8a, 8h
|
||||||
ST r1, r254, 64a, 8h
|
ST r33, r254, 64a, 8h
|
||||||
ST r1, r254, 72a, 8h
|
ST r33, r254, 72a, 8h
|
||||||
ST r34, r254, 16a, 8h
|
ST r35, r254, 16a, 8h
|
||||||
ST r34, r254, 24a, 8h
|
ST r35, r254, 24a, 8h
|
||||||
ST r34, r254, 32a, 8h
|
ST r35, r254, 32a, 8h
|
||||||
ST r34, r254, 40a, 8h
|
ST r35, r254, 40a, 8h
|
||||||
ST r34, r254, 48a, 8h
|
ST r35, r254, 48a, 8h
|
||||||
ST r34, r254, 56a, 8h
|
ST r35, r254, 56a, 8h
|
||||||
CP r41, r1
|
CP r32, r33
|
||||||
7: LD r42, r254, 48a, 8h
|
7: LD r38, r254, 48a, 8h
|
||||||
JNE r41, r37, :5
|
JNE r32, r36, :5
|
||||||
JEQ r42, r1, :6
|
JEQ r38, r33, :6
|
||||||
LI64 r1, 10d
|
LI64 r32, 10d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
6: JMP :1
|
6: CP r1, r33
|
||||||
5: ADD64 r43, r41, r34
|
JMP :1
|
||||||
MULI64 r44, r41, 16d
|
5: ADD64 r34, r32, r35
|
||||||
ADD64 r45, r38, r44
|
MULI64 r32, r32, 16d
|
||||||
ST r1, r45, 0a, 8h
|
ADD64 r32, r37, r32
|
||||||
ST r1, r45, 8a, 8h
|
ST r33, r32, 0a, 8h
|
||||||
CP r36, r1
|
ST r33, r32, 8a, 8h
|
||||||
CP r41, r43
|
CP r32, r34
|
||||||
JMP :7
|
JMP :7
|
||||||
3: MULI64 r46, r39, 16d
|
3: MULI64 r39, r32, 16d
|
||||||
ADD64 r43, r38, r46
|
ADD64 r39, r37, r39
|
||||||
|
CP r1, r39
|
||||||
JAL r31, r0, :new_stru
|
JAL r31, r0, :new_stru
|
||||||
ST r1, r43, 0a, 16h
|
ST r1, r39, 0a, 16h
|
||||||
ADD64 r39, r39, r34
|
ADD64 r32, r32, r35
|
||||||
JMP :8
|
JMP :8
|
||||||
1: LD r31, r254, 80a, 128h
|
1: LD r31, r254, 80a, 80h
|
||||||
ADDI64 r254, r254, 208d
|
ADDI64 r254, r254, 160d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
new_stru:
|
new_stru:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -24d
|
||||||
ADDI64 r3, r254, 0d
|
ST r32, r254, 16a, 8h
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
ST r0, r254, 0a, 8h
|
ST r0, r254, 0a, 8h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
LD r1, r3, 0a, 16h
|
LD r1, r13, 0a, 16h
|
||||||
ADDI64 r254, r254, 16d
|
LD r32, r254, 16a, 8h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 759
|
code size: 797
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,28 +1,31 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -12d
|
ADDI64 r254, r254, -36d
|
||||||
LI8 r3, 255b
|
ST r32, r254, 12a, 24h
|
||||||
ST r3, r254, 0a, 1h
|
LI8 r13, 255b
|
||||||
|
ST r13, r254, 0a, 1h
|
||||||
ST r0, r254, 1a, 1h
|
ST r0, r254, 1a, 1h
|
||||||
ST r0, r254, 2a, 1h
|
ST r0, r254, 2a, 1h
|
||||||
ST r3, r254, 3a, 1h
|
ST r13, r254, 3a, 1h
|
||||||
ST r0, r254, 4a, 4h
|
ST r0, r254, 4a, 4h
|
||||||
LD r4, r254, 4a, 4h
|
LD r13, r254, 4a, 4h
|
||||||
LI32 r11, 2w
|
LI32 r14, 2w
|
||||||
ST r11, r254, 8a, 4h
|
ST r14, r254, 8a, 4h
|
||||||
LD r2, r254, 8a, 4h
|
LD r14, r254, 8a, 4h
|
||||||
LI64 r5, 2d
|
LI64 r15, 2d
|
||||||
ANDI r6, r2, 4294967295d
|
ANDI r14, r14, 4294967295d
|
||||||
JEQ r6, r5, :0
|
JEQ r14, r15, :0
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r1, r0
|
0: ANDI r13, r13, 4294967295d
|
||||||
ANDI r10, r4, 4294967295d
|
JEQ r13, r0, :2
|
||||||
JEQ r10, r1, :2
|
LI64 r13, 64d
|
||||||
LI64 r1, 64d
|
CP r1, r13
|
||||||
JMP :1
|
JMP :1
|
||||||
2: LI64 r1, 512d
|
2: LI64 r13, 512d
|
||||||
1: ADDI64 r254, r254, 12d
|
CP r1, r13
|
||||||
|
1: LD r32, r254, 12a, 24h
|
||||||
|
ADDI64 r254, r254, 36d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 232
|
code size: 261
|
||||||
ret: 512
|
ret: 512
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,20 +1,25 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -48d
|
||||||
LI64 r3, 10d
|
ST r32, r254, 16a, 32h
|
||||||
ADDI64 r4, r254, 0d
|
LI64 r13, 10d
|
||||||
ST r3, r254, 0a, 8h
|
ADDI64 r14, r254, 0d
|
||||||
LI64 r9, 20d
|
ST r13, r254, 0a, 8h
|
||||||
ST r9, r254, 8a, 8h
|
LI64 r13, 20d
|
||||||
LI64 r6, 6d
|
ST r13, r254, 8a, 8h
|
||||||
LI64 r5, 5d
|
LI64 r13, 6d
|
||||||
LI64 r2, 1d
|
LI64 r15, 5d
|
||||||
CP r3, r4
|
LI64 r16, 1d
|
||||||
LD r3, r3, 0a, 16h
|
CP r2, r16
|
||||||
|
CP r5, r15
|
||||||
|
CP r6, r13
|
||||||
|
LD r3, r14, 0a, 16h
|
||||||
ECA
|
ECA
|
||||||
|
CP r0, r1
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
ADDI64 r254, r254, 16d
|
LD r32, r254, 16a, 32h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
ev: Ecall
|
ev: Ecall
|
||||||
code size: 148
|
code size: 183
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,33 +1,40 @@
|
||||||
continue_and_state_change:
|
continue_and_state_change:
|
||||||
CP r1, r0
|
ADDI64 r254, r254, -48d
|
||||||
LI64 r10, 3d
|
ST r32, r254, 0a, 48h
|
||||||
LI64 r11, 4d
|
CP r13, r2
|
||||||
LI64 r12, 2d
|
CP r15, r0
|
||||||
LI64 r3, 10d
|
LI64 r16, 3d
|
||||||
6: JLTU r2, r3, :0
|
LI64 r14, 4d
|
||||||
CP r1, r2
|
LI64 r17, 2d
|
||||||
|
LI64 r18, 10d
|
||||||
|
6: JLTU r13, r18, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JNE r2, r12, :2
|
0: JNE r13, r17, :2
|
||||||
CP r2, r11
|
CP r13, r14
|
||||||
JMP :3
|
JMP :3
|
||||||
2: JNE r2, r10, :4
|
2: JNE r13, r16, :4
|
||||||
1: JMP :5
|
CP r13, r15
|
||||||
4: ADDI64 r2, r2, 1d
|
1: CP r1, r13
|
||||||
|
JMP :5
|
||||||
|
4: ADDI64 r13, r13, 1d
|
||||||
3: JMP :6
|
3: JMP :6
|
||||||
5: JALA r0, r31, 0a
|
5: LD r32, r254, 0a, 48h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
|
JALA r0, r31, 0a
|
||||||
infinite_loop:
|
infinite_loop:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 40h
|
||||||
LI64 r32, 1d
|
LI64 r34, 1d
|
||||||
CP r33, r0
|
CP r33, r0
|
||||||
CP r1, r33
|
CP r32, r33
|
||||||
1: JNE r1, r32, :0
|
1: JNE r32, r34, :0
|
||||||
JMP :0
|
JMP :0
|
||||||
0: CP r2, r33
|
0: CP r2, r33
|
||||||
JAL r31, r0, :continue_and_state_change
|
JAL r31, r0, :continue_and_state_change
|
||||||
|
CP r32, r1
|
||||||
JMP :1
|
JMP :1
|
||||||
LD r31, r254, 0a, 24h
|
LD r31, r254, 0a, 40h
|
||||||
ADDI64 r254, r254, 24d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -48d
|
||||||
|
@ -35,38 +42,45 @@ main:
|
||||||
CP r2, r0
|
CP r2, r0
|
||||||
JAL r31, r0, :multiple_breaks
|
JAL r31, r0, :multiple_breaks
|
||||||
CP r32, r1
|
CP r32, r1
|
||||||
LI64 r1, 3d
|
LI64 r33, 3d
|
||||||
JEQ r32, r1, :0
|
JEQ r32, r33, :0
|
||||||
LI64 r1, 1d
|
LI64 r32, 1d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r33, r1
|
0: LI64 r32, 4d
|
||||||
LI64 r34, 4d
|
CP r2, r32
|
||||||
CP r2, r34
|
|
||||||
JAL r31, r0, :multiple_breaks
|
JAL r31, r0, :multiple_breaks
|
||||||
CP r35, r34
|
CP r34, r1
|
||||||
LI64 r36, 10d
|
LI64 r35, 10d
|
||||||
JEQ r1, r36, :2
|
JEQ r34, r35, :2
|
||||||
LI64 r1, 2d
|
LI64 r32, 2d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
2: CP r2, r0
|
2: CP r2, r0
|
||||||
JAL r31, r0, :state_change_in_break
|
JAL r31, r0, :state_change_in_break
|
||||||
JEQ r1, r0, :3
|
CP r34, r1
|
||||||
|
JEQ r34, r0, :3
|
||||||
CP r1, r33
|
CP r1, r33
|
||||||
JMP :1
|
JMP :1
|
||||||
3: CP r2, r35
|
3: CP r2, r32
|
||||||
JAL r31, r0, :state_change_in_break
|
JAL r31, r0, :state_change_in_break
|
||||||
JEQ r1, r36, :4
|
CP r34, r1
|
||||||
CP r1, r35
|
JEQ r34, r35, :4
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
4: CP r2, r36
|
4: CP r2, r35
|
||||||
JAL r31, r0, :continue_and_state_change
|
JAL r31, r0, :continue_and_state_change
|
||||||
JEQ r1, r36, :5
|
CP r32, r1
|
||||||
LI64 r1, 5d
|
JEQ r32, r35, :5
|
||||||
|
LI64 r32, 5d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
5: CP r2, r33
|
5: CP r2, r33
|
||||||
JAL r31, r0, :continue_and_state_change
|
JAL r31, r0, :continue_and_state_change
|
||||||
JEQ r1, r0, :6
|
CP r32, r1
|
||||||
LI64 r1, 6d
|
JEQ r32, r0, :6
|
||||||
|
LI64 r32, 6d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
6: JAL r31, r0, :infinite_loop
|
6: JAL r31, r0, :infinite_loop
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
|
@ -74,30 +88,39 @@ main:
|
||||||
ADDI64 r254, r254, 48d
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
multiple_breaks:
|
multiple_breaks:
|
||||||
LI64 r8, 3d
|
ADDI64 r254, r254, -24d
|
||||||
LI64 r7, 10d
|
ST r32, r254, 0a, 24h
|
||||||
4: JLTU r2, r7, :0
|
CP r13, r2
|
||||||
CP r1, r2
|
LI64 r14, 3d
|
||||||
|
LI64 r15, 10d
|
||||||
|
4: JLTU r13, r15, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADDI64 r1, r2, 1d
|
0: ADDI64 r13, r13, 1d
|
||||||
JNE r1, r8, :2
|
JNE r13, r14, :2
|
||||||
1: JMP :3
|
1: CP r1, r13
|
||||||
2: CP r2, r1
|
JMP :3
|
||||||
JMP :4
|
2: JMP :4
|
||||||
3: JALA r0, r31, 0a
|
3: LD r32, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
|
JALA r0, r31, 0a
|
||||||
state_change_in_break:
|
state_change_in_break:
|
||||||
LI64 r7, 3d
|
ADDI64 r254, r254, -24d
|
||||||
LI64 r8, 10d
|
ST r32, r254, 0a, 24h
|
||||||
4: JLTU r2, r8, :0
|
CP r13, r2
|
||||||
CP r1, r2
|
LI64 r14, 3d
|
||||||
|
LI64 r15, 10d
|
||||||
|
4: JLTU r13, r15, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JNE r2, r7, :2
|
0: JNE r13, r14, :2
|
||||||
CP r1, r0
|
CP r13, r0
|
||||||
1: JMP :3
|
1: CP r1, r13
|
||||||
2: ADDI64 r2, r2, 1d
|
JMP :3
|
||||||
|
2: ADDI64 r13, r13, 1d
|
||||||
JMP :4
|
JMP :4
|
||||||
3: JALA r0, r31, 0a
|
3: LD r32, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
|
JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 634
|
code size: 811
|
||||||
ret: 10
|
ret: 10
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,53 +1,64 @@
|
||||||
check_platform:
|
check_platform:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
JAL r31, r0, :x86_fb_ptr
|
JAL r31, r0, :x86_fb_ptr
|
||||||
LD r31, r254, 0a, 8h
|
CP r32, r1
|
||||||
ADDI64 r254, r254, 8d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -64d
|
ADDI64 r254, r254, -64d
|
||||||
ST r31, r254, 0a, 64h
|
ST r31, r254, 0a, 64h
|
||||||
JAL r31, r0, :check_platform
|
JAL r31, r0, :check_platform
|
||||||
CP r32, r0
|
CP r0, r1
|
||||||
LI64 r33, 30d
|
CP r33, r0
|
||||||
LI64 r34, 100d
|
LI64 r36, 30d
|
||||||
CP r35, r32
|
LI64 r37, 100d
|
||||||
CP r36, r32
|
CP r35, r33
|
||||||
CP r37, r32
|
CP r34, r33
|
||||||
5: JLTU r35, r33, :0
|
CP r32, r33
|
||||||
ADDI64 r36, r36, 1d
|
5: JLTU r32, r36, :0
|
||||||
CP r2, r32
|
ADDI64 r34, r34, 1d
|
||||||
CP r3, r36
|
CP r2, r33
|
||||||
CP r4, r33
|
CP r3, r34
|
||||||
|
CP r4, r36
|
||||||
JAL r31, r0, :set_pixel
|
JAL r31, r0, :set_pixel
|
||||||
JEQ r1, r37, :1
|
CP r32, r1
|
||||||
CP r1, r32
|
JEQ r32, r35, :1
|
||||||
|
CP r1, r33
|
||||||
JMP :2
|
JMP :2
|
||||||
1: CP r38, r32
|
1: JNE r34, r37, :3
|
||||||
JNE r36, r34, :3
|
CP r1, r35
|
||||||
CP r1, r37
|
|
||||||
JMP :2
|
JMP :2
|
||||||
3: CP r1, r37
|
3: CP r32, r33
|
||||||
CP r35, r38
|
|
||||||
JMP :4
|
JMP :4
|
||||||
0: CP r1, r37
|
0: ADDI64 r35, r35, 1d
|
||||||
CP r38, r32
|
ADDI64 r32, r32, 1d
|
||||||
ADDI64 r1, r1, 1d
|
4: JMP :5
|
||||||
ADDI64 r35, r35, 1d
|
|
||||||
4: CP r32, r38
|
|
||||||
CP r37, r1
|
|
||||||
JMP :5
|
|
||||||
2: LD r31, r254, 0a, 64h
|
2: LD r31, r254, 0a, 64h
|
||||||
ADDI64 r254, r254, 64d
|
ADDI64 r254, r254, 64d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
set_pixel:
|
set_pixel:
|
||||||
MUL64 r9, r3, r4
|
ADDI64 r254, r254, -24d
|
||||||
ADD64 r1, r9, r2
|
ST r32, r254, 0a, 24h
|
||||||
|
CP r13, r2
|
||||||
|
CP r14, r3
|
||||||
|
CP r15, r4
|
||||||
|
MUL64 r14, r14, r15
|
||||||
|
ADD64 r13, r14, r13
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
x86_fb_ptr:
|
x86_fb_ptr:
|
||||||
LI64 r1, 100d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 100d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 323
|
code size: 428
|
||||||
ret: 3000
|
ret: 3000
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI32 r1, 3212836864w
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI32 r13, 3212836864w
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 25
|
code size: 76
|
||||||
ret: 3212836864
|
ret: 3212836864
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,21 +1,37 @@
|
||||||
add_one:
|
add_one:
|
||||||
ADDI64 r1, r2, 1d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
ADDI64 r13, r13, 1d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
add_two:
|
add_two:
|
||||||
ADDI64 r1, r2, 2d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
ADDI64 r13, r13, 2d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 16h
|
ST r31, r254, 0a, 32h
|
||||||
LI64 r2, 10d
|
LI64 r32, 10d
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :add_one
|
JAL r31, r0, :add_one
|
||||||
CP r32, r1
|
CP r32, r1
|
||||||
LI64 r2, 20d
|
LI64 r33, 20d
|
||||||
|
CP r2, r33
|
||||||
JAL r31, r0, :add_two
|
JAL r31, r0, :add_two
|
||||||
ADD64 r1, r1, r32
|
CP r33, r1
|
||||||
LD r31, r254, 0a, 16h
|
ADD64 r32, r33, r32
|
||||||
ADDI64 r254, r254, 16d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 152
|
code size: 272
|
||||||
ret: 33
|
ret: 33
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,24 +1,43 @@
|
||||||
add:
|
add:
|
||||||
ADD64 r1, r2, r3
|
ADDI64 r254, r254, -16d
|
||||||
|
ST r32, r254, 0a, 16h
|
||||||
|
CP r13, r2
|
||||||
|
CP r14, r3
|
||||||
|
ADD64 r13, r13, r14
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
add:
|
add:
|
||||||
ADD32 r1, r2, r3
|
ADDI64 r254, r254, -16d
|
||||||
|
ST r32, r254, 0a, 16h
|
||||||
|
CP r13, r2
|
||||||
|
CP r14, r3
|
||||||
|
ADD32 r13, r13, r14
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 40h
|
||||||
LI32 r3, 2w
|
LI32 r32, 2w
|
||||||
CP r2, r3
|
CP r2, r32
|
||||||
|
CP r3, r32
|
||||||
JAL r31, r0, :add
|
JAL r31, r0, :add
|
||||||
CP r32, r1
|
CP r32, r1
|
||||||
LI64 r3, 3d
|
LI64 r33, 3d
|
||||||
LI64 r2, 1d
|
LI64 r34, 1d
|
||||||
|
CP r2, r34
|
||||||
|
CP r3, r33
|
||||||
JAL r31, r0, :add
|
JAL r31, r0, :add
|
||||||
ANDI r33, r32, 4294967295d
|
CP r33, r1
|
||||||
SUB64 r1, r33, r1
|
ANDI r32, r32, 4294967295d
|
||||||
LD r31, r254, 0a, 24h
|
SUB64 r32, r32, r33
|
||||||
ADDI64 r254, r254, 24d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 40h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 158
|
code size: 287
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,15 +1,16 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -16d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 16h
|
||||||
JAL r31, r0, :process
|
JAL r31, r0, :process
|
||||||
LD r31, r254, 0a, 8h
|
LD r31, r254, 0a, 16h
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
opaque:
|
opaque:
|
||||||
|
CP r0, r2
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
process:
|
process:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -64d
|
||||||
ST r31, r254, 16a, 32h
|
ST r31, r254, 16a, 48h
|
||||||
LI64 r32, 1000d
|
LI64 r32, 1000d
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
ST r0, r254, 0a, 1h
|
ST r0, r254, 0a, 1h
|
||||||
|
@ -17,17 +18,17 @@ process:
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r2, r33
|
0: CP r2, r33
|
||||||
JAL r31, r0, :opaque
|
JAL r31, r0, :opaque
|
||||||
LD r34, r254, 0a, 1h
|
LD r35, r254, 0a, 1h
|
||||||
ANDI r34, r34, 255d
|
ANDI r35, r35, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JEQ r34, r0, :2
|
JEQ r35, r0, :2
|
||||||
JMP :3
|
JMP :3
|
||||||
2: ADDI64 r32, r32, -1d
|
2: ADDI64 r32, r32, -1d
|
||||||
1: JMP :4
|
1: JMP :4
|
||||||
3: LD r31, r254, 16a, 32h
|
3: LD r31, r254, 16a, 48h
|
||||||
ADDI64 r254, r254, 48d
|
ADDI64 r254, r254, 64d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 259
|
code size: 262
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,122 +1,140 @@
|
||||||
deinit:
|
deinit:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 0a, 32h
|
ST r31, r254, 0a, 48h
|
||||||
CP r32, r2
|
CP r32, r2
|
||||||
LD r33, r2, 16a, 8h
|
LD r33, r32, 16a, 8h
|
||||||
LI64 r4, 8d
|
LI64 r34, 8d
|
||||||
MUL64 r3, r33, r4
|
MUL64 r33, r33, r34
|
||||||
CP r34, r32
|
LD r35, r32, 0a, 8h
|
||||||
LD r2, r34, 0a, 8h
|
CP r2, r35
|
||||||
|
CP r3, r33
|
||||||
|
CP r4, r34
|
||||||
JAL r31, r0, :free
|
JAL r31, r0, :free
|
||||||
CP r1, r32
|
CP r1, r32
|
||||||
JAL r31, r0, :new
|
JAL r31, r0, :new
|
||||||
LD r31, r254, 0a, 32h
|
LD r31, r254, 0a, 48h
|
||||||
ADDI64 r254, r254, 32d
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
free:
|
free:
|
||||||
CP r11, r2
|
ADDI64 r254, r254, -32d
|
||||||
LRA r9, r0, :FREE_SYS_CALL
|
ST r32, r254, 0a, 32h
|
||||||
LD r2, r9, 0a, 8h
|
CP r13, r2
|
||||||
CP r5, r4
|
CP r14, r3
|
||||||
CP r4, r3
|
CP r15, r4
|
||||||
CP r3, r11
|
LRA r16, r0, :FREE_SYS_CALL
|
||||||
|
LD r16, r16, 0a, 8h
|
||||||
|
CP r2, r16
|
||||||
|
CP r3, r13
|
||||||
|
CP r4, r14
|
||||||
|
CP r5, r15
|
||||||
ECA
|
ECA
|
||||||
|
LD r32, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -56d
|
ADDI64 r254, r254, -64d
|
||||||
ST r31, r254, 24a, 32h
|
ST r31, r254, 24a, 40h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
CP r1, r32
|
CP r1, r32
|
||||||
JAL r31, r0, :new
|
JAL r31, r0, :new
|
||||||
LI64 r3, 69d
|
LI64 r33, 69d
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
|
CP r3, r33
|
||||||
JAL r31, r0, :push
|
JAL r31, r0, :push
|
||||||
LD r33, r254, 0a, 8h
|
CP r33, r1
|
||||||
LD r34, r33, 0a, 8h
|
LD r34, r254, 0a, 8h
|
||||||
|
LD r33, r34, 0a, 8h
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
JAL r31, r0, :deinit
|
JAL r31, r0, :deinit
|
||||||
CP r1, r34
|
CP r1, r33
|
||||||
LD r31, r254, 24a, 32h
|
LD r31, r254, 24a, 40h
|
||||||
ADDI64 r254, r254, 56d
|
ADDI64 r254, r254, 64d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
malloc:
|
malloc:
|
||||||
CP r10, r2
|
ADDI64 r254, r254, -24d
|
||||||
LRA r7, r0, :MALLOC_SYS_CALL
|
ST r32, r254, 0a, 24h
|
||||||
LD r2, r7, 0a, 8h
|
CP r13, r2
|
||||||
CP r4, r3
|
CP r14, r3
|
||||||
CP r3, r10
|
LRA r15, r0, :MALLOC_SYS_CALL
|
||||||
|
LD r15, r15, 0a, 8h
|
||||||
|
CP r2, r15
|
||||||
|
CP r3, r13
|
||||||
|
CP r4, r14
|
||||||
ECA
|
ECA
|
||||||
|
CP r13, r1
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
new:
|
new:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ADDI64 r5, r254, 0d
|
ST r32, r254, 24a, 8h
|
||||||
|
CP r14, r1
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
ST r0, r254, 0a, 8h
|
ST r0, r254, 0a, 8h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
ST r0, r254, 16a, 8h
|
ST r0, r254, 16a, 8h
|
||||||
BMC r5, r1, 24h
|
BMC r13, r14, 24h
|
||||||
ADDI64 r254, r254, 24d
|
LD r32, r254, 24a, 8h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
push:
|
push:
|
||||||
ADDI64 r254, r254, -168d
|
ADDI64 r254, r254, -112d
|
||||||
ST r31, r254, 0a, 168h
|
ST r31, r254, 0a, 112h
|
||||||
CP r32, r3
|
CP r38, r2
|
||||||
LI64 r33, 1d
|
CP r39, r3
|
||||||
LD r34, r2, 8a, 8h
|
LI64 r37, 1d
|
||||||
LD r35, r2, 16a, 8h
|
LD r33, r38, 8a, 8h
|
||||||
CP r36, r2
|
LD r32, r38, 16a, 8h
|
||||||
JNE r35, r34, :0
|
JNE r32, r33, :0
|
||||||
JNE r35, r0, :1
|
JNE r32, r0, :1
|
||||||
CP r37, r33
|
CP r32, r37
|
||||||
JMP :2
|
JMP :2
|
||||||
1: MULI64 r37, r35, 2d
|
1: MULI64 r32, r32, 2d
|
||||||
2: LI64 r38, 8d
|
2: LI64 r40, 8d
|
||||||
MUL64 r2, r37, r38
|
MUL64 r34, r32, r40
|
||||||
CP r3, r38
|
CP r2, r34
|
||||||
|
CP r3, r40
|
||||||
JAL r31, r0, :malloc
|
JAL r31, r0, :malloc
|
||||||
CP r39, r36
|
CP r35, r1
|
||||||
ST r37, r39, 16a, 8h
|
ST r32, r38, 16a, 8h
|
||||||
JNE r1, r0, :3
|
JNE r35, r0, :3
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JMP :4
|
JMP :4
|
||||||
3: CP r40, r1
|
3: MULI64 r33, r33, 8d
|
||||||
CP r1, r0
|
LD r32, r38, 0a, 8h
|
||||||
MULI64 r41, r34, 8d
|
ADD64 r41, r32, r33
|
||||||
LD r42, r39, 0a, 8h
|
CP r34, r35
|
||||||
ADD64 r43, r42, r41
|
7: LD r42, r38, 0a, 8h
|
||||||
CP r44, r40
|
LD r43, r38, 8a, 8h
|
||||||
9: LD r2, r39, 0a, 8h
|
JNE r41, r32, :5
|
||||||
LD r45, r39, 8a, 8h
|
JEQ r43, r0, :6
|
||||||
JNE r43, r42, :5
|
MUL64 r32, r43, r40
|
||||||
JEQ r45, r1, :6
|
CP r2, r42
|
||||||
CP r4, r38
|
|
||||||
MUL64 r3, r45, r4
|
|
||||||
JAL r31, r0, :free
|
|
||||||
CP r46, r40
|
|
||||||
JMP :7
|
|
||||||
6: CP r46, r40
|
|
||||||
7: ST r46, r39, 0a, 8h
|
|
||||||
JMP :8
|
|
||||||
5: CP r4, r38
|
|
||||||
CP r46, r40
|
|
||||||
ADDI64 r47, r44, 8d
|
|
||||||
ADDI64 r48, r42, 8d
|
|
||||||
LD r49, r42, 0a, 8h
|
|
||||||
ST r49, r44, 0a, 8h
|
|
||||||
CP r42, r48
|
|
||||||
CP r44, r47
|
|
||||||
JMP :9
|
|
||||||
0: CP r39, r36
|
|
||||||
8: LD r35, r39, 8a, 8h
|
|
||||||
MULI64 r50, r35, 8d
|
|
||||||
LD r46, r39, 0a, 8h
|
|
||||||
ADD64 r1, r46, r50
|
|
||||||
CP r3, r32
|
CP r3, r32
|
||||||
ST r3, r1, 0a, 8h
|
CP r4, r40
|
||||||
ADD64 r51, r35, r33
|
JAL r31, r0, :free
|
||||||
ST r51, r39, 8a, 8h
|
JMP :6
|
||||||
4: LD r31, r254, 0a, 168h
|
6: ST r35, r38, 0a, 8h
|
||||||
ADDI64 r254, r254, 168d
|
JMP :0
|
||||||
|
5: ADDI64 r36, r34, 8d
|
||||||
|
ADDI64 r33, r32, 8d
|
||||||
|
LD r32, r32, 0a, 8h
|
||||||
|
ST r32, r34, 0a, 8h
|
||||||
|
CP r34, r36
|
||||||
|
CP r32, r33
|
||||||
|
JMP :7
|
||||||
|
0: LD r32, r38, 8a, 8h
|
||||||
|
MULI64 r33, r32, 8d
|
||||||
|
LD r34, r38, 0a, 8h
|
||||||
|
ADD64 r33, r34, r33
|
||||||
|
ST r39, r33, 0a, 8h
|
||||||
|
ADD64 r32, r32, r37
|
||||||
|
ST r32, r38, 8a, 8h
|
||||||
|
CP r1, r33
|
||||||
|
4: LD r31, r254, 0a, 112h
|
||||||
|
ADDI64 r254, r254, 112d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 899
|
code size: 1045
|
||||||
ret: 69
|
ret: 69
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,18 +1,23 @@
|
||||||
clobber:
|
clobber:
|
||||||
LRA r3, r0, :var
|
ADDI64 r254, r254, -8d
|
||||||
ST r0, r3, 0a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
|
LRA r13, r0, :var
|
||||||
|
ST r0, r13, 0a, 8h
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
LRA r32, r0, :var
|
LRA r32, r0, :var
|
||||||
LI64 r33, 2d
|
LI64 r33, 2d
|
||||||
ST r33, r32, 0a, 8h
|
ST r33, r32, 0a, 8h
|
||||||
JAL r31, r0, :clobber
|
JAL r31, r0, :clobber
|
||||||
LD r1, r32, 0a, 8h
|
LD r32, r32, 0a, 8h
|
||||||
LD r31, r254, 0a, 24h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 24d
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 156
|
code size: 207
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -2,21 +2,22 @@ inb:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 32h
|
ST r31, r254, 0a, 40h
|
||||||
LRA r32, r0, :ports
|
LRA r32, r0, :ports
|
||||||
LD r33, r32, 0a, 1h
|
LD r33, r32, 0a, 1h
|
||||||
ANDI r33, r33, 255d
|
ANDI r33, r33, 255d
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JAL r31, r0, :inb
|
0: JAL r31, r0, :inb
|
||||||
CMPU r34, r1, r0
|
CP r33, r1
|
||||||
|
CMPU r34, r33, r0
|
||||||
CMPUI r34, r34, 0d
|
CMPUI r34, r34, 0d
|
||||||
NOT r34, r34
|
NOT r34, r34
|
||||||
ST r34, r32, 0a, 1h
|
ST r34, r32, 0a, 1h
|
||||||
1: LD r31, r254, 0a, 32h
|
1: LD r31, r254, 0a, 40h
|
||||||
ADDI64 r254, r254, 32d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 161
|
code size: 164
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,9 +1,14 @@
|
||||||
main:
|
main:
|
||||||
LRA r3, r0, :complex_global_var
|
ADDI64 r254, r254, -16d
|
||||||
LD r5, r3, 0a, 8h
|
ST r32, r254, 0a, 16h
|
||||||
ADDI64 r1, r5, 5d
|
LRA r13, r0, :complex_global_var
|
||||||
ST r1, r3, 0a, 8h
|
LD r14, r13, 0a, 8h
|
||||||
|
ADDI64 r14, r14, 5d
|
||||||
|
ST r14, r13, 0a, 8h
|
||||||
|
CP r1, r14
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 71
|
code size: 122
|
||||||
ret: 55
|
ret: 55
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,20 +1,23 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -128d
|
ADDI64 r254, r254, -176d
|
||||||
LI8 r8, 69b
|
ST r32, r254, 128a, 48h
|
||||||
LI64 r7, 128d
|
LI8 r15, 69b
|
||||||
CP r9, r0
|
LI64 r16, 128d
|
||||||
ADDI64 r6, r254, 0d
|
CP r13, r0
|
||||||
2: LD r3, r254, 42a, 1h
|
ADDI64 r17, r254, 0d
|
||||||
JLTU r9, r7, :0
|
2: LD r18, r254, 42a, 1h
|
||||||
ANDI r1, r3, 255d
|
JLTU r13, r16, :0
|
||||||
|
ANDI r13, r18, 255d
|
||||||
|
CP r1, r13
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADDI64 r10, r9, 1d
|
0: ADDI64 r14, r13, 1d
|
||||||
ADD64 r5, r6, r9
|
ADD64 r13, r17, r13
|
||||||
ST r8, r5, 0a, 1h
|
ST r15, r13, 0a, 1h
|
||||||
CP r9, r10
|
CP r13, r14
|
||||||
JMP :2
|
JMP :2
|
||||||
1: ADDI64 r254, r254, 128d
|
1: LD r32, r254, 128a, 48h
|
||||||
|
ADDI64 r254, r254, 176d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 138
|
code size: 167
|
||||||
ret: 69
|
ret: 69
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,30 +1,36 @@
|
||||||
fib:
|
fib:
|
||||||
ADDI64 r254, r254, -40d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 40h
|
ST r31, r254, 0a, 40h
|
||||||
LI64 r1, 1d
|
CP r32, r2
|
||||||
LI64 r32, 2d
|
LI64 r33, 1d
|
||||||
JGTU r2, r32, :0
|
LI64 r34, 2d
|
||||||
|
JGTU r32, r34, :0
|
||||||
|
CP r1, r33
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r33, r2
|
0: SUB64 r33, r32, r33
|
||||||
SUB64 r2, r33, r1
|
CP r2, r33
|
||||||
CP r34, r33
|
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
CP r2, r34
|
CP r33, r1
|
||||||
CP r35, r1
|
SUB64 r32, r32, r34
|
||||||
SUB64 r2, r2, r32
|
CP r2, r32
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
ADD64 r1, r1, r35
|
CP r32, r1
|
||||||
|
ADD64 r32, r32, r33
|
||||||
|
CP r1, r32
|
||||||
1: LD r31, r254, 0a, 40h
|
1: LD r31, r254, 0a, 40h
|
||||||
ADDI64 r254, r254, 40d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
LI64 r2, 10d
|
LI64 r32, 10d
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
LD r31, r254, 0a, 8h
|
CP r32, r1
|
||||||
ADDI64 r254, r254, 8d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 211
|
code size: 229
|
||||||
ret: 55
|
ret: 55
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,9 +1,13 @@
|
||||||
main:
|
main:
|
||||||
CP r4, r0
|
ADDI64 r254, r254, -8d
|
||||||
0: ADDI64 r4, r4, 1d
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r0
|
||||||
|
0: ADDI64 r13, r13, 1d
|
||||||
JMP :0
|
JMP :0
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 38
|
code size: 86
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,19 +1,25 @@
|
||||||
main:
|
main:
|
||||||
LI64 r2, 8d
|
ADDI64 r254, r254, -24d
|
||||||
|
ST r32, r254, 0a, 24h
|
||||||
|
LI64 r13, 8d
|
||||||
|
CP r2, r13
|
||||||
ECA
|
ECA
|
||||||
LI64 r11, 6d
|
LI64 r14, 6d
|
||||||
LRA r8, r0, :gb
|
LRA r15, r0, :gb
|
||||||
LD r10, r8, 0a, 8h
|
LD r13, r15, 0a, 8h
|
||||||
CMPU r12, r10, r0
|
CMPU r13, r13, r0
|
||||||
CMPUI r12, r12, 0d
|
CMPUI r13, r13, 0d
|
||||||
OR r2, r12, r0
|
OR r13, r13, r0
|
||||||
ANDI r2, r2, 255d
|
ANDI r13, r13, 255d
|
||||||
JNE r2, r0, :0
|
JNE r13, r0, :0
|
||||||
CP r7, r11
|
CP r13, r14
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r7, 1d
|
0: LI64 r13, 1d
|
||||||
1: SUB64 r1, r7, r11
|
1: SUB64 r13, r13, r14
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 125
|
code size: 179
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,17 +1,22 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
JAL r31, r0, :scalar_values
|
JAL r31, r0, :scalar_values
|
||||||
JEQ r1, r0, :0
|
CP r32, r1
|
||||||
LI64 r1, 1d
|
JEQ r32, r0, :0
|
||||||
|
LI64 r32, 1d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JAL r31, r0, :structs
|
0: JAL r31, r0, :structs
|
||||||
JEQ r1, r0, :2
|
CP r32, r1
|
||||||
|
JEQ r32, r0, :2
|
||||||
JAL r31, r0, :structs
|
JAL r31, r0, :structs
|
||||||
|
CP r32, r1
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
2: CP r1, r0
|
2: CP r1, r0
|
||||||
1: LD r31, r254, 0a, 8h
|
1: LD r31, r254, 0a, 24h
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
scalar_values:
|
scalar_values:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
|
@ -19,6 +24,6 @@ scalar_values:
|
||||||
structs:
|
structs:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 149
|
code size: 164
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI64 r1, 10d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 10d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 29
|
code size: 80
|
||||||
ret: 10
|
ret: 10
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,108 +1,106 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -90d
|
ADDI64 r254, r254, -130d
|
||||||
ST r31, r254, 58a, 32h
|
ST r31, r254, 58a, 72h
|
||||||
ADDI64 r32, r254, 33d
|
ADDI64 r32, r254, 33d
|
||||||
ADDI64 r2, r254, 34d
|
ADDI64 r33, r254, 34d
|
||||||
ADDI64 r6, r254, 1d
|
ADDI64 r34, r254, 1d
|
||||||
ADDI64 r4, r254, 17d
|
ADDI64 r35, r254, 17d
|
||||||
ST r32, r254, 34a, 8h
|
ST r32, r254, 34a, 8h
|
||||||
LI64 r33, 100d
|
LI64 r36, 100d
|
||||||
ADDI64 r7, r254, 0d
|
ADDI64 r37, r254, 0d
|
||||||
LI8 r34, 1b
|
LI8 r38, 1b
|
||||||
ST r0, r254, 1a, 8h
|
ST r0, r254, 1a, 8h
|
||||||
ST r0, r254, 17a, 8h
|
ST r0, r254, 17a, 8h
|
||||||
ST r33, r254, 42a, 8h
|
ST r36, r254, 42a, 8h
|
||||||
ST r34, r254, 0a, 1h
|
ST r38, r254, 0a, 1h
|
||||||
ST r0, r254, 9a, 8h
|
ST r0, r254, 9a, 8h
|
||||||
ST r0, r254, 25a, 8h
|
ST r0, r254, 25a, 8h
|
||||||
ST r33, r254, 50a, 8h
|
ST r36, r254, 50a, 8h
|
||||||
ST r0, r254, 33a, 1h
|
ST r0, r254, 33a, 1h
|
||||||
CP r3, r4
|
CP r2, r33
|
||||||
CP r5, r6
|
LD r3, r35, 0a, 16h
|
||||||
LD r3, r3, 0a, 16h
|
LD r5, r34, 0a, 16h
|
||||||
LD r5, r5, 0a, 16h
|
LD r7, r37, 0a, 1h
|
||||||
LD r7, r7, 0a, 1h
|
|
||||||
JAL r31, r0, :put_filled_rect
|
JAL r31, r0, :put_filled_rect
|
||||||
LD r31, r254, 58a, 32h
|
LD r31, r254, 58a, 72h
|
||||||
ADDI64 r254, r254, 90d
|
ADDI64 r254, r254, 130d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
put_filled_rect:
|
put_filled_rect:
|
||||||
ADDI64 r254, r254, -220d
|
ADDI64 r254, r254, -236d
|
||||||
ST r32, r254, 108a, 112h
|
ST r32, r254, 108a, 128h
|
||||||
|
CP r14, r2
|
||||||
ST r3, r254, 92a, 16h
|
ST r3, r254, 92a, 16h
|
||||||
ADDI64 r3, r254, 92d
|
ADDI64 r3, r254, 92d
|
||||||
|
CP r15, r3
|
||||||
ST r5, r254, 76a, 16h
|
ST r5, r254, 76a, 16h
|
||||||
ADDI64 r5, r254, 76d
|
ADDI64 r5, r254, 76d
|
||||||
|
CP r13, r5
|
||||||
ST r7, r254, 75a, 1h
|
ST r7, r254, 75a, 1h
|
||||||
ADDI64 r7, r254, 75d
|
ADDI64 r7, r254, 75d
|
||||||
LI64 r8, 25d
|
CP r16, r7
|
||||||
LI64 r32, 2d
|
LI64 r17, 25d
|
||||||
LI64 r6, 8d
|
LI64 r18, 2d
|
||||||
ADDI64 r33, r254, 25d
|
LI64 r19, 8d
|
||||||
ADDI64 r34, r254, 50d
|
ADDI64 r20, r254, 25d
|
||||||
LI8 r35, 5b
|
ADDI64 r21, r254, 50d
|
||||||
ST r35, r254, 25a, 1h
|
LI8 r22, 5b
|
||||||
LD r36, r5, 0a, 8h
|
ST r22, r254, 25a, 1h
|
||||||
ST r36, r254, 26a, 4h
|
LD r23, r13, 0a, 8h
|
||||||
LI64 r37, 1d
|
ST r23, r254, 26a, 4h
|
||||||
ST r37, r254, 30a, 4h
|
LI64 r24, 1d
|
||||||
ST r7, r254, 34a, 8h
|
ST r24, r254, 30a, 4h
|
||||||
ST r35, r254, 50a, 1h
|
ST r16, r254, 34a, 8h
|
||||||
ST r36, r254, 51a, 4h
|
ST r22, r254, 50a, 1h
|
||||||
ST r37, r254, 55a, 4h
|
ST r23, r254, 51a, 4h
|
||||||
ST r7, r254, 59a, 8h
|
ST r24, r254, 55a, 4h
|
||||||
CP r38, r7
|
ST r16, r254, 59a, 8h
|
||||||
LD r7, r3, 8a, 8h
|
LD r25, r15, 8a, 8h
|
||||||
LD r39, r5, 8a, 8h
|
LD r13, r13, 8a, 8h
|
||||||
ADD64 r11, r39, r7
|
ADD64 r26, r13, r25
|
||||||
SUB64 r4, r11, r37
|
SUB64 r26, r26, r24
|
||||||
LD r40, r2, 8a, 8h
|
LD r27, r14, 8a, 8h
|
||||||
MUL64 r5, r40, r4
|
MUL64 r26, r27, r26
|
||||||
LD r10, r2, 0a, 8h
|
LD r14, r14, 0a, 8h
|
||||||
ADD64 r9, r10, r5
|
ADD64 r26, r14, r26
|
||||||
LD r41, r3, 0a, 8h
|
LD r28, r15, 0a, 8h
|
||||||
ADD64 r42, r41, r9
|
ADD64 r15, r28, r26
|
||||||
MUL64 r43, r40, r7
|
MUL64 r25, r27, r25
|
||||||
3: ADD64 r43, r43, r10
|
ADD64 r14, r14, r25
|
||||||
ADD64 r9, r43, r41
|
ADD64 r14, r28, r14
|
||||||
JGTU r39, r37, :0
|
3: JGTU r13, r24, :0
|
||||||
JNE r39, r37, :1
|
JNE r13, r24, :1
|
||||||
ADDI64 r4, r254, 0d
|
ADDI64 r13, r254, 0d
|
||||||
ST r35, r254, 0a, 1h
|
ST r22, r254, 0a, 1h
|
||||||
ST r36, r254, 1a, 4h
|
ST r23, r254, 1a, 4h
|
||||||
ST r37, r254, 5a, 4h
|
ST r24, r254, 5a, 4h
|
||||||
ST r38, r254, 9a, 8h
|
ST r16, r254, 9a, 8h
|
||||||
ST r9, r254, 17a, 8h
|
ST r14, r254, 17a, 8h
|
||||||
CP r2, r6
|
CP r2, r19
|
||||||
CP r3, r32
|
CP r3, r18
|
||||||
CP r5, r8
|
CP r4, r13
|
||||||
|
CP r5, r17
|
||||||
ECA
|
ECA
|
||||||
JMP :1
|
JMP :1
|
||||||
1: JMP :2
|
1: JMP :2
|
||||||
0: CP r3, r32
|
0: ST r14, r254, 67a, 8h
|
||||||
CP r44, r6
|
CP r2, r19
|
||||||
CP r45, r8
|
CP r3, r18
|
||||||
ST r9, r254, 67a, 8h
|
CP r4, r21
|
||||||
CP r2, r44
|
CP r5, r17
|
||||||
CP r4, r34
|
|
||||||
CP r5, r45
|
|
||||||
ECA
|
ECA
|
||||||
ST r42, r254, 42a, 8h
|
ST r15, r254, 42a, 8h
|
||||||
CP r2, r44
|
CP r2, r19
|
||||||
CP r3, r32
|
CP r3, r18
|
||||||
CP r4, r33
|
CP r4, r20
|
||||||
CP r5, r45
|
CP r5, r17
|
||||||
ECA
|
ECA
|
||||||
SUB64 r42, r42, r40
|
SUB64 r15, r15, r27
|
||||||
SUB64 r39, r39, r32
|
ADD64 r14, r27, r14
|
||||||
CP r10, r41
|
SUB64 r13, r13, r18
|
||||||
CP r41, r40
|
|
||||||
CP r8, r45
|
|
||||||
CP r6, r44
|
|
||||||
JMP :3
|
JMP :3
|
||||||
2: LD r32, r254, 108a, 112h
|
2: LD r32, r254, 108a, 128h
|
||||||
ADDI64 r254, r254, 220d
|
ADDI64 r254, r254, 236d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 906
|
code size: 901
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,19 +1,31 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -72d
|
||||||
ST r31, r254, 16a, 8h
|
ST r31, r254, 16a, 56h
|
||||||
ADDI64 r3, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
ADDI64 r2, r254, 8d
|
ADDI64 r33, r254, 8d
|
||||||
ST r0, r254, 0a, 8h
|
ST r0, r254, 0a, 8h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
LI64 r4, 1024d
|
LI64 r36, 1024d
|
||||||
|
CP r2, r33
|
||||||
|
CP r3, r32
|
||||||
|
CP r4, r36
|
||||||
JAL r31, r0, :set
|
JAL r31, r0, :set
|
||||||
ANDI r1, r1, 4294967295d
|
CP r32, r1
|
||||||
LD r31, r254, 16a, 8h
|
ANDI r32, r32, 4294967295d
|
||||||
ADDI64 r254, r254, 24d
|
CP r1, r32
|
||||||
|
LD r31, r254, 16a, 56h
|
||||||
|
ADDI64 r254, r254, 72d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
set:
|
set:
|
||||||
CP r1, r4
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r0, r2
|
||||||
|
CP r0, r3
|
||||||
|
CP r13, r4
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 157
|
code size: 229
|
||||||
ret: 1024
|
ret: 1024
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,29 +1,33 @@
|
||||||
integer_range:
|
integer_range:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
ST r32, r254, 0a, 16h
|
ST r32, r254, 0a, 32h
|
||||||
CP r32, r2
|
CP r13, r2
|
||||||
CP r33, r3
|
CP r14, r3
|
||||||
LI64 r3, 4d
|
LI64 r15, 4d
|
||||||
LI64 r2, 3d
|
LI64 r16, 3d
|
||||||
|
CP r2, r16
|
||||||
|
CP r3, r15
|
||||||
ECA
|
ECA
|
||||||
CP r2, r32
|
CP r15, r1
|
||||||
CP r3, r33
|
SUB64 r14, r14, r13
|
||||||
SUB64 r3, r3, r2
|
ADDI64 r14, r14, 1d
|
||||||
ADDI64 r3, r3, 1d
|
DIRU64 r0, r14, r15, r14
|
||||||
DIRU64 r0, r5, r1, r3
|
ADD64 r13, r14, r13
|
||||||
ADD64 r1, r5, r2
|
CP r1, r13
|
||||||
LD r32, r254, 0a, 16h
|
LD r32, r254, 0a, 32h
|
||||||
ADDI64 r254, r254, 16d
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
LI64 r3, 1000d
|
LI64 r32, 1000d
|
||||||
CP r2, r0
|
CP r2, r0
|
||||||
|
CP r3, r32
|
||||||
JAL r31, r0, :integer_range
|
JAL r31, r0, :integer_range
|
||||||
LD r31, r254, 0a, 8h
|
CP r0, r1
|
||||||
ADDI64 r254, r254, 8d
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 203
|
code size: 215
|
||||||
ret: 42
|
ret: 42
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,15 +1,18 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -16d
|
||||||
LI64 r3, 10d
|
ST r32, r254, 8a, 8h
|
||||||
ST r3, r254, 0a, 8h
|
LI64 r13, 10d
|
||||||
2: LD r1, r254, 0a, 8h
|
ST r13, r254, 0a, 8h
|
||||||
JNE r1, r0, :0
|
2: LD r13, r254, 0a, 8h
|
||||||
|
JNE r13, r0, :0
|
||||||
|
CP r1, r13
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADDI64 r11, r1, -1d
|
0: ADDI64 r13, r13, -1d
|
||||||
ST r11, r254, 0a, 8h
|
ST r13, r254, 0a, 8h
|
||||||
JMP :2
|
JMP :2
|
||||||
1: ADDI64 r254, r254, 8d
|
1: LD r32, r254, 8a, 8h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 116
|
code size: 145
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,24 +1,32 @@
|
||||||
fib:
|
fib:
|
||||||
LI64 r6, 1d
|
ADDI64 r254, r254, -40d
|
||||||
CP r7, r0
|
ST r32, r254, 0a, 40h
|
||||||
CP r1, r7
|
CP r13, r2
|
||||||
CP r12, r6
|
LI64 r17, 1d
|
||||||
2: JNE r2, r7, :0
|
CP r15, r0
|
||||||
|
CP r16, r17
|
||||||
|
CP r14, r15
|
||||||
|
2: JNE r13, r15, :0
|
||||||
|
CP r1, r14
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADD64 r3, r12, r1
|
0: ADD64 r14, r16, r14
|
||||||
SUB64 r2, r2, r6
|
SUB64 r13, r13, r17
|
||||||
CP r1, r12
|
SWA r14, r16
|
||||||
CP r12, r3
|
|
||||||
JMP :2
|
JMP :2
|
||||||
1: JALA r0, r31, 0a
|
1: LD r32, r254, 0a, 40h
|
||||||
main:
|
ADDI64 r254, r254, 40d
|
||||||
ADDI64 r254, r254, -8d
|
|
||||||
ST r31, r254, 0a, 8h
|
|
||||||
LI64 r2, 10d
|
|
||||||
JAL r31, r0, :fib
|
|
||||||
LD r31, r254, 0a, 8h
|
|
||||||
ADDI64 r254, r254, 8d
|
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 143
|
main:
|
||||||
|
ADDI64 r254, r254, -24d
|
||||||
|
ST r31, r254, 0a, 24h
|
||||||
|
LI64 r32, 10d
|
||||||
|
CP r2, r32
|
||||||
|
JAL r31, r0, :fib
|
||||||
|
CP r32, r1
|
||||||
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
|
JALA r0, r31, 0a
|
||||||
|
code size: 203
|
||||||
ret: 55
|
ret: 55
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI64 r1, 1d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 1d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 29
|
code size: 80
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,31 +1,38 @@
|
||||||
decide:
|
decide:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -40d
|
||||||
ADDI64 r7, r254, 0d
|
ST r32, r254, 24a, 16h
|
||||||
ST r2, r254, 0a, 8h
|
CP r14, r2
|
||||||
|
CP r15, r1
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
|
ST r14, r254, 0a, 8h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
ST r0, r254, 16a, 8h
|
ST r0, r254, 16a, 8h
|
||||||
BMC r7, r1, 24h
|
BMC r13, r15, 24h
|
||||||
ADDI64 r254, r254, 24d
|
LD r32, r254, 24a, 16h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -112d
|
ADDI64 r254, r254, -128d
|
||||||
ST r31, r254, 72a, 40h
|
ST r31, r254, 72a, 56h
|
||||||
ADDI64 r32, r254, 48d
|
ADDI64 r32, r254, 48d
|
||||||
CP r2, r0
|
CP r2, r0
|
||||||
CP r1, r32
|
CP r1, r32
|
||||||
JAL r31, r0, :decide
|
JAL r31, r0, :decide
|
||||||
ADDI64 r1, r254, 24d
|
ADDI64 r34, r254, 24d
|
||||||
BMC r32, r1, 24h
|
BMC r32, r34, 24h
|
||||||
LI64 r2, 1d
|
LI64 r36, 1d
|
||||||
|
CP r2, r36
|
||||||
|
CP r1, r34
|
||||||
JAL r31, r0, :decide
|
JAL r31, r0, :decide
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r36, r254, 0d
|
||||||
BMC r32, r33, 24h
|
BMC r32, r36, 24h
|
||||||
LD r34, r254, 24a, 8h
|
LD r32, r254, 24a, 8h
|
||||||
LD r35, r254, 0a, 8h
|
LD r33, r254, 0a, 8h
|
||||||
ADD64 r1, r35, r34
|
ADD64 r32, r33, r32
|
||||||
LD r31, r254, 72a, 40h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 112d
|
LD r31, r254, 72a, 56h
|
||||||
|
ADDI64 r254, r254, 128d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 258
|
code size: 299
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,26 +1,24 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
JAL r31, r0, :opaque
|
JAL r31, r0, :opaque
|
||||||
CP r32, r1
|
CP r33, r1
|
||||||
JAL r31, r0, :opaque
|
JAL r31, r0, :opaque
|
||||||
CP r1, r32
|
CP r0, r1
|
||||||
JNE r1, r0, :0
|
JNE r33, r0, :0
|
||||||
CP r32, r1
|
CP r32, r0
|
||||||
CP r1, r0
|
|
||||||
CP r33, r32
|
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r33, r1
|
0: LD r32, r33, 0a, 8h
|
||||||
LD r1, r33, 0a, 8h
|
|
||||||
1: JEQ r33, r0, :2
|
1: JEQ r33, r0, :2
|
||||||
LD r1, r33, 0a, 8h
|
LD r32, r33, 0a, 8h
|
||||||
JMP :2
|
JMP :2
|
||||||
2: LD r31, r254, 0a, 24h
|
2: CP r1, r32
|
||||||
ADDI64 r254, r254, 24d
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
opaque:
|
opaque:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 159
|
code size: 153
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,32 +1,36 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -30d
|
ADDI64 r254, r254, -38d
|
||||||
ST r31, r254, 6a, 24h
|
ST r31, r254, 6a, 32h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
2: JAL r31, r0, :return_fn
|
2: CP r1, r32
|
||||||
|
JAL r31, r0, :return_fn
|
||||||
ST r1, r32, 0a, 6h
|
ST r1, r32, 0a, 6h
|
||||||
LD r33, r254, 0a, 1h
|
LD r33, r254, 0a, 1h
|
||||||
ANDI r33, r33, 255d
|
ANDI r33, r33, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JEQ r33, r0, :0
|
JEQ r33, r0, :0
|
||||||
LI64 r1, 1d
|
LI64 r32, 1d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: JMP :2
|
0: JMP :2
|
||||||
1: LD r31, r254, 6a, 24h
|
1: LD r31, r254, 6a, 32h
|
||||||
ADDI64 r254, r254, 30d
|
ADDI64 r254, r254, 38d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
return_fn:
|
return_fn:
|
||||||
ADDI64 r254, r254, -6d
|
ADDI64 r254, r254, -22d
|
||||||
LI8 r5, 1b
|
ST r32, r254, 6a, 16h
|
||||||
ADDI64 r4, r254, 0d
|
LI8 r13, 1b
|
||||||
ST r5, r254, 0a, 1h
|
ADDI64 r14, r254, 0d
|
||||||
|
ST r13, r254, 0a, 1h
|
||||||
ST r0, r254, 1a, 1h
|
ST r0, r254, 1a, 1h
|
||||||
ST r0, r254, 2a, 1h
|
ST r0, r254, 2a, 1h
|
||||||
ST r0, r254, 3a, 1h
|
ST r0, r254, 3a, 1h
|
||||||
ST r0, r254, 4a, 1h
|
ST r0, r254, 4a, 1h
|
||||||
ST r0, r254, 5a, 1h
|
ST r0, r254, 5a, 1h
|
||||||
LD r1, r4, 0a, 6h
|
LD r1, r14, 0a, 6h
|
||||||
ADDI64 r254, r254, 6d
|
LD r32, r254, 6a, 16h
|
||||||
|
ADDI64 r254, r254, 22d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 296
|
code size: 328
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,76 +1,84 @@
|
||||||
foo:
|
foo:
|
||||||
ADDI64 r254, r254, -176d
|
ADDI64 r254, r254, -120d
|
||||||
ST r31, r254, 80a, 96h
|
ST r31, r254, 80a, 40h
|
||||||
ADDI64 r32, r254, 64d
|
ADDI64 r32, r254, 64d
|
||||||
LRA r3, r0, :some_file
|
LRA r33, r0, :some_file
|
||||||
|
CP r3, r33
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :get
|
JAL r31, r0, :get
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r33, r254, 64a, 1h
|
LD r33, r254, 64a, 1h
|
||||||
ANDI r33, r33, 255d
|
ANDI r33, r33, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
ADDI64 r34, r254, 48d
|
ADDI64 r32, r254, 48d
|
||||||
ST r0, r254, 48a, 1h
|
ST r0, r254, 48a, 1h
|
||||||
LD r1, r34, 0a, 16h
|
LD r1, r32, 0a, 16h
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI8 r35, 1b
|
0: LI8 r33, 1b
|
||||||
LI64 r36, 4d
|
LI64 r34, 4d
|
||||||
LD r37, r254, 72a, 8h
|
LD r32, r254, 72a, 8h
|
||||||
JNE r37, r36, :2
|
JNE r32, r34, :2
|
||||||
ADDI64 r37, r254, 32d
|
ADDI64 r32, r254, 32d
|
||||||
ST r35, r254, 32a, 1h
|
ST r33, r254, 32a, 1h
|
||||||
LI64 r38, 2d
|
LI64 r33, 2d
|
||||||
ST r38, r254, 40a, 8h
|
ST r33, r254, 40a, 8h
|
||||||
LD r1, r37, 0a, 16h
|
LD r1, r32, 0a, 16h
|
||||||
JMP :1
|
JMP :1
|
||||||
2: LRA r39, r0, :MAGIC
|
2: LRA r34, r0, :MAGIC
|
||||||
LD r40, r39, 0a, 8h
|
LD r34, r34, 0a, 8h
|
||||||
JNE r40, r37, :3
|
JNE r34, r32, :3
|
||||||
ADDI64 r41, r254, 16d
|
ADDI64 r32, r254, 16d
|
||||||
ST r35, r254, 16a, 1h
|
ST r33, r254, 16a, 1h
|
||||||
ST r0, r254, 24a, 8h
|
ST r0, r254, 24a, 8h
|
||||||
LD r1, r41, 0a, 16h
|
LD r1, r32, 0a, 16h
|
||||||
JMP :1
|
JMP :1
|
||||||
3: ADDI64 r42, r254, 0d
|
3: ADDI64 r32, r254, 0d
|
||||||
ST r0, r254, 0a, 1h
|
ST r0, r254, 0a, 1h
|
||||||
LD r1, r42, 0a, 16h
|
LD r1, r32, 0a, 16h
|
||||||
1: LD r31, r254, 80a, 96h
|
1: LD r31, r254, 80a, 40h
|
||||||
ADDI64 r254, r254, 176d
|
ADDI64 r254, r254, 120d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
get:
|
get:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -56d
|
||||||
LD r5, r3, 0a, 1h
|
ST r32, r254, 32a, 24h
|
||||||
LRA r7, r0, :MAGIC
|
CP r13, r3
|
||||||
ANDI r11, r5, 255d
|
LD r13, r13, 0a, 1h
|
||||||
LD r10, r7, 0a, 8h
|
LRA r14, r0, :MAGIC
|
||||||
JNE r10, r11, :0
|
ANDI r13, r13, 255d
|
||||||
LI8 r4, 1b
|
LD r14, r14, 0a, 8h
|
||||||
ADDI64 r3, r254, 16d
|
JNE r14, r13, :0
|
||||||
ST r4, r254, 16a, 1h
|
LI8 r13, 1b
|
||||||
ST r10, r254, 24a, 8h
|
ADDI64 r15, r254, 16d
|
||||||
LD r1, r3, 0a, 16h
|
ST r13, r254, 16a, 1h
|
||||||
|
ST r14, r254, 24a, 8h
|
||||||
|
LD r1, r15, 0a, 16h
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADDI64 r9, r254, 0d
|
0: ADDI64 r13, r254, 0d
|
||||||
ST r0, r254, 0a, 1h
|
ST r0, r254, 0a, 1h
|
||||||
LD r1, r9, 0a, 16h
|
LD r1, r13, 0a, 16h
|
||||||
1: ADDI64 r254, r254, 32d
|
1: LD r32, r254, 32a, 24h
|
||||||
|
ADDI64 r254, r254, 56d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -40d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 16a, 24h
|
ST r31, r254, 16a, 32h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r33, r254, 0a, 1h
|
LD r33, r254, 0a, 1h
|
||||||
ANDI r33, r33, 255d
|
ANDI r33, r33, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
LI64 r1, 100d
|
LI64 r32, 100d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LD r1, r254, 8a, 8h
|
0: LD r32, r254, 8a, 8h
|
||||||
1: LD r31, r254, 16a, 24h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 40d
|
1: LD r31, r254, 16a, 32h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 749
|
code size: 793
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -2,22 +2,23 @@ get_ptr:
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 32h
|
ST r31, r254, 0a, 40h
|
||||||
JAL r31, r0, :get_ptr
|
JAL r31, r0, :get_ptr
|
||||||
JNE r1, r0, :0
|
CP r32, r1
|
||||||
|
JNE r32, r0, :0
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r32, 10d
|
0: LI64 r33, 10d
|
||||||
CP r33, r1
|
3: LD r34, r32, 0a, 8h
|
||||||
2: LD r1, r33, 0a, 8h
|
JEQ r34, r33, :2
|
||||||
JEQ r1, r32, :1
|
ADDI64 r34, r34, 1d
|
||||||
ADDI64 r34, r1, 1d
|
ST r34, r32, 0a, 8h
|
||||||
ST r34, r33, 0a, 8h
|
JMP :3
|
||||||
JMP :2
|
2: CP r1, r34
|
||||||
1: LD r31, r254, 0a, 32h
|
1: LD r31, r254, 0a, 40h
|
||||||
ADDI64 r254, r254, 32d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 161
|
code size: 164
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,55 +1,67 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -98d
|
ADDI64 r254, r254, -74d
|
||||||
ST r31, r254, 26a, 72h
|
ST r31, r254, 26a, 48h
|
||||||
JAL r31, r0, :returner_fn
|
JAL r31, r0, :returner_fn
|
||||||
CP r32, r1
|
CP r32, r1
|
||||||
ADDI64 r1, r254, 2d
|
ADDI64 r33, r254, 2d
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :returner_bn
|
JAL r31, r0, :returner_bn
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r34, r254, 0d
|
||||||
|
CP r1, r34
|
||||||
JAL r31, r0, :returner_cn
|
JAL r31, r0, :returner_cn
|
||||||
ST r1, r33, 0a, 2h
|
ST r1, r34, 0a, 2h
|
||||||
LD r34, r254, 2a, 1h
|
LD r33, r254, 2a, 1h
|
||||||
CP r1, r32
|
CMPU r32, r32, r0
|
||||||
CMPU r35, r1, r0
|
|
||||||
CMPUI r35, r35, 0d
|
|
||||||
CMPU r32, r34, r0
|
|
||||||
CMPUI r32, r32, 0d
|
CMPUI r32, r32, 0d
|
||||||
LD r36, r254, 0a, 1h
|
CMPU r33, r33, r0
|
||||||
AND r37, r32, r35
|
CMPUI r33, r33, 0d
|
||||||
CMPU r38, r36, r0
|
LD r34, r254, 0a, 1h
|
||||||
CMPUI r38, r38, 0d
|
AND r32, r33, r32
|
||||||
AND r39, r38, r37
|
CMPU r33, r34, r0
|
||||||
ANDI r39, r39, 255d
|
CMPUI r33, r33, 0d
|
||||||
JNE r39, r0, :0
|
AND r32, r33, r32
|
||||||
|
ANDI r32, r32, 255d
|
||||||
|
JNE r32, r0, :0
|
||||||
CP r1, r0
|
CP r1, r0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LI64 r1, 1d
|
0: LI64 r32, 1d
|
||||||
1: LD r31, r254, 26a, 72h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 98d
|
1: LD r31, r254, 26a, 48h
|
||||||
|
ADDI64 r254, r254, 74d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
returner_bn:
|
returner_bn:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -40d
|
||||||
LI8 r7, 1b
|
ST r32, r254, 24a, 16h
|
||||||
ADDI64 r6, r254, 0d
|
CP r15, r1
|
||||||
ST r7, r254, 0a, 1h
|
LI8 r14, 1b
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
|
ST r14, r254, 0a, 1h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
ST r0, r254, 16a, 8h
|
ST r0, r254, 16a, 8h
|
||||||
BMC r6, r1, 24h
|
BMC r13, r15, 24h
|
||||||
ADDI64 r254, r254, 24d
|
LD r32, r254, 24a, 16h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
returner_cn:
|
returner_cn:
|
||||||
ADDI64 r254, r254, -2d
|
ADDI64 r254, r254, -18d
|
||||||
LI8 r5, 1b
|
ST r32, r254, 2a, 16h
|
||||||
ADDI64 r4, r254, 0d
|
LI8 r13, 1b
|
||||||
ST r5, r254, 0a, 1h
|
ADDI64 r14, r254, 0d
|
||||||
|
ST r13, r254, 0a, 1h
|
||||||
ST r0, r254, 1a, 1h
|
ST r0, r254, 1a, 1h
|
||||||
LD r1, r4, 0a, 2h
|
LD r1, r14, 0a, 2h
|
||||||
ADDI64 r254, r254, 2d
|
LD r32, r254, 2a, 16h
|
||||||
|
ADDI64 r254, r254, 18d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
returner_fn:
|
returner_fn:
|
||||||
LD r3, r254, 0a, 0h
|
ADDI64 r254, r254, -8d
|
||||||
ORI r1, r3, 128d
|
ST r32, r254, 0a, 8h
|
||||||
|
LD r13, r254, 0a, 0h
|
||||||
|
ORI r13, r13, 128d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 454
|
code size: 566
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,130 +1,157 @@
|
||||||
decide:
|
decide:
|
||||||
LI8 r1, 1b
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI8 r13, 1b
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -224d
|
ADDI64 r254, r254, -144d
|
||||||
ST r31, r254, 80a, 144h
|
ST r31, r254, 80a, 64h
|
||||||
JAL r31, r0, :decide
|
JAL r31, r0, :decide
|
||||||
CP r32, r0
|
CP r32, r1
|
||||||
ADDI64 r2, r254, 72d
|
CP r33, r0
|
||||||
CP r33, r2
|
ADDI64 r34, r254, 72d
|
||||||
ANDI r1, r1, 255d
|
ANDI r32, r32, 255d
|
||||||
JNE r1, r0, :0
|
JNE r32, r0, :0
|
||||||
CP r34, r32
|
CP r32, r33
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r34, r33
|
0: CP r32, r34
|
||||||
1: LI64 r35, 1d
|
1: LI64 r35, 1d
|
||||||
ST r35, r254, 72a, 8h
|
ST r35, r254, 72a, 8h
|
||||||
JNE r34, r32, :2
|
JNE r32, r33, :2
|
||||||
LI64 r1, 9001d
|
LI64 r32, 9001d
|
||||||
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
2: JAL r31, r0, :decide
|
2: JAL r31, r0, :decide
|
||||||
ANDI r1, r1, 255d
|
CP r33, r1
|
||||||
JNE r1, r0, :4
|
ANDI r33, r33, 255d
|
||||||
LI8 r36, 1b
|
JNE r33, r0, :4
|
||||||
ST r36, r254, 56a, 1h
|
LI8 r33, 1b
|
||||||
LD r37, r34, 0a, 8h
|
ST r33, r254, 56a, 1h
|
||||||
ST r37, r254, 64a, 8h
|
LD r32, r32, 0a, 8h
|
||||||
|
ST r32, r254, 64a, 8h
|
||||||
JMP :5
|
JMP :5
|
||||||
4: ST r0, r254, 56a, 1h
|
4: ST r0, r254, 56a, 1h
|
||||||
5: LD r38, r254, 56a, 1h
|
5: LD r32, r254, 56a, 1h
|
||||||
ANDI r38, r38, 255d
|
ANDI r32, r32, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JEQ r38, r0, :6
|
JEQ r32, r0, :6
|
||||||
LI64 r1, 42d
|
LI64 r32, 42d
|
||||||
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
6: JAL r31, r0, :decide
|
6: JAL r31, r0, :decide
|
||||||
CP r39, r0
|
CP r32, r1
|
||||||
ANDI r1, r1, 255d
|
CP r33, r0
|
||||||
JNE r1, r0, :7
|
ANDI r32, r32, 255d
|
||||||
CP r40, r39
|
JNE r32, r0, :7
|
||||||
|
CP r32, r33
|
||||||
JMP :8
|
JMP :8
|
||||||
7: LI32 r40, 2147483649w
|
7: LI32 r32, 2147483649w
|
||||||
8: ANDI r40, r40, 4294967295d
|
8: ANDI r32, r32, 4294967295d
|
||||||
ANDI r39, r39, 4294967295d
|
ANDI r33, r33, 4294967295d
|
||||||
JNE r40, r39, :9
|
JNE r32, r33, :9
|
||||||
LI64 r1, 69d
|
LI64 r32, 69d
|
||||||
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
9: ADDI64 r41, r254, 40d
|
9: ADDI64 r33, r254, 40d
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :new_foo
|
JAL r31, r0, :new_foo
|
||||||
ST r1, r41, 0a, 16h
|
ST r1, r33, 0a, 16h
|
||||||
CP r3, r41
|
LD r37, r254, 40a, 8h
|
||||||
LD r42, r254, 40a, 8h
|
JNE r37, r0, :10
|
||||||
JNE r42, r0, :10
|
LI64 r32, 999d
|
||||||
LI64 r1, 999d
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
10: LRA r4, r0, :"foo\0"
|
10: LRA r37, r0, :"foo\0"
|
||||||
CP r2, r3
|
CP r4, r37
|
||||||
LD r2, r2, 0a, 16h
|
LD r2, r33, 0a, 16h
|
||||||
JAL r31, r0, :use_foo
|
JAL r31, r0, :use_foo
|
||||||
ADDI64 r43, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :no_foo
|
JAL r31, r0, :no_foo
|
||||||
ST r1, r43, 0a, 16h
|
ST r1, r33, 0a, 16h
|
||||||
JAL r31, r0, :decide
|
JAL r31, r0, :decide
|
||||||
ANDI r1, r1, 255d
|
CP r37, r1
|
||||||
JNE r1, r0, :11
|
ANDI r37, r37, 255d
|
||||||
CP r2, r33
|
JNE r37, r0, :11
|
||||||
JMP :12
|
JMP :12
|
||||||
11: CP r2, r33
|
11: ST r34, r254, 0a, 8h
|
||||||
ST r2, r254, 0a, 8h
|
|
||||||
ST r35, r254, 8a, 8h
|
ST r35, r254, 8a, 8h
|
||||||
12: LD r44, r254, 0a, 8h
|
12: LD r35, r254, 0a, 8h
|
||||||
JNE r44, r0, :13
|
JNE r35, r0, :13
|
||||||
LI64 r1, 34d
|
LI64 r32, 34d
|
||||||
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
13: ADDI64 r1, r254, 16d
|
13: ADDI64 r35, r254, 16d
|
||||||
|
CP r2, r34
|
||||||
|
CP r1, r35
|
||||||
JAL r31, r0, :new_bar
|
JAL r31, r0, :new_bar
|
||||||
JAL r31, r0, :decide
|
JAL r31, r0, :decide
|
||||||
ANDI r1, r1, 255d
|
CP r34, r1
|
||||||
JNE r1, r0, :14
|
ANDI r34, r34, 255d
|
||||||
|
JNE r34, r0, :14
|
||||||
JMP :15
|
JMP :15
|
||||||
14: ST r0, r254, 16a, 1h
|
14: ST r0, r254, 16a, 1h
|
||||||
15: LD r45, r254, 16a, 1h
|
15: LD r34, r254, 16a, 1h
|
||||||
ANDI r45, r45, 255d
|
ANDI r34, r34, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JEQ r45, r0, :16
|
JEQ r34, r0, :16
|
||||||
LI64 r1, 420d
|
LI64 r32, 420d
|
||||||
|
CP r1, r32
|
||||||
JMP :3
|
JMP :3
|
||||||
16: LD r46, r254, 0a, 8h
|
16: LD r33, r254, 0a, 8h
|
||||||
LD r47, r46, 0a, 8h
|
LD r33, r33, 0a, 8h
|
||||||
ANDI r48, r40, 65535d
|
ANDI r32, r32, 65535d
|
||||||
SUB64 r1, r48, r47
|
SUB64 r32, r32, r33
|
||||||
3: LD r31, r254, 80a, 144h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 224d
|
3: LD r31, r254, 80a, 64h
|
||||||
|
ADDI64 r254, r254, 144d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
new_bar:
|
new_bar:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -48d
|
||||||
LI8 r10, 1b
|
ST r32, r254, 24a, 24h
|
||||||
ADDI64 r9, r254, 0d
|
CP r14, r2
|
||||||
ST r10, r254, 0a, 1h
|
CP r16, r1
|
||||||
ST r2, r254, 8a, 8h
|
LI8 r15, 1b
|
||||||
LI64 r11, 1d
|
ADDI64 r13, r254, 0d
|
||||||
ST r11, r254, 16a, 8h
|
ST r15, r254, 0a, 1h
|
||||||
BMC r9, r1, 24h
|
ST r14, r254, 8a, 8h
|
||||||
ADDI64 r254, r254, 24d
|
LI64 r14, 1d
|
||||||
|
ST r14, r254, 16a, 8h
|
||||||
|
BMC r13, r16, 24h
|
||||||
|
LD r32, r254, 24a, 24h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
new_foo:
|
new_foo:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -40d
|
||||||
ADDI64 r5, r254, 0d
|
ST r32, r254, 24a, 16h
|
||||||
ADDI64 r4, r254, 8d
|
ADDI64 r13, r254, 0d
|
||||||
ST r5, r254, 8a, 8h
|
ADDI64 r14, r254, 8d
|
||||||
|
ST r13, r254, 8a, 8h
|
||||||
ST r0, r254, 16a, 8h
|
ST r0, r254, 16a, 8h
|
||||||
LD r1, r4, 0a, 16h
|
LD r1, r14, 0a, 16h
|
||||||
ADDI64 r254, r254, 24d
|
LD r32, r254, 24a, 16h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
no_foo:
|
no_foo:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -24d
|
||||||
ADDI64 r3, r254, 0d
|
ST r32, r254, 16a, 8h
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
ST r0, r254, 0a, 8h
|
ST r0, r254, 0a, 8h
|
||||||
LD r1, r3, 0a, 16h
|
LD r1, r13, 0a, 16h
|
||||||
ADDI64 r254, r254, 16d
|
LD r32, r254, 16a, 8h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
use_foo:
|
use_foo:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -16d
|
||||||
ST r2, r254, 0a, 16h
|
ST r2, r254, 0a, 16h
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r2, r254, 0d
|
||||||
|
CP r0, r2
|
||||||
|
CP r0, r4
|
||||||
ADDI64 r254, r254, 16d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 1097
|
code size: 1274
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,29 +1,40 @@
|
||||||
inb:
|
inb:
|
||||||
CP r1, r2
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
LI64 r32, 100d
|
LI64 r32, 100d
|
||||||
4: CP r2, r32
|
4: CP r2, r32
|
||||||
JAL r31, r0, :inb
|
JAL r31, r0, :inb
|
||||||
ANDI r33, r1, 2d
|
CP r33, r1
|
||||||
|
ANDI r33, r33, 2d
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
LI64 r2, 96d
|
LI64 r33, 96d
|
||||||
|
CP r2, r33
|
||||||
CP r3, r0
|
CP r3, r0
|
||||||
JAL r31, r0, :outb
|
JAL r31, r0, :outb
|
||||||
3: CP r2, r32
|
3: CP r2, r32
|
||||||
JAL r31, r0, :inb
|
JAL r31, r0, :inb
|
||||||
JEQ r1, r0, :1
|
CP r33, r1
|
||||||
LI64 r1, 1d
|
JEQ r33, r0, :1
|
||||||
|
LI64 r32, 1d
|
||||||
|
CP r1, r32
|
||||||
JMP :2
|
JMP :2
|
||||||
1: JMP :3
|
1: JMP :3
|
||||||
0: JMP :4
|
0: JMP :4
|
||||||
2: LD r31, r254, 0a, 24h
|
2: LD r31, r254, 0a, 32h
|
||||||
ADDI64 r254, r254, 24d
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
outb:
|
outb:
|
||||||
|
CP r0, r2
|
||||||
|
CP r0, r3
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 188
|
code size: 257
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,21 +1,26 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
ADDI64 r7, r254, 0d
|
ST r32, r254, 16a, 16h
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
CP r3, r0
|
CP r3, r0
|
||||||
CP r4, r0
|
CP r4, r0
|
||||||
CP r5, r0
|
CP r5, r0
|
||||||
CP r6, r0
|
CP r6, r0
|
||||||
|
CP r1, r13
|
||||||
ECA
|
ECA
|
||||||
ST r1, r7, 0a, 16h
|
ST r1, r13, 0a, 16h
|
||||||
LD r7, r254, 0a, 1h
|
LD r14, r254, 0a, 1h
|
||||||
ANDI r7, r7, 255d
|
ANDI r14, r14, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JNE r7, r0, :0
|
JNE r14, r0, :0
|
||||||
UN
|
UN
|
||||||
0: LD r1, r254, 8a, 8h
|
UN
|
||||||
ADDI64 r254, r254, 16d
|
0: LD r13, r254, 8a, 8h
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 16a, 16h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
unknown ecall: 0
|
unknown ecall: 0
|
||||||
code size: 132
|
code size: 165
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Err(Unreachable)
|
status: Ok(())
|
||||||
|
|
|
@ -1,32 +1,36 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -88d
|
ADDI64 r254, r254, -72d
|
||||||
ST r31, r254, 24a, 64h
|
ST r31, r254, 24a, 48h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
LI64 r33, 1d
|
LI64 r33, 1d
|
||||||
ST r33, r254, 16a, 8h
|
ST r33, r254, 16a, 8h
|
||||||
LI64 r34, 4d
|
LI64 r34, 4d
|
||||||
ST r34, r254, 0a, 8h
|
ST r34, r254, 0a, 8h
|
||||||
ST r33, r254, 8a, 8h
|
ST r33, r254, 8a, 8h
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :opaque
|
JAL r31, r0, :opaque
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r35, r254, 8a, 8h
|
LD r34, r254, 8a, 8h
|
||||||
LD r36, r254, 16a, 8h
|
LD r35, r254, 16a, 8h
|
||||||
ADD64 r37, r36, r35
|
ADD64 r34, r35, r34
|
||||||
LD r38, r254, 0a, 8h
|
LD r32, r254, 0a, 8h
|
||||||
SUB64 r1, r38, r37
|
SUB64 r32, r32, r34
|
||||||
LD r31, r254, 24a, 64h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 88d
|
LD r31, r254, 24a, 48h
|
||||||
|
ADDI64 r254, r254, 72d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
opaque:
|
opaque:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
LI64 r5, 3d
|
ST r32, r254, 16a, 16h
|
||||||
ADDI64 r4, r254, 0d
|
LI64 r13, 3d
|
||||||
ST r5, r254, 0a, 8h
|
ADDI64 r14, r254, 0d
|
||||||
LI64 r8, 2d
|
ST r13, r254, 0a, 8h
|
||||||
ST r8, r254, 8a, 8h
|
LI64 r13, 2d
|
||||||
LD r1, r4, 0a, 16h
|
ST r13, r254, 8a, 8h
|
||||||
ADDI64 r254, r254, 16d
|
LD r1, r14, 0a, 16h
|
||||||
|
LD r32, r254, 16a, 16h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 307
|
code size: 339
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,20 +1,27 @@
|
||||||
clobber:
|
clobber:
|
||||||
LI64 r5, 4d
|
ADDI64 r254, r254, -16d
|
||||||
ST r5, r2, 0a, 8h
|
ST r32, r254, 0a, 16h
|
||||||
|
CP r13, r2
|
||||||
|
LI64 r14, 4d
|
||||||
|
ST r14, r13, 0a, 8h
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -40d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 8a, 32h
|
ST r31, r254, 8a, 32h
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
LI64 r32, 2d
|
LI64 r33, 2d
|
||||||
ST r32, r254, 0a, 8h
|
ST r33, r254, 0a, 8h
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :clobber
|
JAL r31, r0, :clobber
|
||||||
LD r33, r254, 0a, 8h
|
LD r32, r254, 0a, 8h
|
||||||
LI64 r34, 4d
|
LI64 r33, 4d
|
||||||
SUB64 r1, r34, r33
|
SUB64 r32, r33, r32
|
||||||
|
CP r1, r32
|
||||||
LD r31, r254, 8a, 32h
|
LD r31, r254, 8a, 32h
|
||||||
ADDI64 r254, r254, 40d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 169
|
code size: 226
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,23 +1,31 @@
|
||||||
drop:
|
drop:
|
||||||
|
CP r0, r2
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 8a, 24h
|
ST r31, r254, 8a, 40h
|
||||||
ADDI64 r2, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
LI64 r32, 1d
|
LI64 r33, 1d
|
||||||
ST r32, r254, 0a, 8h
|
ST r33, r254, 0a, 8h
|
||||||
JAL r31, r0, :modify
|
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
|
JAL r31, r0, :modify
|
||||||
|
CP r2, r33
|
||||||
JAL r31, r0, :drop
|
JAL r31, r0, :drop
|
||||||
LD r33, r254, 0a, 8h
|
LD r32, r254, 0a, 8h
|
||||||
ADDI64 r1, r33, -2d
|
ADDI64 r32, r32, -2d
|
||||||
LD r31, r254, 8a, 24h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 32d
|
LD r31, r254, 8a, 40h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
modify:
|
modify:
|
||||||
LI64 r5, 2d
|
ADDI64 r254, r254, -16d
|
||||||
ST r5, r2, 0a, 8h
|
ST r32, r254, 0a, 16h
|
||||||
|
CP r13, r2
|
||||||
|
LI64 r14, 2d
|
||||||
|
ST r14, r13, 0a, 8h
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 187
|
code size: 247
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,46 +1,64 @@
|
||||||
create_back_buffer:
|
create_back_buffer:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 0a, 48h
|
ST r31, r254, 0a, 48h
|
||||||
LI64 r32, 255d
|
CP r32, r2
|
||||||
JGTS r2, r32, :0
|
LI64 r33, 255d
|
||||||
|
JGTS r32, r33, :0
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :request_page
|
JAL r31, r0, :request_page
|
||||||
|
CP r32, r1
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r33, r2
|
0: LI8 r34, 255b
|
||||||
LI8 r34, 255b
|
|
||||||
CP r2, r34
|
CP r2, r34
|
||||||
JAL r31, r0, :request_page
|
JAL r31, r0, :request_page
|
||||||
CP r35, r33
|
CP r35, r1
|
||||||
5: SUB64 r35, r35, r32
|
SUB64 r32, r32, r33
|
||||||
JGTS r35, r0, :2
|
5: JGTS r32, r0, :2
|
||||||
|
CP r1, r35
|
||||||
JMP :1
|
JMP :1
|
||||||
2: CP r36, r1
|
2: JLTS r32, r33, :3
|
||||||
JLTS r35, r32, :3
|
|
||||||
CP r2, r34
|
CP r2, r34
|
||||||
JAL r31, r0, :request_page
|
JAL r31, r0, :request_page
|
||||||
|
CP r0, r1
|
||||||
JMP :4
|
JMP :4
|
||||||
3: CP r2, r35
|
3: CP r2, r32
|
||||||
JAL r31, r0, :request_page
|
JAL r31, r0, :request_page
|
||||||
4: CP r1, r36
|
CP r0, r1
|
||||||
|
4: SUB64 r32, r32, r33
|
||||||
JMP :5
|
JMP :5
|
||||||
1: LD r31, r254, 0a, 48h
|
1: LD r31, r254, 0a, 48h
|
||||||
ADDI64 r254, r254, 48d
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
LI64 r2, 400d
|
LI64 r32, 400d
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :create_back_buffer
|
JAL r31, r0, :create_back_buffer
|
||||||
LD r31, r254, 0a, 8h
|
CP r0, r1
|
||||||
ADDI64 r254, r254, 8d
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
request_page:
|
request_page:
|
||||||
LRA r4, r0, :"\0\u{1}xxxxxxxx\0"
|
ADDI64 r254, r254, -40d
|
||||||
ST r2, r4, 1a, 1h
|
ST r32, r254, 0a, 40h
|
||||||
LI64 r5, 12d
|
CP r13, r2
|
||||||
LI64 r3, 2d
|
LRA r14, r0, :"\0\u{1}xxxxxxxx\0"
|
||||||
LI64 r2, 3d
|
ST r13, r14, 1a, 1h
|
||||||
|
LI64 r15, 12d
|
||||||
|
LI64 r16, 2d
|
||||||
|
LI64 r17, 3d
|
||||||
|
CP r2, r17
|
||||||
|
CP r3, r16
|
||||||
|
CP r4, r14
|
||||||
|
CP r5, r15
|
||||||
ECA
|
ECA
|
||||||
|
CP r13, r1
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 40h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 317
|
code size: 408
|
||||||
ret: 42
|
ret: 42
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,27 +1,33 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -100d
|
ADDI64 r254, r254, -60d
|
||||||
ST r31, r254, 4a, 96h
|
ST r31, r254, 4a, 56h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :random_color
|
JAL r31, r0, :random_color
|
||||||
ST r1, r32, 0a, 4h
|
ST r1, r32, 0a, 4h
|
||||||
LD r33, r254, 0a, 1h
|
LD r34, r254, 0a, 1h
|
||||||
LD r34, r254, 1a, 1h
|
LD r35, r254, 1a, 1h
|
||||||
LD r35, r254, 2a, 1h
|
LD r36, r254, 2a, 1h
|
||||||
ANDI r36, r33, 255d
|
ANDI r34, r34, 255d
|
||||||
ANDI r37, r34, 255d
|
ANDI r35, r35, 255d
|
||||||
LD r38, r254, 3a, 1h
|
LD r32, r254, 3a, 1h
|
||||||
ANDI r39, r35, 255d
|
ANDI r33, r36, 255d
|
||||||
ADD64 r40, r37, r36
|
ADD64 r34, r35, r34
|
||||||
ANDI r41, r38, 255d
|
ANDI r32, r32, 255d
|
||||||
ADD64 r42, r40, r39
|
ADD64 r33, r34, r33
|
||||||
ADD64 r1, r42, r41
|
ADD64 r32, r33, r32
|
||||||
LD r31, r254, 4a, 96h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 100d
|
LD r31, r254, 4a, 56h
|
||||||
|
ADDI64 r254, r254, 60d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
random_color:
|
random_color:
|
||||||
LRA r3, r0, :white
|
ADDI64 r254, r254, -8d
|
||||||
LD r1, r3, 0a, 4h
|
ST r32, r254, 0a, 8h
|
||||||
|
LRA r13, r0, :white
|
||||||
|
LD r1, r13, 0a, 4h
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 241
|
code size: 295
|
||||||
ret: 1020
|
ret: 1020
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,30 +1,35 @@
|
||||||
get_format:
|
get_format:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -40d
|
||||||
LI8 r7, 1b
|
ST r32, r254, 16a, 24h
|
||||||
ADDI64 r6, r254, 0d
|
LI8 r13, 1b
|
||||||
LRA r5, r0, :BMP
|
ADDI64 r14, r254, 0d
|
||||||
ST r7, r254, 0a, 1h
|
LRA r15, r0, :BMP
|
||||||
LD r8, r5, 0a, 8h
|
ST r13, r254, 0a, 1h
|
||||||
ST r8, r254, 8a, 8h
|
LD r13, r15, 0a, 8h
|
||||||
LD r1, r6, 0a, 16h
|
ST r13, r254, 8a, 8h
|
||||||
ADDI64 r254, r254, 16d
|
LD r1, r14, 0a, 16h
|
||||||
|
LD r32, r254, 16a, 24h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -40d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 16a, 24h
|
ST r31, r254, 16a, 32h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :get_format
|
JAL r31, r0, :get_format
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r33, r254, 0a, 1h
|
LD r33, r254, 0a, 1h
|
||||||
ANDI r33, r33, 255d
|
ANDI r33, r33, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
LI64 r1, 1d
|
LI64 r32, 1d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: LD r1, r254, 8a, 8h
|
0: LD r32, r254, 8a, 8h
|
||||||
1: LD r31, r254, 16a, 24h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 40d
|
1: LD r31, r254, 16a, 32h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 280
|
code size: 315
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,31 +1,40 @@
|
||||||
constructor:
|
constructor:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -48d
|
||||||
ST r31, r254, 16a, 16h
|
ST r31, r254, 16a, 32h
|
||||||
CP r2, r3
|
CP r32, r3
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :opaque
|
JAL r31, r0, :opaque
|
||||||
ADDI64 r32, r254, 0d
|
CP r32, r1
|
||||||
ST r1, r254, 0a, 8h
|
ADDI64 r33, r254, 0d
|
||||||
ST r1, r254, 8a, 8h
|
ST r32, r254, 0a, 8h
|
||||||
LD r1, r32, 0a, 16h
|
ST r32, r254, 8a, 8h
|
||||||
LD r31, r254, 16a, 16h
|
LD r1, r33, 0a, 16h
|
||||||
ADDI64 r254, r254, 32d
|
LD r31, r254, 16a, 32h
|
||||||
|
ADDI64 r254, r254, 48d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 16a, 16h
|
ST r31, r254, 16a, 24h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
CP r3, r0
|
CP r3, r0
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :constructor
|
JAL r31, r0, :constructor
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r31, r254, 16a, 16h
|
LD r31, r254, 16a, 24h
|
||||||
ADDI64 r254, r254, 32d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
opaque:
|
opaque:
|
||||||
LRA r5, r0, :file
|
ADDI64 r254, r254, -16d
|
||||||
ADD64 r7, r5, r2
|
ST r32, r254, 0a, 16h
|
||||||
LD r9, r7, 0a, 1h
|
CP r13, r2
|
||||||
ANDI r1, r9, 255d
|
LRA r14, r0, :file
|
||||||
|
ADD64 r13, r14, r13
|
||||||
|
LD r13, r13, 0a, 1h
|
||||||
|
ANDI r13, r13, 255d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 16h
|
||||||
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 267
|
code size: 330
|
||||||
ret: 255
|
ret: 255
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI64 r1, 1d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 1d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 29
|
code size: 80
|
||||||
ret: 1
|
ret: 1
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,12 +1,15 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -4d
|
ADDI64 r254, r254, -20d
|
||||||
LRA r4, r0, :white
|
ST r32, r254, 4a, 16h
|
||||||
ADDI64 r5, r254, 0d
|
LRA r13, r0, :white
|
||||||
BMC r4, r5, 4h
|
ADDI64 r14, r254, 0d
|
||||||
LD r8, r254, 3a, 1h
|
BMC r13, r14, 4h
|
||||||
ANDI r1, r8, 255d
|
LD r13, r254, 3a, 1h
|
||||||
ADDI64 r254, r254, 4d
|
ANDI r13, r13, 255d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 4a, 16h
|
||||||
|
ADDI64 r254, r254, 20d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 92
|
code size: 121
|
||||||
ret: 255
|
ret: 255
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -3,27 +3,38 @@ main:
|
||||||
ST r31, r254, 4a, 32h
|
ST r31, r254, 4a, 32h
|
||||||
LRA r32, r0, :white
|
LRA r32, r0, :white
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
LD r2, r32, 0a, 4h
|
LD r32, r32, 0a, 4h
|
||||||
|
CP r2, r32
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :u32_to_color
|
JAL r31, r0, :u32_to_color
|
||||||
ST r1, r33, 0a, 4h
|
ST r1, r33, 0a, 4h
|
||||||
LD r34, r254, 0a, 1h
|
LD r32, r254, 0a, 1h
|
||||||
ANDI r1, r34, 255d
|
ANDI r32, r32, 255d
|
||||||
|
CP r1, r32
|
||||||
LD r31, r254, 4a, 32h
|
LD r31, r254, 4a, 32h
|
||||||
ADDI64 r254, r254, 36d
|
ADDI64 r254, r254, 36d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
u32_to_color:
|
u32_to_color:
|
||||||
ADDI64 r254, r254, -20d
|
ADDI64 r254, r254, -36d
|
||||||
ST r31, r254, 4a, 16h
|
ST r31, r254, 4a, 32h
|
||||||
|
CP r32, r2
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :u32_to_u32
|
JAL r31, r0, :u32_to_u32
|
||||||
ADDI64 r32, r254, 0d
|
CP r32, r1
|
||||||
ST r1, r254, 0a, 4h
|
ADDI64 r33, r254, 0d
|
||||||
LD r1, r32, 0a, 4h
|
ST r32, r254, 0a, 4h
|
||||||
LD r31, r254, 4a, 16h
|
LD r1, r33, 0a, 4h
|
||||||
ADDI64 r254, r254, 20d
|
LD r31, r254, 4a, 32h
|
||||||
|
ADDI64 r254, r254, 36d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
u32_to_u32:
|
u32_to_u32:
|
||||||
CP r1, r2
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 263
|
code size: 332
|
||||||
ret: 255
|
ret: 255
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -16d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 16h
|
||||||
JAL r31, r0, :some_func
|
JAL r31, r0, :some_func
|
||||||
LD r31, r254, 0a, 8h
|
LD r31, r254, 0a, 16h
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
some_func:
|
some_func:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -1,29 +1,38 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -24d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 24h
|
||||||
LI64 r2, 100d
|
LI64 r32, 100d
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :sqrt
|
JAL r31, r0, :sqrt
|
||||||
LD r31, r254, 0a, 8h
|
CP r32, r1
|
||||||
ADDI64 r254, r254, 8d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 24h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
sqrt:
|
sqrt:
|
||||||
LI64 r9, 15d
|
ADDI64 r254, r254, -48d
|
||||||
LI64 r10, 32768d
|
ST r32, r254, 0a, 48h
|
||||||
CP r7, r0
|
CP r13, r2
|
||||||
CP r1, r7
|
LI64 r16, 15d
|
||||||
3: JNE r10, r7, :0
|
LI64 r15, 32768d
|
||||||
|
CP r17, r0
|
||||||
|
CP r14, r17
|
||||||
|
3: JNE r15, r17, :0
|
||||||
|
CP r1, r14
|
||||||
JMP :1
|
JMP :1
|
||||||
0: SLUI64 r6, r1, 1b
|
0: SLUI64 r18, r14, 1b
|
||||||
ADDI64 r9, r9, -1d
|
ADDI64 r16, r16, -1d
|
||||||
ADD64 r11, r6, r10
|
ADD64 r18, r18, r15
|
||||||
SLU64 r11, r11, r9
|
SLU64 r18, r18, r16
|
||||||
JLTU r2, r11, :2
|
JLTU r13, r18, :2
|
||||||
ADD64 r1, r10, r1
|
ADD64 r14, r15, r14
|
||||||
SUB64 r2, r2, r11
|
SUB64 r13, r13, r18
|
||||||
JMP :2
|
JMP :2
|
||||||
2: SRUI64 r10, r10, 1b
|
2: SRUI64 r15, r15, 1b
|
||||||
JMP :3
|
JMP :3
|
||||||
1: JALA r0, r31, 0a
|
1: LD r32, r254, 0a, 48h
|
||||||
code size: 181
|
ADDI64 r254, r254, 48d
|
||||||
|
JALA r0, r31, 0a
|
||||||
|
code size: 244
|
||||||
ret: 14
|
ret: 14
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,64 +1,82 @@
|
||||||
do_stuff:
|
do_stuff:
|
||||||
CP r1, r2
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
just_read:
|
just_read:
|
||||||
|
CP r0, r2
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -96d
|
ADDI64 r254, r254, -88d
|
||||||
ST r31, r254, 48a, 48h
|
ST r31, r254, 48a, 40h
|
||||||
ADDI64 r32, r254, 16d
|
ADDI64 r32, r254, 16d
|
||||||
CP r1, r32
|
CP r1, r32
|
||||||
JAL r31, r0, :optionala
|
JAL r31, r0, :optionala
|
||||||
CP r2, r32
|
|
||||||
LD r33, r254, 16a, 8h
|
LD r33, r254, 16a, 8h
|
||||||
JNE r33, r0, :0
|
JNE r33, r0, :0
|
||||||
LI64 r1, 10d
|
LI64 r32, 10d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ST r0, r254, 24a, 8h
|
0: ST r0, r254, 24a, 8h
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :just_read
|
JAL r31, r0, :just_read
|
||||||
LD r2, r254, 24a, 8h
|
LD r32, r254, 24a, 8h
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :do_stuff
|
JAL r31, r0, :do_stuff
|
||||||
CP r34, r1
|
CP r32, r1
|
||||||
ADDI64 r35, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :optional
|
JAL r31, r0, :optional
|
||||||
ST r1, r35, 0a, 16h
|
ST r1, r33, 0a, 16h
|
||||||
LD r36, r254, 0a, 1h
|
LD r33, r254, 0a, 1h
|
||||||
ANDI r36, r36, 255d
|
ANDI r33, r33, 255d
|
||||||
ANDI r0, r0, 255d
|
ANDI r0, r0, 255d
|
||||||
JNE r36, r0, :2
|
JNE r33, r0, :2
|
||||||
LI64 r1, 20d
|
LI64 r32, 20d
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
2: LI64 r2, 100d
|
2: LI64 r33, 100d
|
||||||
|
CP r2, r33
|
||||||
JAL r31, r0, :do_stuff
|
JAL r31, r0, :do_stuff
|
||||||
ADD64 r1, r1, r34
|
CP r33, r1
|
||||||
1: LD r31, r254, 48a, 48h
|
ADD64 r32, r33, r32
|
||||||
ADDI64 r254, r254, 96d
|
CP r1, r32
|
||||||
|
1: LD r31, r254, 48a, 40h
|
||||||
|
ADDI64 r254, r254, 88d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
optional:
|
optional:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
LI8 r6, 1b
|
ST r32, r254, 16a, 16h
|
||||||
ADDI64 r5, r254, 0d
|
LI8 r13, 1b
|
||||||
ST r6, r254, 0a, 1h
|
ADDI64 r14, r254, 0d
|
||||||
LI64 r6, 10d
|
ST r13, r254, 0a, 1h
|
||||||
ST r6, r254, 8a, 8h
|
LI64 r13, 10d
|
||||||
LD r1, r5, 0a, 16h
|
ST r13, r254, 8a, 8h
|
||||||
ADDI64 r254, r254, 16d
|
LD r1, r14, 0a, 16h
|
||||||
|
LD r32, r254, 16a, 16h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
optionala:
|
optionala:
|
||||||
ADDI64 r254, r254, -48d
|
ADDI64 r254, r254, -80d
|
||||||
ADDI64 r7, r254, 8d
|
ST r32, r254, 48a, 32h
|
||||||
ADDI64 r6, r254, 16d
|
CP r17, r1
|
||||||
ST r7, r254, 16a, 8h
|
ADDI64 r14, r254, 8d
|
||||||
LI64 r10, 1d
|
ADDI64 r15, r254, 16d
|
||||||
ST r10, r254, 24a, 8h
|
ST r14, r254, 16a, 8h
|
||||||
ADDI64 r2, r254, 0d
|
LI64 r16, 1d
|
||||||
ST r2, r254, 32a, 8h
|
ST r16, r254, 24a, 8h
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
|
ST r13, r254, 32a, 8h
|
||||||
ST r0, r254, 0a, 8h
|
ST r0, r254, 0a, 8h
|
||||||
ST r0, r254, 8a, 8h
|
ST r0, r254, 8a, 8h
|
||||||
ST r0, r254, 40a, 8h
|
ST r0, r254, 40a, 8h
|
||||||
BMC r6, r1, 32h
|
BMC r15, r17, 32h
|
||||||
ADDI64 r254, r254, 48d
|
LD r32, r254, 48a, 32h
|
||||||
|
ADDI64 r254, r254, 80d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 554
|
code size: 684
|
||||||
ret: 100
|
ret: 100
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,44 +1,48 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -40d
|
ADDI64 r254, r254, -128d
|
||||||
LI64 r9, 1d
|
ST r32, r254, 40a, 88h
|
||||||
LI64 r8, 4d
|
LI64 r17, 1d
|
||||||
CP r6, r0
|
LI64 r16, 4d
|
||||||
ADDI64 r7, r254, 0d
|
CP r14, r0
|
||||||
CP r10, r6
|
ADDI64 r18, r254, 0d
|
||||||
6: JNE r10, r8, :0
|
CP r13, r14
|
||||||
LI64 r8, 2d
|
6: JNE r13, r16, :0
|
||||||
ADDI64 r5, r254, 32d
|
LI64 r19, 2d
|
||||||
CP r10, r6
|
ADDI64 r20, r254, 32d
|
||||||
4: LD r1, r254, 16a, 8h
|
CP r13, r14
|
||||||
JNE r10, r9, :1
|
4: LD r15, r254, 16a, 8h
|
||||||
|
JNE r13, r17, :1
|
||||||
|
CP r1, r15
|
||||||
JMP :2
|
JMP :2
|
||||||
1: MUL64 r2, r10, r8
|
1: MUL64 r21, r13, r19
|
||||||
ADD64 r10, r10, r9
|
ADD64 r16, r13, r17
|
||||||
SUB64 r11, r8, r10
|
SUB64 r13, r19, r16
|
||||||
MUL64 r11, r11, r8
|
MUL64 r22, r13, r19
|
||||||
CP r1, r6
|
CP r13, r14
|
||||||
5: JNE r1, r8, :3
|
5: JNE r13, r19, :3
|
||||||
|
CP r13, r16
|
||||||
JMP :4
|
JMP :4
|
||||||
3: ADD64 r12, r1, r9
|
3: ADD64 r15, r13, r17
|
||||||
ADD64 r3, r2, r1
|
ADD64 r23, r21, r13
|
||||||
ADD64 r4, r11, r1
|
ADD64 r13, r22, r13
|
||||||
MULI64 r3, r3, 8d
|
MULI64 r23, r23, 8d
|
||||||
MULI64 r1, r4, 8d
|
MULI64 r13, r13, 8d
|
||||||
ADD64 r3, r7, r3
|
ADD64 r23, r18, r23
|
||||||
ADD64 r1, r7, r1
|
ADD64 r13, r18, r13
|
||||||
BMC r3, r5, 8h
|
BMC r23, r20, 8h
|
||||||
BMC r1, r3, 8h
|
BMC r13, r23, 8h
|
||||||
BMC r5, r1, 8h
|
BMC r20, r13, 8h
|
||||||
CP r1, r12
|
CP r13, r15
|
||||||
JMP :5
|
JMP :5
|
||||||
0: ADD64 r4, r10, r9
|
0: ADD64 r15, r13, r17
|
||||||
MULI64 r2, r10, 8d
|
MULI64 r19, r13, 8d
|
||||||
ADD64 r5, r7, r2
|
ADD64 r19, r18, r19
|
||||||
ST r10, r5, 0a, 8h
|
ST r13, r19, 0a, 8h
|
||||||
CP r10, r4
|
CP r13, r15
|
||||||
JMP :6
|
JMP :6
|
||||||
2: ADDI64 r254, r254, 40d
|
2: LD r32, r254, 40a, 88h
|
||||||
|
ADDI64 r254, r254, 128d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 264
|
code size: 296
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,12 +1,15 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -4d
|
ADDI64 r254, r254, -20d
|
||||||
LRA r3, r0, :MAGENTA
|
ST r32, r254, 4a, 16h
|
||||||
ADDI64 r5, r254, 0d
|
LRA r13, r0, :MAGENTA
|
||||||
BMC r3, r5, 4h
|
ADDI64 r14, r254, 0d
|
||||||
LD r8, r254, 2a, 1h
|
BMC r13, r14, 4h
|
||||||
ANDI r1, r8, 255d
|
LD r13, r254, 2a, 1h
|
||||||
ADDI64 r254, r254, 4d
|
ANDI r13, r13, 255d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 4a, 16h
|
||||||
|
ADDI64 r254, r254, 20d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 92
|
code size: 121
|
||||||
ret: 205
|
ret: 205
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,6 +1,11 @@
|
||||||
main:
|
main:
|
||||||
LI64 r1, 10d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 10d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 29
|
code size: 80
|
||||||
ret: 10
|
ret: 10
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,48 +1,57 @@
|
||||||
fib:
|
fib:
|
||||||
ADDI64 r254, r254, -32d
|
ADDI64 r254, r254, -40d
|
||||||
ST r31, r254, 0a, 32h
|
ST r31, r254, 0a, 40h
|
||||||
CP r32, r2
|
CP r32, r2
|
||||||
LI64 r33, 2d
|
LI64 r33, 2d
|
||||||
JLTU r2, r33, :0
|
JLTU r32, r33, :0
|
||||||
CP r34, r32
|
ADDI64 r34, r32, -1d
|
||||||
ADDI64 r2, r34, -1d
|
CP r2, r34
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
CP r2, r32
|
|
||||||
CP r34, r1
|
CP r34, r1
|
||||||
SUB64 r2, r2, r33
|
SUB64 r32, r32, r33
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
ADD64 r1, r1, r34
|
CP r32, r1
|
||||||
|
ADD64 r32, r32, r34
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r1, r32
|
0: CP r1, r32
|
||||||
1: LD r31, r254, 0a, 32h
|
1: LD r31, r254, 0a, 40h
|
||||||
ADDI64 r254, r254, 32d
|
ADDI64 r254, r254, 40d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
fib_iter:
|
fib_iter:
|
||||||
LI64 r6, 1d
|
ADDI64 r254, r254, -40d
|
||||||
CP r7, r0
|
ST r32, r254, 0a, 40h
|
||||||
CP r1, r7
|
CP r13, r2
|
||||||
CP r12, r6
|
LI64 r17, 1d
|
||||||
2: JNE r2, r7, :0
|
CP r15, r0
|
||||||
|
CP r16, r17
|
||||||
|
CP r14, r15
|
||||||
|
2: JNE r13, r15, :0
|
||||||
|
CP r1, r14
|
||||||
JMP :1
|
JMP :1
|
||||||
0: ADD64 r3, r12, r1
|
0: ADD64 r14, r16, r14
|
||||||
SUB64 r2, r2, r6
|
SUB64 r13, r13, r17
|
||||||
CP r1, r12
|
SWA r14, r16
|
||||||
CP r12, r3
|
|
||||||
JMP :2
|
JMP :2
|
||||||
1: JALA r0, r31, 0a
|
1: LD r32, r254, 0a, 40h
|
||||||
|
ADDI64 r254, r254, 40d
|
||||||
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -24d
|
ADDI64 r254, r254, -32d
|
||||||
ST r31, r254, 0a, 24h
|
ST r31, r254, 0a, 32h
|
||||||
LI64 r32, 10d
|
LI64 r32, 10d
|
||||||
CP r2, r32
|
CP r2, r32
|
||||||
JAL r31, r0, :fib
|
JAL r31, r0, :fib
|
||||||
CP r2, r32
|
|
||||||
CP r33, r1
|
CP r33, r1
|
||||||
|
CP r2, r32
|
||||||
JAL r31, r0, :fib_iter
|
JAL r31, r0, :fib_iter
|
||||||
SUB64 r1, r33, r1
|
CP r32, r1
|
||||||
LD r31, r254, 0a, 24h
|
SUB64 r32, r33, r32
|
||||||
ADDI64 r254, r254, 24d
|
CP r1, r32
|
||||||
|
LD r31, r254, 0a, 32h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 290
|
code size: 353
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,38 +1,44 @@
|
||||||
foo:
|
foo:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -32d
|
||||||
LI64 r5, 3d
|
ST r32, r254, 16a, 16h
|
||||||
ADDI64 r4, r254, 0d
|
LI64 r13, 3d
|
||||||
ST r5, r254, 0a, 8h
|
ADDI64 r14, r254, 0d
|
||||||
LI32 r8, 2w
|
ST r13, r254, 0a, 8h
|
||||||
ST r8, r254, 8a, 4h
|
LI32 r13, 2w
|
||||||
ST r8, r254, 12a, 4h
|
ST r13, r254, 8a, 4h
|
||||||
LD r1, r4, 0a, 16h
|
ST r13, r254, 12a, 4h
|
||||||
ADDI64 r254, r254, 16d
|
LD r1, r14, 0a, 16h
|
||||||
|
LD r32, r254, 16a, 16h
|
||||||
|
ADDI64 r254, r254, 32d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -128d
|
ADDI64 r254, r254, -96d
|
||||||
ST r31, r254, 48a, 80h
|
ST r31, r254, 48a, 48h
|
||||||
ADDI64 r32, r254, 32d
|
ADDI64 r32, r254, 32d
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
ADDI64 r33, r254, 16d
|
ADDI64 r33, r254, 16d
|
||||||
|
CP r1, r33
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
ST r1, r33, 0a, 16h
|
ST r1, r33, 0a, 16h
|
||||||
ADDI64 r34, r254, 0d
|
ADDI64 r34, r254, 0d
|
||||||
|
CP r1, r34
|
||||||
JAL r31, r0, :foo
|
JAL r31, r0, :foo
|
||||||
ST r1, r34, 0a, 16h
|
ST r1, r34, 0a, 16h
|
||||||
LD r35, r254, 24a, 4h
|
LD r33, r254, 24a, 4h
|
||||||
LD r36, r254, 12a, 4h
|
LD r34, r254, 12a, 4h
|
||||||
ANDI r37, r35, 4294967295d
|
ANDI r33, r33, 4294967295d
|
||||||
LD r35, r254, 32a, 8h
|
LD r32, r254, 32a, 8h
|
||||||
ANDI r38, r36, 4294967295d
|
ANDI r34, r34, 4294967295d
|
||||||
ADD64 r39, r35, r37
|
ADD64 r32, r32, r33
|
||||||
ADD64 r40, r39, r38
|
ADD64 r32, r32, r34
|
||||||
LI64 r34, 7d
|
LI64 r33, 7d
|
||||||
SUB64 r1, r34, r40
|
SUB64 r32, r33, r32
|
||||||
LD r31, r254, 48a, 80h
|
CP r1, r32
|
||||||
ADDI64 r254, r254, 128d
|
LD r31, r254, 48a, 48h
|
||||||
|
ADDI64 r254, r254, 96d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 355
|
code size: 393
|
||||||
ret: 0
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -2,34 +2,45 @@ main:
|
||||||
ADDI64 r254, r254, -72d
|
ADDI64 r254, r254, -72d
|
||||||
ST r31, r254, 32a, 40h
|
ST r31, r254, 32a, 40h
|
||||||
LI64 r32, 4d
|
LI64 r32, 4d
|
||||||
ADDI64 r4, r254, 16d
|
ADDI64 r33, r254, 16d
|
||||||
ST r32, r254, 16a, 8h
|
ST r32, r254, 16a, 8h
|
||||||
LI64 r33, 3d
|
LI64 r32, 3d
|
||||||
ST r33, r254, 24a, 8h
|
ST r32, r254, 24a, 8h
|
||||||
ADDI64 r34, r254, 0d
|
ADDI64 r34, r254, 0d
|
||||||
CP r3, r4
|
CP r1, r34
|
||||||
LD r3, r3, 0a, 16h
|
LD r3, r33, 0a, 16h
|
||||||
JAL r31, r0, :odher_pass
|
JAL r31, r0, :odher_pass
|
||||||
ST r1, r34, 0a, 16h
|
ST r1, r34, 0a, 16h
|
||||||
LD r35, r254, 8a, 8h
|
LD r33, r254, 8a, 8h
|
||||||
JNE r35, r33, :0
|
JNE r33, r32, :0
|
||||||
CP r2, r34
|
CP r2, r34
|
||||||
JAL r31, r0, :pass
|
JAL r31, r0, :pass
|
||||||
|
CP r32, r1
|
||||||
|
CP r1, r32
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r1, r0
|
0: CP r1, r0
|
||||||
1: LD r31, r254, 32a, 40h
|
1: LD r31, r254, 32a, 40h
|
||||||
ADDI64 r254, r254, 72d
|
ADDI64 r254, r254, 72d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
odher_pass:
|
odher_pass:
|
||||||
ADDI64 r254, r254, -16d
|
ADDI64 r254, r254, -24d
|
||||||
|
ST r32, r254, 16a, 8h
|
||||||
ST r3, r254, 0a, 16h
|
ST r3, r254, 0a, 16h
|
||||||
ADDI64 r3, r254, 0d
|
ADDI64 r3, r254, 0d
|
||||||
LD r1, r3, 0a, 16h
|
CP r13, r3
|
||||||
ADDI64 r254, r254, 16d
|
LD r1, r13, 0a, 16h
|
||||||
|
LD r32, r254, 16a, 8h
|
||||||
|
ADDI64 r254, r254, 24d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
pass:
|
pass:
|
||||||
LD r1, r2, 0a, 8h
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
CP r13, r2
|
||||||
|
LD r13, r13, 0a, 8h
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 301
|
code size: 390
|
||||||
ret: 4
|
ret: 4
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,30 +1,33 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -10240d
|
ADDI64 r254, r254, -10288d
|
||||||
LI64 r9, 1d
|
ST r32, r254, 10240a, 48h
|
||||||
LI8 r10, 64b
|
LI64 r14, 1d
|
||||||
LI64 r8, 1024d
|
LI8 r16, 64b
|
||||||
CP r11, r0
|
LI64 r17, 1024d
|
||||||
ADDI64 r7, r254, 0d
|
CP r13, r0
|
||||||
4: JLTU r11, r8, :0
|
ADDI64 r18, r254, 0d
|
||||||
LI64 r8, 10d
|
4: JLTU r13, r17, :0
|
||||||
CP r10, r9
|
LI64 r16, 10d
|
||||||
3: LD r1, r254, 2048a, 1h
|
CP r13, r14
|
||||||
JLTU r10, r8, :1
|
3: LD r17, r254, 2048a, 1h
|
||||||
ANDI r1, r1, 255d
|
JLTU r13, r16, :1
|
||||||
|
ANDI r13, r17, 255d
|
||||||
|
CP r1, r13
|
||||||
JMP :2
|
JMP :2
|
||||||
1: ADD64 r4, r10, r9
|
1: ADD64 r15, r13, r14
|
||||||
MULI64 r3, r10, 1024d
|
MULI64 r13, r13, 1024d
|
||||||
ADD64 r5, r7, r3
|
ADD64 r13, r18, r13
|
||||||
BMC r7, r5, 1024h
|
BMC r18, r13, 1024h
|
||||||
CP r10, r4
|
CP r13, r15
|
||||||
JMP :3
|
JMP :3
|
||||||
0: ADD64 r4, r11, r9
|
0: ADD64 r15, r13, r14
|
||||||
ADD64 r2, r7, r11
|
ADD64 r13, r18, r13
|
||||||
ST r10, r2, 0a, 1h
|
ST r16, r13, 0a, 1h
|
||||||
CP r11, r4
|
CP r13, r15
|
||||||
JMP :4
|
JMP :4
|
||||||
2: ADDI64 r254, r254, 10240d
|
2: LD r32, r254, 10240a, 48h
|
||||||
|
ADDI64 r254, r254, 10288d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 191
|
code size: 220
|
||||||
ret: 64
|
ret: 64
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,35 +1,42 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -72d
|
ADDI64 r254, r254, -72d
|
||||||
ST r31, r254, 0a, 72h
|
ST r31, r254, 0a, 72h
|
||||||
CP r32, r0
|
CP r34, r0
|
||||||
LI64 r33, 65536d
|
LI64 r37, 65536d
|
||||||
LI8 r34, 1b
|
LI8 r35, 1b
|
||||||
CP r35, r0
|
CP r36, r0
|
||||||
CP r36, r35
|
CP r32, r36
|
||||||
7: JAL r31, r0, :opaque
|
7: JAL r31, r0, :opaque
|
||||||
JLTU r36, r1, :0
|
CP r33, r1
|
||||||
|
JLTU r32, r33, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: CP r37, r35
|
0: CP r33, r36
|
||||||
8: JAL r31, r0, :opaque
|
8: JAL r31, r0, :opaque
|
||||||
JLTU r37, r1, :2
|
CP r38, r1
|
||||||
CP r38, r34
|
JLTU r33, r38, :2
|
||||||
|
CP r33, r35
|
||||||
JMP :3
|
JMP :3
|
||||||
2: JNE r37, r33, :4
|
2: JNE r33, r37, :4
|
||||||
CP r38, r32
|
CP r33, r34
|
||||||
3: ANDI r39, r38, 255d
|
3: ANDI r33, r33, 255d
|
||||||
JNE r39, r35, :5
|
JNE r33, r36, :5
|
||||||
JMP :6
|
JMP :6
|
||||||
5: ADDI64 r36, r36, 1d
|
5: ADDI64 r32, r32, 1d
|
||||||
6: JMP :7
|
6: JMP :7
|
||||||
4: ADDI64 r37, r37, 1d
|
4: ADDI64 r33, r33, 1d
|
||||||
JMP :8
|
JMP :8
|
||||||
1: LD r31, r254, 0a, 72h
|
1: LD r31, r254, 0a, 72h
|
||||||
ADDI64 r254, r254, 72d
|
ADDI64 r254, r254, 72d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
opaque:
|
opaque:
|
||||||
LI64 r1, 2147483648d
|
ADDI64 r254, r254, -8d
|
||||||
|
ST r32, r254, 0a, 8h
|
||||||
|
LI64 r13, 2147483648d
|
||||||
|
CP r1, r13
|
||||||
|
LD r32, r254, 0a, 8h
|
||||||
|
ADDI64 r254, r254, 8d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 211
|
code size: 268
|
||||||
ret: 2147483648
|
ret: 2147483648
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -2,21 +2,26 @@ main:
|
||||||
ADDI64 r254, r254, -56d
|
ADDI64 r254, r254, -56d
|
||||||
ST r31, r254, 16a, 40h
|
ST r31, r254, 16a, 40h
|
||||||
ADDI64 r32, r254, 0d
|
ADDI64 r32, r254, 0d
|
||||||
|
CP r3, r0
|
||||||
CP r4, r0
|
CP r4, r0
|
||||||
CP r3, r4
|
CP r1, r32
|
||||||
JAL r31, r0, :maina
|
JAL r31, r0, :maina
|
||||||
ST r1, r32, 0a, 16h
|
ST r1, r32, 0a, 16h
|
||||||
LD r33, r254, 12a, 1h
|
LD r34, r254, 12a, 1h
|
||||||
LD r34, r254, 3a, 1h
|
LD r32, r254, 3a, 1h
|
||||||
SUB8 r35, r34, r33
|
SUB8 r32, r32, r34
|
||||||
ANDI r1, r35, 255d
|
ANDI r32, r32, 255d
|
||||||
|
CP r1, r32
|
||||||
LD r31, r254, 16a, 40h
|
LD r31, r254, 16a, 40h
|
||||||
ADDI64 r254, r254, 56d
|
ADDI64 r254, r254, 56d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
maina:
|
maina:
|
||||||
ADDI64 r254, r254, -60d
|
ADDI64 r254, r254, -68d
|
||||||
ST r31, r254, 20a, 40h
|
ST r31, r254, 20a, 48h
|
||||||
|
CP r0, r3
|
||||||
|
CP r0, r4
|
||||||
ADDI64 r32, r254, 16d
|
ADDI64 r32, r254, 16d
|
||||||
|
CP r1, r32
|
||||||
JAL r31, r0, :small_struct
|
JAL r31, r0, :small_struct
|
||||||
ST r1, r32, 0a, 4h
|
ST r1, r32, 0a, 4h
|
||||||
ADDI64 r33, r254, 0d
|
ADDI64 r33, r254, 0d
|
||||||
|
@ -39,17 +44,19 @@ maina:
|
||||||
ST r0, r254, 14a, 1h
|
ST r0, r254, 14a, 1h
|
||||||
ST r0, r254, 15a, 1h
|
ST r0, r254, 15a, 1h
|
||||||
LD r1, r33, 0a, 16h
|
LD r1, r33, 0a, 16h
|
||||||
LD r31, r254, 20a, 40h
|
LD r31, r254, 20a, 48h
|
||||||
ADDI64 r254, r254, 60d
|
ADDI64 r254, r254, 68d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
small_struct:
|
small_struct:
|
||||||
ADDI64 r254, r254, -4d
|
ADDI64 r254, r254, -12d
|
||||||
ADDI64 r3, r254, 0d
|
ST r32, r254, 4a, 8h
|
||||||
|
ADDI64 r13, r254, 0d
|
||||||
ST r0, r254, 0a, 2h
|
ST r0, r254, 0a, 2h
|
||||||
ST r0, r254, 2a, 2h
|
ST r0, r254, 2a, 2h
|
||||||
LD r1, r3, 0a, 4h
|
LD r1, r13, 0a, 4h
|
||||||
ADDI64 r254, r254, 4d
|
LD r32, r254, 4a, 8h
|
||||||
|
ADDI64 r254, r254, 12d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
code size: 556
|
code size: 597
|
||||||
ret: 2
|
ret: 2
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
inl:
|
inl:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -8d
|
ADDI64 r254, r254, -16d
|
||||||
ST r31, r254, 0a, 8h
|
ST r31, r254, 0a, 16h
|
||||||
JAL r31, r0, :outl
|
JAL r31, r0, :outl
|
||||||
JAL r31, r0, :inl
|
JAL r31, r0, :inl
|
||||||
LD r31, r254, 0a, 8h
|
LD r31, r254, 0a, 16h
|
||||||
ADDI64 r254, r254, 8d
|
ADDI64 r254, r254, 16d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
outl:
|
outl:
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
|
|
|
@ -1,27 +1,29 @@
|
||||||
main:
|
main:
|
||||||
ADDI64 r254, r254, -1d
|
ADDI64 r254, r254, -41d
|
||||||
LI64 r6, 255d
|
ST r32, r254, 1a, 40h
|
||||||
LI8 r1, 1b
|
LI64 r14, 255d
|
||||||
|
LI8 r13, 1b
|
||||||
ST r0, r254, 0a, 1h
|
ST r0, r254, 0a, 1h
|
||||||
2: LD r8, r254, 0a, 1h
|
2: LD r15, r254, 0a, 1h
|
||||||
ANDI r10, r8, 255d
|
ANDI r16, r15, 255d
|
||||||
CMPU r2, r10, r6
|
CMPU r17, r16, r14
|
||||||
CMPUI r2, r2, 0d
|
CMPUI r17, r17, 0d
|
||||||
NOT r2, r2
|
NOT r17, r17
|
||||||
CMPU r3, r10, r0
|
CMPU r16, r16, r0
|
||||||
CMPUI r3, r3, 0d
|
CMPUI r16, r16, 0d
|
||||||
NOT r3, r3
|
NOT r16, r16
|
||||||
OR r5, r3, r2
|
OR r16, r16, r17
|
||||||
ANDI r5, r5, 255d
|
ANDI r16, r16, 255d
|
||||||
JNE r5, r0, :0
|
JNE r16, r0, :0
|
||||||
JMP :1
|
JMP :1
|
||||||
0: SUB8 r1, r0, r1
|
0: SUB8 r13, r0, r13
|
||||||
1: ADD8 r2, r8, r1
|
1: ADD8 r15, r15, r13
|
||||||
ST r2, r254, 0a, 1h
|
ST r15, r254, 0a, 1h
|
||||||
JMP :2
|
JMP :2
|
||||||
ADDI64 r254, r254, 1d
|
LD r32, r254, 1a, 40h
|
||||||
|
ADDI64 r254, r254, 41d
|
||||||
JALA r0, r31, 0a
|
JALA r0, r31, 0a
|
||||||
timed out
|
timed out
|
||||||
code size: 178
|
code size: 204
|
||||||
ret: 1
|
ret: 0
|
||||||
status: Ok(())
|
status: Ok(())
|
||||||
|
|
Loading…
Reference in a new issue