atomics
This commit is contained in:
parent
3f9e7a560f
commit
332a4216e6
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@ -25,10 +25,11 @@ libfuzzer-sys = { version = "0.4", optional = true }
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indexmap = "2.2.2"
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stacker = "0.1.15"
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wasm-smith = { version = "0.202", optional = true }
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paste = "1.0.15"
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[features]
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default = []
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fuzzing = ["libfuzzer-sys", "wasm-smith"]
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[lib]
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name = "waffle"
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name = "waffle"
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@ -980,6 +980,122 @@ impl<'a> WasmFuncBackend<'a> {
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let h: wasm_encoder::RefType = ty.clone().into();
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Some(wasm_encoder::Instruction::RefNull(h.heap_type))
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}
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Operator::MemoryAtomicNotify { memarg } => Some(wasm_encoder::Instruction::MemoryAtomicNotify(memarg.clone().into())),
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Operator::MemoryAtomicWait32 { memarg } => Some(wasm_encoder::Instruction::MemoryAtomicWait32(memarg.clone().into())),
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Operator::MemoryAtomicWait64 { memarg } => Some(wasm_encoder::Instruction::MemoryAtomicWait64(memarg.clone().into())),
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Operator::AtomicFence => Some(wasm_encoder::Instruction::AtomicFence),
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Operator::I32AtomicLoad { memarg } => Some(wasm_encoder::Instruction::I32AtomicLoad(memarg.clone().into())),
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Operator::I64AtomicLoad { memarg } => Some(wasm_encoder::Instruction::I64AtomicLoad(memarg.clone().into())),
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Operator::I32AtomicLoad8U { memarg } => Some(wasm_encoder::Instruction::I32AtomicLoad8U(memarg.clone().into())),
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Operator::I32AtomicLoad16U { memarg } => Some(wasm_encoder::Instruction::I32AtomicLoad16U(memarg.clone().into())),
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Operator::I64AtomicLoad8U { memarg } => Some(wasm_encoder::Instruction::I64AtomicLoad8U(memarg.clone().into())),
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Operator::I64AtomicLoad16U { memarg } => Some(wasm_encoder::Instruction::I64AtomicLoad16U(memarg.clone().into())),
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Operator::I64AtomicLoad32U { memarg } => Some(wasm_encoder::Instruction::I64AtomicLoad32U(memarg.clone().into())),
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// Operator::I32AtomicStore { memarg } => todo!(),
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// Operator::I64AtomicStore { memarg } => todo!(),
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// Operator::I32AtomicStore8 { memarg } => todo!(),
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// Operator::I32AtomicStore16 { memarg } => todo!(),
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// Operator::I64AtomicStore8 { memarg } => todo!(),
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// Operator::I64AtomicStore16 { memarg } => todo!(),
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// Operator::I64AtomicStore32 { memarg } => todo!(),
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Operator::I32AtomicStore { memarg } => Some(wasm_encoder::Instruction::I32AtomicStore(memarg.clone().into())),
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Operator::I64AtomicStore { memarg } => Some(wasm_encoder::Instruction::I64AtomicStore(memarg.clone().into())),
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Operator::I32AtomicStore8 { memarg } => Some(wasm_encoder::Instruction::I32AtomicStore8(memarg.clone().into())),
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Operator::I32AtomicStore16 { memarg } => Some(wasm_encoder::Instruction::I32AtomicStore16(memarg.clone().into())),
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Operator::I64AtomicStore8 { memarg } => Some(wasm_encoder::Instruction::I64AtomicStore8(memarg.clone().into())),
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Operator::I64AtomicStore16 { memarg } => Some(wasm_encoder::Instruction::I64AtomicStore16(memarg.clone().into())),
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Operator::I64AtomicStore32 { memarg } => Some(wasm_encoder::Instruction::I64AtomicStore32(memarg.clone().into())),
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Operator::I32AtomicRmwAdd { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwAdd(memarg.clone().into())),
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Operator::I64AtomicRmwAdd { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwAdd(memarg.clone().into())),
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Operator::I32AtomicRmw8AddU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8AddU(memarg.clone().into())),
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Operator::I32AtomicRmw16AddU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16AddU(memarg.clone().into())),
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Operator::I64AtomicRmw8AddU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8AddU(memarg.clone().into())),
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Operator::I64AtomicRmw16AddU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16AddU(memarg.clone().into())),
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Operator::I64AtomicRmw32AddU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32AddU(memarg.clone().into())),
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// Operator::I32AtomicRmwSub { memarg } => todo!(),
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// Operator::I64AtomicRmwSub { memarg } => todo!(),
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// Operator::I32AtomicRmw8SubU { memarg } => todo!(),
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// Operator::I32AtomicRmw16SubU { memarg } => todo!(),
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// Operator::I64AtomicRmw8SubU { memarg } => todo!(),
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// Operator::I64AtomicRmw16SubU { memarg } => todo!(),
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// Operator::I64AtomicRmw32SubU { memarg } => todo!(),
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Operator::I32AtomicRmwSub { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwSub(memarg.clone().into())),
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Operator::I64AtomicRmwSub { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwSub(memarg.clone().into())),
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Operator::I32AtomicRmw8SubU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8SubU(memarg.clone().into())),
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Operator::I32AtomicRmw16SubU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16SubU(memarg.clone().into())),
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Operator::I64AtomicRmw8SubU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8SubU(memarg.clone().into())),
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Operator::I64AtomicRmw16SubU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16SubU(memarg.clone().into())),
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Operator::I64AtomicRmw32SubU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32SubU(memarg.clone().into())),
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// Operator::I32AtomicRmwAnd { memarg } => todo!(),
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// Operator::I64AtomicRmwAnd { memarg } => todo!(),
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// Operator::I32AtomicRmw8AndU { memarg } => todo!(),
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// Operator::I32AtomicRmw16AndU { memarg } => todo!(),
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// Operator::I64AtomicRmw8AndU { memarg } => todo!(),
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// Operator::I64AtomicRmw16AndU { memarg } => todo!(),
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// Operator::I64AtomicRmw32AndU { memarg } => todo!(),
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Operator::I32AtomicRmwAnd { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwAnd(memarg.clone().into())),
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Operator::I64AtomicRmwAnd { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwAnd(memarg.clone().into())),
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Operator::I32AtomicRmw8AndU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8AndU(memarg.clone().into())),
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Operator::I32AtomicRmw16AndU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16AndU(memarg.clone().into())),
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Operator::I64AtomicRmw8AndU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8AndU(memarg.clone().into())),
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Operator::I64AtomicRmw16AndU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16AndU(memarg.clone().into())),
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Operator::I64AtomicRmw32AndU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32AndU(memarg.clone().into())),
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// Operator::I32AtomicRmwOr { memarg } => todo!(),
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// Operator::I64AtomicRmwOr { memarg } => todo!(),
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// Operator::I32AtomicRmw8OrU { memarg } => todo!(),
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// Operator::I32AtomicRmw16OrU { memarg } => todo!(),
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// Operator::I64AtomicRmw8OrU { memarg } => todo!(),
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// Operator::I64AtomicRmw16OrU { memarg } => todo!(),
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// Operator::I64AtomicRmw32OrU { memarg } => todo!(),
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Operator::I32AtomicRmwOr { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwOr(memarg.clone().into())),
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Operator::I64AtomicRmwOr { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwOr(memarg.clone().into())),
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Operator::I32AtomicRmw8OrU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8OrU(memarg.clone().into())),
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Operator::I32AtomicRmw16OrU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16OrU(memarg.clone().into())),
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Operator::I64AtomicRmw8OrU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8OrU(memarg.clone().into())),
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Operator::I64AtomicRmw16OrU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16OrU(memarg.clone().into())),
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Operator::I64AtomicRmw32OrU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32OrU(memarg.clone().into())),
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// Operator::I32AtomicRmwXor { memarg } => todo!(),
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// Operator::I64AtomicRmwXor { memarg } => todo!(),
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// Operator::I32AtomicRmw8XorU { memarg } => todo!(),
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// Operator::I32AtomicRmw16XorU { memarg } => todo!(),
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// Operator::I64AtomicRmw8XorU { memarg } => todo!(),
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// Operator::I64AtomicRmw16XorU { memarg } => todo!(),
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// Operator::I64AtomicRmw32XorU { memarg } => todo!(),
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Operator::I32AtomicRmwXor { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwXor(memarg.clone().into())),
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Operator::I64AtomicRmwXor { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwXor(memarg.clone().into())),
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Operator::I32AtomicRmw8XorU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8XorU(memarg.clone().into())),
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Operator::I32AtomicRmw16XorU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16XorU(memarg.clone().into())),
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Operator::I64AtomicRmw8XorU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8XorU(memarg.clone().into())),
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Operator::I64AtomicRmw16XorU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16XorU(memarg.clone().into())),
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Operator::I64AtomicRmw32XorU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32XorU(memarg.clone().into())),
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// Operator::I32AtomicRmwXchg { memarg } => todo!(),
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// Operator::I64AtomicRmwXchg { memarg } => todo!(),
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// Operator::I32AtomicRmw8XchgU { memarg } => todo!(),
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// Operator::I32AtomicRmw16XchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw8XchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw16XchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw32XchgU { memarg } => todo!(),
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Operator::I32AtomicRmwXchg { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwXchg(memarg.clone().into())),
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Operator::I64AtomicRmwXchg { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwXchg(memarg.clone().into())),
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Operator::I32AtomicRmw8XchgU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8XchgU(memarg.clone().into())),
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Operator::I32AtomicRmw16XchgU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16XchgU(memarg.clone().into())),
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Operator::I64AtomicRmw8XchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8XchgU(memarg.clone().into())),
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Operator::I64AtomicRmw16XchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16XchgU(memarg.clone().into())),
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Operator::I64AtomicRmw32XchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32XchgU(memarg.clone().into())),
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// Operator::I32AtomicRmwCmpxchg { memarg } => todo!(),
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// Operator::I64AtomicRmwCmpxchg { memarg } => todo!(),
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// Operator::I32AtomicRmw8CmpxchgU { memarg } => todo!(),
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// Operator::I32AtomicRmw16CmpxchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw8CmpxchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw16CmpxchgU { memarg } => todo!(),
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// Operator::I64AtomicRmw32CmpxchgU { memarg } => todo!(),
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Operator::I32AtomicRmwCmpxchg { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmwCmpxchg(memarg.clone().into())),
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Operator::I64AtomicRmwCmpxchg { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmwCmpxchg(memarg.clone().into())),
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Operator::I32AtomicRmw8CmpxchgU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw8CmpxchgU(memarg.clone().into())),
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Operator::I32AtomicRmw16CmpxchgU { memarg } => Some(wasm_encoder::Instruction::I32AtomicRmw16CmpxchgU(memarg.clone().into())),
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Operator::I64AtomicRmw8CmpxchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw8CmpxchgU(memarg.clone().into())),
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Operator::I64AtomicRmw16CmpxchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw16CmpxchgU(memarg.clone().into())),
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Operator::I64AtomicRmw32CmpxchgU { memarg } => Some(wasm_encoder::Instruction::I64AtomicRmw32CmpxchgU(memarg.clone().into())),
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};
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if let Some(inst) = inst {
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@ -1042,8 +1158,8 @@ pub fn compile(module: &Module<'_>) -> anyhow::Result<wasm_encoder::Module> {
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num_mem_imports += 1;
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let mem = &module.memories[mem];
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wasm_encoder::EntityType::Memory(wasm_encoder::MemoryType {
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memory64: false,
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shared: false,
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memory64: mem.memory64,
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shared: mem.shared,
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minimum: mem.initial_pages as u64,
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maximum: mem.maximum_pages.map(|val| val as u64),
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})
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@ -1088,7 +1204,7 @@ pub fn compile(module: &Module<'_>) -> anyhow::Result<wasm_encoder::Module> {
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minimum: mem_data.initial_pages as u64,
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maximum: mem_data.maximum_pages.map(|val| val as u64),
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memory64: mem_data.memory64,
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shared: false,
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shared: mem_data.shared,
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});
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}
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into_mod.section(&memories);
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1
src/copying.rs
Normal file
1
src/copying.rs
Normal file
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@ -0,0 +1 @@
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pub mod module;
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358
src/copying/module.rs
Normal file
358
src/copying/module.rs
Normal file
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@ -0,0 +1,358 @@
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use crate::util::{add_start, new_sig};
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use crate::op_traits::rewrite_mem;
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use paste::paste;
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use std::{
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backtrace,
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borrow::Cow,
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collections::{BTreeMap, BTreeSet, HashMap},
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hash::Hash,
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iter::empty,
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ops::{Deref, DerefMut},
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};
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use crate::{
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entity::EntityRef, ExportKind, Func, FuncDecl, FunctionBody, Global, ImportKind, Memory, Module, Operator, Signature, SignatureData, Table, TableData, Type, ValueDef
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};
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#[derive(Eq, PartialEq, Clone)]
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pub struct IKW(pub ImportKind);
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impl Hash for IKW {
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fn hash<H: std::hash::Hasher>(&self, state: &mut H) {
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match &self.0 {
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ImportKind::Table(a) => {
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state.write_usize(0);
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a.hash(state);
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}
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ImportKind::Func(a) => {
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state.write_usize(1);
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a.hash(state);
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}
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ImportKind::Global(a) => {
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state.write_usize(2);
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a.hash(state);
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}
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ImportKind::Memory(a) => {
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state.write_usize(3);
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a.hash(state);
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}
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}
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}
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}
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pub struct State<I> {
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cache: HashMap<IKW, ImportKind>,
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fun_cache: BTreeMap<Func, Func>,
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table_cache: BTreeMap<Table, Table>,
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pub importmap: I,
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pub tables: BTreeSet<Table>,
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}
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impl<I> State<I> {
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pub fn new(importmap: I, tables: BTreeSet<Table>) -> Self {
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return Self {
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importmap,
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cache: Default::default(),
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fun_cache: Default::default(),
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table_cache: Default::default(),
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tables,
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};
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}
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}
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pub struct Copier<A, B, S> {
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pub src: A,
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pub dest: B,
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pub state: S,
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}
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macro_rules! translator {
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($a:tt) => {
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paste! {
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pub fn [<translate_ $a>](&mut self, m: $a) -> anyhow::Result<$a>{
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let ImportKind::$a(n) = self.translate_import(ImportKind::$a(m))? else{
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anyhow::bail!("not the right item")
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};
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return Ok(n);
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}
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}
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};
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}
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pub trait Imports {
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fn get_import(
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&mut self,
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a: &mut Module<'_>,
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m: String,
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n: String,
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) -> anyhow::Result<Option<ImportBehavior>>;
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}
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#[repr(transparent)]
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#[derive(Clone, Debug, Copy)]
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pub struct ImportFn<F>(pub F);
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impl<F: FnMut(&mut Module<'_>, String, String) -> anyhow::Result<Option<ImportBehavior>>> Imports
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for ImportFn<F>
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{
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fn get_import(
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&mut self,
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a: &mut Module<'_>,
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m: String,
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n: String,
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) -> anyhow::Result<Option<ImportBehavior>> {
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return (self.0)(a, m, n);
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}
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}
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pub enum ImportBehavior {
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Bind(ImportKind),
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Passthrough(String, String),
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}
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impl<
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'a: 'b,
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'b,
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A: Deref<Target = crate::Module<'a>>,
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B: Deref<Target = crate::Module<'b>> + DerefMut,
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S: Deref<Target = State<I>> + DerefMut,
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I: Deref<Target = J> + DerefMut,
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J: Imports + ?Sized,
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> Copier<A, B, S>
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{
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// pub fn collect(&mut self) -> anyhow::Result<BTreeMap<String, ExportKind>> {
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// let e = get_exports(&self.src);
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// // let mut m = HashMap::new();
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// let mut m = BTreeMap::new();
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// for (s, e) in e {
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// let e = x2i(e);
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// let r = self.translate_import(e.clone())?;
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// m.insert(s, i2x(r));
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// }
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// return Ok(m);
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// }
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pub fn new(
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src: A,
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dest: B,
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// importmap: BTreeMap<(String, String), ImportKind>,
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cache: S,
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) -> Self {
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return Self {
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src,
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dest,
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// importmap,
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state: cache,
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};
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}
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pub fn resolve_import(&mut self, a: &ImportKind) -> anyhow::Result<Option<ImportBehavior>> {
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for i in self.src.imports.iter() {
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if i.kind == *a {
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return self.state.importmap.get_import(
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&mut self.dest,
|
||||
i.module.clone(),
|
||||
i.name.clone(),
|
||||
);
|
||||
}
|
||||
}
|
||||
return Ok(None);
|
||||
}
|
||||
pub fn internal_translate_mem(&mut self, a: crate::Memory) -> anyhow::Result<crate::Memory> {
|
||||
let d = self.src.memories[a].clone();
|
||||
return Ok(self.dest.memories.push(d));
|
||||
}
|
||||
pub fn internal_translate_global(
|
||||
&mut self,
|
||||
a: crate::Global,
|
||||
) -> anyhow::Result<crate::Global> {
|
||||
let d = self.src.globals[a].clone();
|
||||
return Ok(self.dest.globals.push(d));
|
||||
}
|
||||
pub fn translate_import(&mut self, a: ImportKind) -> anyhow::Result<ImportKind> {
|
||||
let i = match self.resolve_import(&a)? {
|
||||
None => None,
|
||||
Some(ImportBehavior::Bind(b)) => return Ok(b),
|
||||
Some(ImportBehavior::Passthrough(a, b)) => Some((a, b)),
|
||||
};
|
||||
if let Some(j) = i.clone() {
|
||||
for m in self.dest.imports.iter() {
|
||||
if m.module == j.0 && m.name == j.1 {
|
||||
return Ok(m.kind.clone());
|
||||
}
|
||||
}
|
||||
}
|
||||
if let Some(b) = self.state.cache.get(&IKW(a.clone())) {
|
||||
return Ok(b.clone());
|
||||
}
|
||||
let c = match a {
|
||||
ImportKind::Table(t) => ImportKind::Table(self.internal_translate_table(t)?),
|
||||
ImportKind::Func(f) => ImportKind::Func(self.internal_translate_func(f)?),
|
||||
ImportKind::Global(g) => ImportKind::Global(self.internal_translate_global(g)?),
|
||||
ImportKind::Memory(m) => ImportKind::Memory(self.internal_translate_mem(m)?),
|
||||
};
|
||||
self.state.cache.insert(IKW(a.clone()), c.clone());
|
||||
if let Some(j) = i {
|
||||
self.dest.imports.push(crate::Import {
|
||||
module: j.0,
|
||||
name: j.1,
|
||||
kind: c.clone(),
|
||||
})
|
||||
}
|
||||
return Ok(c);
|
||||
}
|
||||
pub fn internal_translate_table(&mut self, tk: Table) -> anyhow::Result<Table> {
|
||||
// if let Some(c) = self.state.table_cache.get(&tk) {
|
||||
// return Ok(*c);
|
||||
// }
|
||||
let mut t = self.src.tables[tk].clone();
|
||||
if let Type::TypedFuncRef{sig_index,..} = &mut t.ty{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
// let nt = self.dest.tables.push(t.clone());
|
||||
// self.state.table_cache.insert(tk, nt);
|
||||
if let Some(u) = t.func_elements.as_mut() {
|
||||
for w in u.iter_mut() {
|
||||
*w = self.translate_Func(*w)?;
|
||||
}
|
||||
}
|
||||
// self.dest.tables[nt] = t;
|
||||
return Ok(self.dest.tables.push(t));
|
||||
}
|
||||
pub fn translate_sig(&mut self, s: Signature) -> anyhow::Result<Signature> {
|
||||
let mut d = self.src.signatures[s].clone();
|
||||
for x in d.params.iter_mut().chain(d.returns.iter_mut()){
|
||||
if let Type::TypedFuncRef{sig_index,..} = x{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
return Ok(new_sig(&mut *self.dest, d));
|
||||
}
|
||||
pub fn internal_translate_func(&mut self, f: Func) -> anyhow::Result<Func> {
|
||||
if f == Func::invalid() {
|
||||
return Ok(f);
|
||||
}
|
||||
if let Some(x) = self.state.fun_cache.get(&f) {
|
||||
return Ok(*x);
|
||||
}
|
||||
let a = self.dest.funcs.push(crate::FuncDecl::None);
|
||||
self.state.fun_cache.insert(f, a);
|
||||
for t in &self.state.tables {
|
||||
self.dest.tables[*t]
|
||||
.func_elements
|
||||
.get_or_insert(vec![])
|
||||
.push(a);
|
||||
}
|
||||
if Some(f) == self.src.start_func {
|
||||
add_start(&mut self.dest, a);
|
||||
}
|
||||
let mut f = self.src.funcs[f].clone();
|
||||
if let Some(b) = f.body_mut() {
|
||||
for v in b.values.iter() {
|
||||
let mut k = b.values[v].clone();
|
||||
if let ValueDef::BlockParam(_, _, x) = &mut k{
|
||||
if let Type::TypedFuncRef{sig_index,..} = x{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
if let ValueDef::PickOutput(_,_ , x) = &mut k{
|
||||
if let Type::TypedFuncRef{sig_index,..} = x{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
if let ValueDef::Operator(a, vs, c) = &mut k {
|
||||
let mut w = b.arg_pool[*vs].to_vec();
|
||||
let mut e = None;
|
||||
rewrite_mem(a, &mut w, |m, _| {
|
||||
*m = self.translate_Memory(*m)?;
|
||||
Ok::<_,anyhow::Error>(())
|
||||
})?;
|
||||
if let Some(e) = e {
|
||||
return Err(e);
|
||||
}
|
||||
match a {
|
||||
crate::Operator::Call { function_index } => {
|
||||
*function_index = self.translate_Func(*function_index)?;
|
||||
}
|
||||
crate::Operator::RefFunc { func_index } => {
|
||||
*func_index = self.translate_Func(*func_index)?;
|
||||
}
|
||||
crate::Operator::RefNull { ty } => {
|
||||
if let Type::TypedFuncRef{sig_index,..} = ty{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
crate::Operator::TypedSelect { ty } => {
|
||||
if let Type::TypedFuncRef{sig_index,..} = ty{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
Operator::CallRef { sig_index } => {
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
crate::Operator::CallIndirect {
|
||||
sig_index,
|
||||
table_index,
|
||||
} => {
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
*table_index = self.translate_Table(*table_index)?;
|
||||
}
|
||||
crate::Operator::GlobalGet { global_index } => {
|
||||
*global_index = self.translate_Global(*global_index)?;
|
||||
}
|
||||
crate::Operator::GlobalSet { global_index } => {
|
||||
*global_index = self.translate_Global(*global_index)?;
|
||||
}
|
||||
crate::Operator::TableGet { table_index } => {
|
||||
*table_index = self.translate_Table(*table_index)?;
|
||||
}
|
||||
crate::Operator::TableSet { table_index } => {
|
||||
*table_index = self.translate_Table(*table_index)?;
|
||||
}
|
||||
crate::Operator::TableGrow { table_index } => {
|
||||
*table_index = self.translate_Table(*table_index)?;
|
||||
}
|
||||
crate::Operator::TableSize { table_index } => {
|
||||
*table_index = self.translate_Table(*table_index)?;
|
||||
}
|
||||
_ => {}
|
||||
}
|
||||
*vs = b.arg_pool.from_iter(w.into_iter());
|
||||
}
|
||||
b.values[v] = k;
|
||||
}
|
||||
for k in b.blocks.iter() {
|
||||
let mut kv = b.blocks[k].clone();
|
||||
match &mut kv.terminator {
|
||||
crate::Terminator::ReturnCall { func, args } => {
|
||||
*func = self.translate_Func(*func)?;
|
||||
}
|
||||
crate::Terminator::ReturnCallIndirect { sig, table, args } => {
|
||||
*sig = self.translate_sig(*sig)?;
|
||||
*table = self.translate_Table(*table)?;
|
||||
}
|
||||
_ => {}
|
||||
}
|
||||
b.blocks[k] = kv;
|
||||
}
|
||||
for x in b.type_pool.storage.iter_mut(){
|
||||
if let Type::TypedFuncRef{sig_index,..} = x{
|
||||
*sig_index = self.translate_sig(*sig_index)?;
|
||||
}
|
||||
}
|
||||
// (self.state.instrument)(&mut self.dest,b)?;
|
||||
}
|
||||
match &mut f {
|
||||
crate::FuncDecl::Import(a, _) => {
|
||||
*a = self.translate_sig(*a)?;
|
||||
}
|
||||
crate::FuncDecl::Lazy(_, _, _) => todo!(),
|
||||
crate::FuncDecl::Body(a, _, _) => {
|
||||
*a = self.translate_sig(*a)?;
|
||||
}
|
||||
crate::FuncDecl::Compiled(_, _, _) => todo!(),
|
||||
crate::FuncDecl::None => {}
|
||||
}
|
||||
self.dest.funcs[a] = f;
|
||||
return Ok(a);
|
||||
}
|
||||
translator!(Memory);
|
||||
translator!(Table);
|
||||
translator!(Global);
|
||||
translator!(Func);
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
}
|
||||
|
|
@ -145,7 +145,8 @@ fn handle_payload<'a>(
|
|||
initial_pages: mem.initial as usize,
|
||||
maximum_pages: mem.maximum.map(|max| max as usize),
|
||||
segments: vec![],
|
||||
memory64: mem.memory64
|
||||
memory64: mem.memory64,
|
||||
shared: mem.shared
|
||||
});
|
||||
ImportKind::Memory(mem)
|
||||
}
|
||||
|
|
@ -230,7 +231,8 @@ fn handle_payload<'a>(
|
|||
initial_pages: memory.initial as usize,
|
||||
maximum_pages: memory.maximum.map(|max| max as usize),
|
||||
segments: vec![],
|
||||
memory64: memory.memory64
|
||||
memory64: memory.memory64,
|
||||
shared: memory.shared
|
||||
});
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@ pub struct MemoryData {
|
|||
pub maximum_pages: Option<usize>,
|
||||
pub segments: Vec<MemorySegment>,
|
||||
pub memory64: bool,
|
||||
pub shared: bool,
|
||||
}
|
||||
|
||||
#[derive(Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
|
||||
|
|
|
|||
|
|
@ -29,3 +29,5 @@ pub use passes::basic_opt::OptOptions;
|
|||
|
||||
#[cfg(feature = "fuzzing")]
|
||||
pub mod fuzzing;
|
||||
|
||||
pub mod copying;
|
||||
840
src/op_traits.rs
840
src/op_traits.rs
|
|
@ -266,9 +266,9 @@ pub fn op_inputs(
|
|||
}
|
||||
Operator::TableSize { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::MemorySize { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::MemoryGrow { mem } => Ok(if module.memories[*mem].memory64{
|
||||
Operator::MemoryGrow { mem } => Ok(if module.memories[*mem].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
}else{
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}),
|
||||
|
||||
|
|
@ -661,7 +661,10 @@ pub fn op_inputs(
|
|||
|
||||
Operator::CallRef { sig_index } => {
|
||||
let mut params = module.signatures[*sig_index].params.to_vec();
|
||||
params.push(Type::TypedFuncRef{nullable: true, sig_index: *sig_index});
|
||||
params.push(Type::TypedFuncRef {
|
||||
nullable: true,
|
||||
sig_index: *sig_index,
|
||||
});
|
||||
Ok(params.into())
|
||||
}
|
||||
Operator::RefIsNull => {
|
||||
|
|
@ -685,6 +688,399 @@ pub fn op_inputs(
|
|||
Ok(Cow::Borrowed(&[Type::I32, Type::I32, Type::I32]))
|
||||
}
|
||||
}
|
||||
|
||||
Operator::MemoryAtomicNotify { memarg } => {
|
||||
if module.memories[memarg.memory].memory64 {
|
||||
Ok(Cow::Borrowed(&[Type::I64, Type::I32]))
|
||||
} else {
|
||||
Ok(Cow::Borrowed(&[Type::I32, Type::I32]))
|
||||
}
|
||||
} //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => {
|
||||
if module.memories[memarg.memory].memory64 {
|
||||
Ok(Cow::Borrowed(&[Type::I64, Type::I32, Type::I32]))
|
||||
} else {
|
||||
Ok(Cow::Borrowed(&[Type::I32, Type::I32, Type::I32]))
|
||||
}
|
||||
} //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => {
|
||||
if module.memories[memarg.memory].memory64 {
|
||||
Ok(Cow::Borrowed(&[Type::I64, Type::I64, Type::I32]))
|
||||
} else {
|
||||
Ok(Cow::Borrowed(&[Type::I32, Type::I64, Type::I32]))
|
||||
}
|
||||
} //=> visit_memory_atomic_wait64
|
||||
Operator::AtomicFence => Ok(Cow::Borrowed(&[])), // => visit_atomic_fence
|
||||
Operator::I32AtomicLoad { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i32_atomic_load
|
||||
Operator::I64AtomicLoad { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i64_atomic_load
|
||||
Operator::I32AtomicLoad8U { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i32_atomic_load8_u
|
||||
Operator::I32AtomicLoad16U { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i32_atomic_load16_u
|
||||
Operator::I64AtomicLoad8U { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i64_atomic_load8_u
|
||||
Operator::I64AtomicLoad16U { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i64_atomic_load16_u
|
||||
Operator::I64AtomicLoad32U { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}), //=> visit_i64_atomic_load32_u
|
||||
Operator::I32AtomicStore { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_store
|
||||
Operator::I64AtomicStore { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_store
|
||||
Operator::I32AtomicStore8 { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_store8
|
||||
Operator::I32AtomicStore16 { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_store16
|
||||
Operator::I64AtomicStore8 { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_store8
|
||||
Operator::I64AtomicStore16 { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_store16
|
||||
Operator::I64AtomicStore32 { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_store32
|
||||
Operator::I32AtomicRmwAdd { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw32_add_u
|
||||
// Operator::I32AtomicRmwSub { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_sub
|
||||
// Operator::I64AtomicRmwSub { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_sub
|
||||
// Operator::I32AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_sub_u
|
||||
// Operator::I32AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_sub_u
|
||||
// Operator::I64AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_sub_u
|
||||
// Operator::I64AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_sub_u
|
||||
// Operator::I64AtomicRmw32SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwSub { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwSub { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_Sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_Sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw16_Sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_Sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw16_Sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw32_Sub_u
|
||||
// Operator::I32AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_and
|
||||
// Operator::I64AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_and
|
||||
// Operator::I32AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_and_u
|
||||
// Operator::I32AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_and_u
|
||||
// Operator::I64AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_and_u
|
||||
// Operator::I64AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_and_u
|
||||
// Operator::I64AtomicRmw32AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_And
|
||||
Operator::I64AtomicRmwAnd { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_And
|
||||
Operator::I32AtomicRmw8AndU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_And_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw16_And_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_And_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw16_And_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw32_And_u
|
||||
// Operator::I32AtomicRmwOr { memarg }, // => visit_i32_atomic_rmw_or
|
||||
// Operator::I64AtomicRmwOr { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_or
|
||||
// Operator::I32AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_or_u
|
||||
// Operator::I32AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_or_u
|
||||
// Operator::I64AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_or_u
|
||||
// Operator::I64AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_or_u
|
||||
// Operator::I64AtomicRmw32OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwOr { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_Or
|
||||
Operator::I64AtomicRmwOr { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_Or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_Or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw16_Or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_Or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw16_Or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw32_Or_u
|
||||
// Operator::I32AtomicRmwXor { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xor
|
||||
// Operator::I64AtomicRmwXor { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xor
|
||||
// Operator::I32AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_xor_u
|
||||
// Operator::I32AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_xor_u
|
||||
// Operator::I64AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_xor_u
|
||||
// Operator::I64AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xor_u
|
||||
// Operator::I64AtomicRmw32XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXor { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_Xor
|
||||
Operator::I64AtomicRmwXor { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_Xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_Xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw16_Xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_Xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw16_Xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw32_Xor_u
|
||||
// Operator::I32AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xchg
|
||||
// Operator::I64AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xchg
|
||||
// Operator::I32AtomicRmw8XchgU { memarg },// => visit_i32_atomic_rmw8_xchg_u
|
||||
// Operator::I32AtomicRmw16XchgU { memarg },// => visit_i32_atomic_rmw16_xchg_u
|
||||
// Operator::I64AtomicRmw8XchgU { memarg },// => visit_i64_atomic_rmw8_xchg_u
|
||||
// Operator::I64AtomicRmw16XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xchg_u
|
||||
// Operator::I64AtomicRmw32XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw_Xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw_Xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
}), //=> visit_i32_atomic_rmw8_Xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32])
|
||||
})
|
||||
} //=> visit_i32_atomic_rmw16_Xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg } => Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
}), //=> visit_i64_atomic_rmw8_Xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
})
|
||||
} //=> visit_i64_atomic_rmw16_Xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64])
|
||||
})
|
||||
} //=> visit_i64_atomic_rmw32_Xchg_u
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32, Type::I32])
|
||||
})
|
||||
} //=> visit_i32_atomic_rmw_cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64, Type::I64])
|
||||
})
|
||||
} //=> visit_i64_atomic_rmw_cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32, Type::I32])
|
||||
})
|
||||
} // => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I32, Type::I32])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I32, Type::I32])
|
||||
})
|
||||
} // => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64, Type::I64])
|
||||
})
|
||||
} // => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64, Type::I64])
|
||||
})
|
||||
} // => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => {
|
||||
Ok(if module.memories[memarg.memory].memory64 {
|
||||
Cow::Borrowed(&[Type::I64, Type::I64, Type::I64])
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32, Type::I64, Type::I64])
|
||||
})
|
||||
} //=> visit_i64_atomic_rmw32_c
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -727,6 +1123,15 @@ pub fn op_outputs(
|
|||
| Operator::I64Load16U { .. }
|
||||
| Operator::I64Load32S { .. }
|
||||
| Operator::I64Load32U { .. } => Ok(Cow::Borrowed(&[Type::I64])),
|
||||
|
||||
Operator::I32AtomicLoad { .. }
|
||||
| Operator::I32AtomicLoad8U { .. }
|
||||
| Operator::I32AtomicLoad16U { .. } => Ok(Cow::Borrowed(&[Type::I32])),
|
||||
Operator::I64AtomicLoad { .. }
|
||||
| Operator::I64AtomicLoad8U { .. }
|
||||
| Operator::I64AtomicLoad16U { .. }
|
||||
| Operator::I64AtomicLoad32U { .. } => Ok(Cow::Borrowed(&[Type::I64])),
|
||||
|
||||
Operator::F32Load { .. } => Ok(Cow::Borrowed(&[Type::F32])),
|
||||
Operator::F64Load { .. } => Ok(Cow::Borrowed(&[Type::F64])),
|
||||
|
||||
|
|
@ -740,6 +1145,14 @@ pub fn op_outputs(
|
|||
Operator::I64Store16 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I64Store32 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
|
||||
Operator::I32AtomicStore { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I64AtomicStore { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I32AtomicStore8 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I32AtomicStore16 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I64AtomicStore8 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I64AtomicStore16 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::I64AtomicStore32 { .. } => Ok(Cow::Borrowed(&[])),
|
||||
|
||||
Operator::I32Const { .. } => Ok(Cow::Borrowed(&[Type::I32])),
|
||||
Operator::I64Const { .. } => Ok(Cow::Borrowed(&[Type::I64])),
|
||||
Operator::F32Const { .. } => Ok(Cow::Borrowed(&[Type::F32])),
|
||||
|
|
@ -890,14 +1303,14 @@ pub fn op_outputs(
|
|||
Operator::TableSet { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::TableGrow { .. } => Ok(Cow::Borrowed(&[])),
|
||||
Operator::TableSize { .. } => Ok(Cow::Borrowed(&[Type::I32])),
|
||||
Operator::MemorySize { mem } => Ok(if module.memories[*mem].memory64{
|
||||
Operator::MemorySize { mem } => Ok(if module.memories[*mem].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
}else{
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}),
|
||||
Operator::MemoryGrow { mem } => Ok(if module.memories[*mem].memory64{
|
||||
Operator::MemoryGrow { mem } => Ok(if module.memories[*mem].memory64 {
|
||||
Cow::Borrowed(&[Type::I64])
|
||||
}else{
|
||||
} else {
|
||||
Cow::Borrowed(&[Type::I32])
|
||||
}),
|
||||
Operator::MemoryCopy { .. } => Ok(Cow::Borrowed(&[])),
|
||||
|
|
@ -1163,9 +1576,67 @@ pub fn op_outputs(
|
|||
Operator::RefIsNull => Ok(Cow::Borrowed(&[Type::I32])),
|
||||
Operator::RefFunc { func_index } => {
|
||||
let ty = module.funcs[*func_index].sig();
|
||||
Ok(vec![Type::TypedFuncRef{nullable:true, sig_index:ty}].into())
|
||||
Ok(vec![Type::TypedFuncRef {
|
||||
nullable: true,
|
||||
sig_index: ty,
|
||||
}]
|
||||
.into())
|
||||
}
|
||||
Operator::RefNull { ty } => Ok(vec![ty.clone()].into()),
|
||||
|
||||
Operator::MemoryAtomicNotify { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_memory_atomic_wait64
|
||||
Operator::AtomicFence => Ok(Cow::Borrowed(&[])), // => visit_atomic_fence
|
||||
Operator::I32AtomicRmwAdd { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_add_u
|
||||
Operator::I32AtomicRmwSub { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_sub
|
||||
Operator::I64AtomicRmwSub { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw8_sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw8_sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_and
|
||||
Operator::I64AtomicRmwAnd { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_and
|
||||
Operator::I32AtomicRmw8AndU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw8_and_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw8_and_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwOr { memarg } => Ok(Cow::Borrowed(&[Type::I32])), // => visit_i32_atomic_rmw_or
|
||||
Operator::I64AtomicRmwOr { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw8_or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw8_or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwXor { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_xor
|
||||
Operator::I64AtomicRmwXor { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw8_xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw8_xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), // => visit_i32_atomic_rmw8_xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), // => visit_i32_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), // => visit_i64_atomic_rmw8_xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => Ok(Cow::Borrowed(&[Type::I32])), //=> visit_i32_atomic_rmw_cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw_cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), // => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg } => Ok(Cow::Borrowed(&[Type::I32])), // => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), // => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), // => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => Ok(Cow::Borrowed(&[Type::I64])), //=> visit_i64_atomic_rmw32_c
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1181,6 +1652,7 @@ pub enum SideEffect {
|
|||
ReadLocal,
|
||||
WriteLocal,
|
||||
All,
|
||||
AtomicStuff,
|
||||
}
|
||||
|
||||
impl Operator {
|
||||
|
|
@ -1637,6 +2109,74 @@ impl Operator {
|
|||
Operator::RefIsNull => &[],
|
||||
Operator::RefFunc { .. } => &[],
|
||||
Operator::RefNull { ty } => &[],
|
||||
|
||||
Operator::MemoryAtomicNotify { memarg } => &[AtomicStuff], //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => &[AtomicStuff], //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => &[AtomicStuff], //=> visit_memory_atomic_wait64
|
||||
Operator::AtomicFence => &[AtomicStuff], // => visit_atomic_fence
|
||||
Operator::I32AtomicLoad { memarg } => &[AtomicStuff, ReadMem], //=> visit_i32_atomic_load
|
||||
Operator::I64AtomicLoad { memarg } => &[AtomicStuff, ReadMem], //=> visit_i64_atomic_load
|
||||
Operator::I32AtomicLoad8U { memarg } => &[AtomicStuff, ReadMem], //=> visit_i32_atomic_load8_u
|
||||
Operator::I32AtomicLoad16U { memarg } => &[AtomicStuff, ReadMem], //=> visit_i32_atomic_load16_u
|
||||
Operator::I64AtomicLoad8U { memarg } => &[AtomicStuff, ReadMem], //=> visit_i64_atomic_load8_u
|
||||
Operator::I64AtomicLoad16U { memarg } => &[AtomicStuff, ReadMem], //=> visit_i64_atomic_load16_u
|
||||
Operator::I64AtomicLoad32U { memarg } => &[AtomicStuff, ReadMem], //=> visit_i64_atomic_load32_u
|
||||
Operator::I32AtomicStore { memarg } => &[AtomicStuff, WriteMem], //=> visit_i32_atomic_store
|
||||
Operator::I64AtomicStore { memarg } => &[AtomicStuff, WriteMem], //=> visit_i64_atomic_store
|
||||
Operator::I32AtomicStore8 { memarg } => &[AtomicStuff, WriteMem], //=> visit_i32_atomic_store8
|
||||
Operator::I32AtomicStore16 { memarg } => &[AtomicStuff, WriteMem], //=> visit_i32_atomic_store16
|
||||
Operator::I64AtomicStore8 { memarg } => &[AtomicStuff, WriteMem], //=> visit_i64_atomic_store8
|
||||
Operator::I64AtomicStore16 { memarg } => &[AtomicStuff, WriteMem], //=> visit_i64_atomic_store16
|
||||
Operator::I64AtomicStore32 { memarg } => &[AtomicStuff, WriteMem], //=> visit_i64_atomic_store32
|
||||
Operator::I32AtomicRmwAdd { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_add_u
|
||||
Operator::I32AtomicRmwSub { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_sub
|
||||
Operator::I64AtomicRmwSub { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw8_sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw8_sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_and
|
||||
Operator::I64AtomicRmwAnd { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_and
|
||||
Operator::I32AtomicRmw8AndU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw8_and_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw8_and_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwOr { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i32_atomic_rmw_or
|
||||
Operator::I64AtomicRmwOr { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw8_or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw8_or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwXor { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_xor
|
||||
Operator::I64AtomicRmwXor { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw8_xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw8_xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i32_atomic_rmw8_xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i32_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i64_atomic_rmw8_xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i32_atomic_rmw_cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw_cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], // => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => &[AtomicStuff, WriteMem, ReadMem], //=> visit_i64_atomic_rmw32_c
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2136,6 +2676,136 @@ impl std::fmt::Display for Operator {
|
|||
Operator::RefIsNull => write!(f, "ref_is_null")?,
|
||||
Operator::RefFunc { func_index } => write!(f, "ref_func<{}>", func_index)?,
|
||||
Operator::RefNull { ty } => write!(f, "ref_null<{}>", ty)?,
|
||||
|
||||
Operator::MemoryAtomicNotify { memarg } => write!(f, "memory_atomic_notify<{memarg}>")?, //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => write!(f, "memory_atomic_wait32<{memarg}>")?, //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => write!(f, "memory_atomic_wait64<{memarg}>")?, //=> visit_memory_atomic_wait64
|
||||
Operator::AtomicFence => write!(f, "atomic_fence")?, // => visit_atomic_fence
|
||||
Operator::I32AtomicLoad { memarg } => write!(f, "i32atomic_load<{memarg}>")?, //=> visit_i32_atomic_load
|
||||
Operator::I64AtomicLoad { memarg } => write!(f, "i64atomic_load<{memarg}>")?, //=> visit_i64_atomic_load
|
||||
Operator::I32AtomicLoad8U { memarg } => write!(f, "i32atomic_load8u<{memarg}>")?, //=> visit_i32_atomic_load8_u
|
||||
Operator::I32AtomicLoad16U { memarg } => write!(f, "i32atomic_load16u<{memarg}>")?, //=> visit_i32_atomic_load16_u
|
||||
Operator::I64AtomicLoad8U { memarg } => write!(f, "i64atomic_load8u<{memarg}>")?, //=> visit_i64_atomic_load8_u
|
||||
Operator::I64AtomicLoad16U { memarg } => write!(f, "i64atomic_load16u<{memarg}>")?, //=> visit_i64_atomic_load16_u
|
||||
Operator::I64AtomicLoad32U { memarg } => write!(f, "i64atomic_load32u<{memarg}>")?, //=> visit_i64_atomic_load32_u
|
||||
Operator::I32AtomicStore { memarg } => write!(f, "i32atomic_store<{memarg}>")?, //=> visit_i32_atomic_store
|
||||
Operator::I64AtomicStore { memarg } => write!(f, "i64atomic_store<{memarg}>")?, //=> visit_i64_atomic_store
|
||||
Operator::I32AtomicStore8 { memarg } => write!(f, "i32atomic_store8<{memarg}>")?, //=> visit_i32_atomic_store8
|
||||
Operator::I32AtomicStore16 { memarg } => write!(f, "i32atomic_store16<{memarg}>")?, //=> visit_i32_atomic_store16
|
||||
Operator::I64AtomicStore8 { memarg } => write!(f, "i64atomic_store8<{memarg}>")?, //=> visit_i64_atomic_store8
|
||||
Operator::I64AtomicStore16 { memarg } => write!(f, "i64atomic_store16<{memarg}>")?, //=> visit_i64_atomic_store16
|
||||
Operator::I64AtomicStore32 { memarg } => write!(f, "i64atomic_store32<{memarg}>")?, //=> visit_i64_atomic_store32
|
||||
Operator::I32AtomicRmwAdd { memarg } => write!(f, "i32atomic_rmwAdd<{memarg}>")?, //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => write!(f, "i64atomic_rmwAdd<{memarg}>")?, //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => write!(f, "i32atomic_rmw8Addu<{memarg}>")?, //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => write!(f, "i32atomic_rmw16Addu<{memarg}>")?, //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => write!(f, "i64atomic_rmw8Addu<{memarg}>")?, //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => write!(f, "i32atomic_rmw16Addu<{memarg}>")?, //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => write!(f, "i32atomic_rmw32Addu<{memarg}>")?, //=> visit_i64_atomic_rmw32_add_u
|
||||
// Operator::I32AtomicRmwSub { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_sub
|
||||
// Operator::I64AtomicRmwSub { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_sub
|
||||
// Operator::I32AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_sub_u
|
||||
// Operator::I32AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_sub_u
|
||||
// Operator::I64AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_sub_u
|
||||
// Operator::I64AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_sub_u
|
||||
// Operator::I64AtomicRmw32SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwSub { memarg } => write!(f, "i32atomic_rmwSub<{memarg}>")?, //=> visit_i32_atomic_rmw_Sub
|
||||
Operator::I64AtomicRmwSub { memarg } => write!(f, "i64atomic_rmwSub<{memarg}>")?, //=> visit_i64_atomic_rmw_Sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => write!(f, "i32atomic_rmw8Subu<{memarg}>")?, //=> visit_i32_atomic_rmw8_Sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => write!(f, "i32atomic_rmw16Subu<{memarg}>")?, //=> visit_i32_atomic_rmw16_Sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => write!(f, "i64atomic_rmw8Subu<{memarg}>")?, //=> visit_i64_atomic_rmw8_Sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => write!(f, "i32atomic_rmw16Subu<{memarg}>")?, //=> visit_i64_atomic_rmw16_Sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => write!(f, "i32atomic_rmw32Subu<{memarg}>")?, //=> visit_i64_atomic_rmw32_Sub_u
|
||||
// Operator::I32AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_and
|
||||
// Operator::I64AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_and
|
||||
// Operator::I32AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_and_u
|
||||
// Operator::I32AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_and_u
|
||||
// Operator::I64AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_and_u
|
||||
// Operator::I64AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_and_u
|
||||
// Operator::I64AtomicRmw32AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => write!(f, "i32atomic_rmwAnd<{memarg}>")?, //=> visit_i32_atomic_rmw_And
|
||||
Operator::I64AtomicRmwAnd { memarg } => write!(f, "i64atomic_rmwAnd<{memarg}>")?, //=> visit_i64_atomic_rmw_And
|
||||
Operator::I32AtomicRmw8AndU { memarg } => write!(f, "i32atomic_rmw8Andu<{memarg}>")?, //=> visit_i32_atomic_rmw8_And_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => write!(f, "i32atomic_rmw16Andu<{memarg}>")?, //=> visit_i32_atomic_rmw16_And_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => write!(f, "i64atomic_rmw8Andu<{memarg}>")?, //=> visit_i64_atomic_rmw8_And_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => write!(f, "i32atomic_rmw16Andu<{memarg}>")?, //=> visit_i64_atomic_rmw16_And_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => write!(f, "i32atomic_rmw32Andu<{memarg}>")?, //=> visit_i64_atomic_rmw32_And_u
|
||||
// Operator::I32AtomicRmwOr { memarg }, // => visit_i32_atomic_rmw_or
|
||||
// Operator::I64AtomicRmwOr { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_or
|
||||
// Operator::I32AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_or_u
|
||||
// Operator::I32AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_or_u
|
||||
// Operator::I64AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_or_u
|
||||
// Operator::I64AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_or_u
|
||||
// Operator::I64AtomicRmw32OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwOr { memarg } => write!(f, "i32atomic_rmwOr<{memarg}>")?, //=> visit_i32_atomic_rmw_Or
|
||||
Operator::I64AtomicRmwOr { memarg } => write!(f, "i64atomic_rmwOr<{memarg}>")?, //=> visit_i64_atomic_rmw_Or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => write!(f, "i32atomic_rmw8Oru<{memarg}>")?, //=> visit_i32_atomic_rmw8_Or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => write!(f, "i32atomic_rmw16Oru<{memarg}>")?, //=> visit_i32_atomic_rmw16_Or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => write!(f, "i64atomic_rmw8Oru<{memarg}>")?, //=> visit_i64_atomic_rmw8_Or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => write!(f, "i32atomic_rmw16Oru<{memarg}>")?, //=> visit_i64_atomic_rmw16_Or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => write!(f, "i32atomic_rmw32Oru<{memarg}>")?, //=> visit_i64_atomic_rmw32_Or_u
|
||||
// Operator::I32AtomicRmwXor { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xor
|
||||
// Operator::I64AtomicRmwXor { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xor
|
||||
// Operator::I32AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_xor_u
|
||||
// Operator::I32AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_xor_u
|
||||
// Operator::I64AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_xor_u
|
||||
// Operator::I64AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xor_u
|
||||
// Operator::I64AtomicRmw32XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXor { memarg } => write!(f, "i32atomic_rmwXor<{memarg}>")?, //=> visit_i32_atomic_rmw_Xor
|
||||
Operator::I64AtomicRmwXor { memarg } => write!(f, "i64atomic_rmwXor<{memarg}>")?, //=> visit_i64_atomic_rmw_Xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => write!(f, "i32atomic_rmw8Xoru<{memarg}>")?, //=> visit_i32_atomic_rmw8_Xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => write!(f, "i32atomic_rmw16Xoru<{memarg}>")?, //=> visit_i32_atomic_rmw16_Xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => write!(f, "i64atomic_rmw8Xoru<{memarg}>")?, //=> visit_i64_atomic_rmw8_Xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => write!(f, "i32atomic_rmw16Xoru<{memarg}>")?, //=> visit_i64_atomic_rmw16_Xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => write!(f, "i32atomic_rmw32Xoru<{memarg}>")?, //=> visit_i64_atomic_rmw32_Xor_u
|
||||
// Operator::I32AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xchg
|
||||
// Operator::I64AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xchg
|
||||
// Operator::I32AtomicRmw8XchgU { memarg },// => visit_i32_atomic_rmw8_xchg_u
|
||||
// Operator::I32AtomicRmw16XchgU { memarg },// => visit_i32_atomic_rmw16_xchg_u
|
||||
// Operator::I64AtomicRmw8XchgU { memarg },// => visit_i64_atomic_rmw8_xchg_u
|
||||
// Operator::I64AtomicRmw16XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xchg_u
|
||||
// Operator::I64AtomicRmw32XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => write!(f, "i32atomic_rmwXchg<{memarg}>")?, //=> visit_i32_atomic_rmw_Xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => write!(f, "i64atomic_rmwXchg<{memarg}>")?, //=> visit_i64_atomic_rmw_Xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg } => write!(f, "i32atomic_rmw8Xchgu<{memarg}>")?, //=> visit_i32_atomic_rmw8_Xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw16Xchgu<{memarg}>")?
|
||||
} //=> visit_i32_atomic_rmw16_Xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg } => write!(f, "i64atomic_rmw8Xchgu<{memarg}>")?, //=> visit_i64_atomic_rmw8_Xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw16Xchgu<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw16_Xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw32Xchgu<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw32_Xchg_u
|
||||
// Operator::I32AtomicRmwCmpxchg { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_cmpxchg
|
||||
// Operator::I64AtomicRmwCmpxchg { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_cmpxchg
|
||||
// Operator::I32AtomicRmw8CmpxchgU { memarg },// => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
// Operator::I32AtomicRmw16CmpxchgU { memarg },// => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
// Operator::I64AtomicRmw8CmpxchgU { memarg },// => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
// Operator::I64AtomicRmw16CmpxchgU { memarg },// => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
// Operator::I64AtomicRmw32CmpxchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_c
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => {
|
||||
write!(f, "i32atomic_rmwCmpxchg<{memarg}>")?
|
||||
} //=> visit_i32_atomic_rmw_Cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => {
|
||||
write!(f, "i64atomic_rmwCmpxchg<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw_Cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw8Cmpxchgu<{memarg}>")?
|
||||
} //=> visit_i32_atomic_rmw8_Cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw16Cmpxchgu<{memarg}>")?
|
||||
} //=> visit_i32_atomic_rmw16_Cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg } => {
|
||||
write!(f, "i64atomic_rmw8Cmpxchgu<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw8_Cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw16Cmpxchgu<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw16_Cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => {
|
||||
write!(f, "i32atomic_rmw32Cmpxchgu<{memarg}>")?
|
||||
} //=> visit_i64_atomic_rmw32_Cmpxchg_u
|
||||
}
|
||||
|
||||
Ok(())
|
||||
|
|
@ -2152,11 +2822,11 @@ pub fn op_rematerialize(op: &Operator) -> bool {
|
|||
}
|
||||
}
|
||||
|
||||
pub fn rewrite_mem<V,E>(
|
||||
pub fn rewrite_mem<V, E>(
|
||||
o: &mut Operator,
|
||||
v: &mut [V],
|
||||
mut go: impl FnMut(&mut crate::Memory, Option<&mut V>) -> Result<(),E>,
|
||||
) -> Result<(),E>{
|
||||
mut go: impl FnMut(&mut crate::Memory, Option<&mut V>) -> Result<(), E>,
|
||||
) -> Result<(), E> {
|
||||
match o {
|
||||
Operator::I32Load { memory } => go(&mut memory.memory, Some(&mut v[0])),
|
||||
Operator::I64Load { memory } => go(&mut memory.memory, Some(&mut v[0])),
|
||||
|
|
@ -2212,7 +2882,74 @@ pub fn rewrite_mem<V,E>(
|
|||
Operator::V128Store16Lane { memory, .. } => go(&mut memory.memory, Some(&mut v[0])),
|
||||
Operator::V128Store32Lane { memory, .. } => go(&mut memory.memory, Some(&mut v[0])),
|
||||
Operator::V128Store64Lane { memory, .. } => go(&mut memory.memory, Some(&mut v[0])),
|
||||
_ => Ok(())
|
||||
|
||||
Operator::MemoryAtomicNotify { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_memory_atomic_wait64
|
||||
Operator::I32AtomicLoad { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_load
|
||||
Operator::I64AtomicLoad { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_load
|
||||
Operator::I32AtomicLoad8U { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_load8_u
|
||||
Operator::I32AtomicLoad16U { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_load16_u
|
||||
Operator::I64AtomicLoad8U { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_load8_u
|
||||
Operator::I64AtomicLoad16U { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_load16_u
|
||||
Operator::I64AtomicLoad32U { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_load32_u
|
||||
Operator::I32AtomicStore { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_store
|
||||
Operator::I64AtomicStore { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_store
|
||||
Operator::I32AtomicStore8 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_store8
|
||||
Operator::I32AtomicStore16 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_store16
|
||||
Operator::I64AtomicStore8 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_store8
|
||||
Operator::I64AtomicStore16 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_store16
|
||||
Operator::I64AtomicStore32 { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_store32
|
||||
Operator::I32AtomicRmwAdd { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_add_u
|
||||
Operator::I32AtomicRmwSub { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_sub
|
||||
Operator::I64AtomicRmwSub { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw8_sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw8_sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_and
|
||||
Operator::I64AtomicRmwAnd { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_and
|
||||
Operator::I32AtomicRmw8AndU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw8_and_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw8_and_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwOr { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i32_atomic_rmw_or
|
||||
Operator::I64AtomicRmwOr { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw8_or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw8_or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwXor { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_xor
|
||||
Operator::I64AtomicRmwXor { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw8_xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw8_xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i32_atomic_rmw8_xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i32_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i64_atomic_rmw8_xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i32_atomic_rmw_cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw_cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), // => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => go(&mut memarg.memory, Some(&mut v[0])), //=> visit_i64_atomic_rmw32_c
|
||||
_ => Ok(()),
|
||||
}
|
||||
}
|
||||
pub fn mem_count(o: &Operator) -> usize {
|
||||
|
|
@ -2267,11 +3004,14 @@ pub fn mem_count(o: &Operator) -> usize {
|
|||
Operator::V128Store16Lane { memory, .. } => 1,
|
||||
Operator::V128Store32Lane { memory, .. } => 1,
|
||||
Operator::V128Store64Lane { memory, .. } => 1,
|
||||
_ => 0,
|
||||
_ => match memory_arg(o) {
|
||||
None => 0,
|
||||
Some(_) => 1,
|
||||
},
|
||||
}
|
||||
}
|
||||
pub fn memory_arg(o: &Operator) -> Option<&MemoryArg>{
|
||||
match o{
|
||||
pub fn memory_arg(o: &Operator) -> Option<&MemoryArg> {
|
||||
match o {
|
||||
Operator::I32Load { memory } => Some(memory),
|
||||
Operator::I64Load { memory } => Some(memory),
|
||||
Operator::F32Load { memory } => Some(memory),
|
||||
|
|
@ -2318,6 +3058,72 @@ pub fn memory_arg(o: &Operator) -> Option<&MemoryArg>{
|
|||
Operator::V128Store16Lane { memory, .. } => Some(memory),
|
||||
Operator::V128Store32Lane { memory, .. } => Some(memory),
|
||||
Operator::V128Store64Lane { memory, .. } => Some(memory),
|
||||
_ => None
|
||||
Operator::MemoryAtomicNotify { memarg } => Some(memarg), //=> visit_memory_atomic_notify
|
||||
Operator::MemoryAtomicWait32 { memarg } => Some(memarg), //=> visit_memory_atomic_wait32
|
||||
Operator::MemoryAtomicWait64 { memarg } => Some(memarg), //=> visit_memory_atomic_wait64
|
||||
Operator::I32AtomicLoad { memarg } => Some(memarg), //=> visit_i32_atomic_load
|
||||
Operator::I64AtomicLoad { memarg } => Some(memarg), //=> visit_i64_atomic_load
|
||||
Operator::I32AtomicLoad8U { memarg } => Some(memarg), //=> visit_i32_atomic_load8_u
|
||||
Operator::I32AtomicLoad16U { memarg } => Some(memarg), //=> visit_i32_atomic_load16_u
|
||||
Operator::I64AtomicLoad8U { memarg } => Some(memarg), //=> visit_i64_atomic_load8_u
|
||||
Operator::I64AtomicLoad16U { memarg } => Some(memarg), //=> visit_i64_atomic_load16_u
|
||||
Operator::I64AtomicLoad32U { memarg } => Some(memarg), //=> visit_i64_atomic_load32_u
|
||||
Operator::I32AtomicStore { memarg } => Some(memarg), //=> visit_i32_atomic_store
|
||||
Operator::I64AtomicStore { memarg } => Some(memarg), //=> visit_i64_atomic_store
|
||||
Operator::I32AtomicStore8 { memarg } => Some(memarg), //=> visit_i32_atomic_store8
|
||||
Operator::I32AtomicStore16 { memarg } => Some(memarg), //=> visit_i32_atomic_store16
|
||||
Operator::I64AtomicStore8 { memarg } => Some(memarg), //=> visit_i64_atomic_store8
|
||||
Operator::I64AtomicStore16 { memarg } => Some(memarg), //=> visit_i64_atomic_store16
|
||||
Operator::I64AtomicStore32 { memarg } => Some(memarg), //=> visit_i64_atomic_store32
|
||||
Operator::I32AtomicRmwAdd { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_add
|
||||
Operator::I64AtomicRmwAdd { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_add
|
||||
Operator::I32AtomicRmw8AddU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_add_u
|
||||
Operator::I32AtomicRmw16AddU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw8AddU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_add_u
|
||||
Operator::I64AtomicRmw16AddU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_add_u
|
||||
Operator::I64AtomicRmw32AddU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_add_u
|
||||
Operator::I32AtomicRmwSub { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_sub
|
||||
Operator::I64AtomicRmwSub { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_sub
|
||||
Operator::I32AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_sub_u
|
||||
Operator::I32AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw8SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_sub_u
|
||||
Operator::I64AtomicRmw16SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_sub_u
|
||||
Operator::I64AtomicRmw32SubU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_sub_u
|
||||
Operator::I32AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i32_atomic_rmw_and
|
||||
Operator::I64AtomicRmwAnd { memarg } => Some(memarg), //=> visit_i64_atomic_rmw_and
|
||||
Operator::I32AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw8_and_u
|
||||
Operator::I32AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i32_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw8AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw8_and_u
|
||||
Operator::I64AtomicRmw16AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw16_and_u
|
||||
Operator::I64AtomicRmw32AndU { memarg } => Some(memarg), //=> visit_i64_atomic_rmw32_and_u
|
||||
Operator::I32AtomicRmwOr { memarg } => Some(memarg), // => visit_i32_atomic_rmw_or
|
||||
Operator::I64AtomicRmwOr { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_or
|
||||
Operator::I32AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_or_u
|
||||
Operator::I32AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw8OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_or_u
|
||||
Operator::I64AtomicRmw16OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_or_u
|
||||
Operator::I64AtomicRmw32OrU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_or_u
|
||||
Operator::I32AtomicRmwXor { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xor
|
||||
Operator::I64AtomicRmwXor { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xor
|
||||
Operator::I32AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw8_xor_u
|
||||
Operator::I32AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i32_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw8XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw8_xor_u
|
||||
Operator::I64AtomicRmw16XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xor_u
|
||||
Operator::I64AtomicRmw32XorU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xor_u
|
||||
Operator::I32AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_xchg
|
||||
Operator::I64AtomicRmwXchg { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_xchg
|
||||
Operator::I32AtomicRmw8XchgU { memarg }=> Some(memarg),// => visit_i32_atomic_rmw8_xchg_u
|
||||
Operator::I32AtomicRmw16XchgU { memarg }=> Some(memarg),// => visit_i32_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw8XchgU { memarg }=> Some(memarg),// => visit_i64_atomic_rmw8_xchg_u
|
||||
Operator::I64AtomicRmw16XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw16_xchg_u
|
||||
Operator::I64AtomicRmw32XchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_xchg_u
|
||||
Operator::I32AtomicRmwCmpxchg { memarg } => Some(memarg),//=> visit_i32_atomic_rmw_cmpxchg
|
||||
Operator::I64AtomicRmwCmpxchg { memarg } => Some(memarg),//=> visit_i64_atomic_rmw_cmpxchg
|
||||
Operator::I32AtomicRmw8CmpxchgU { memarg }=> Some(memarg),// => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
Operator::I32AtomicRmw16CmpxchgU { memarg }=> Some(memarg),// => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw8CmpxchgU { memarg }=> Some(memarg),// => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
Operator::I64AtomicRmw16CmpxchgU { memarg }=> Some(memarg),// => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
Operator::I64AtomicRmw32CmpxchgU { memarg } => Some(memarg),//=> visit_i64_atomic_rmw32_c
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
190
src/ops.rs
190
src/ops.rs
|
|
@ -650,6 +650,73 @@ pub enum Operator {
|
|||
MemoryFill {
|
||||
mem: Memory,
|
||||
},
|
||||
MemoryAtomicNotify { memarg: MemoryArg } , //=> visit_memory_atomic_notify
|
||||
MemoryAtomicWait32 { memarg: MemoryArg } , //=> visit_memory_atomic_wait32
|
||||
MemoryAtomicWait64 { memarg: MemoryArg } , //=> visit_memory_atomic_wait64
|
||||
AtomicFence, // => visit_atomic_fence
|
||||
I32AtomicLoad { memarg: MemoryArg } , //=> visit_i32_atomic_load
|
||||
I64AtomicLoad { memarg: MemoryArg } , //=> visit_i64_atomic_load
|
||||
I32AtomicLoad8U { memarg: MemoryArg } , //=> visit_i32_atomic_load8_u
|
||||
I32AtomicLoad16U { memarg: MemoryArg } , //=> visit_i32_atomic_load16_u
|
||||
I64AtomicLoad8U { memarg: MemoryArg } , //=> visit_i64_atomic_load8_u
|
||||
I64AtomicLoad16U { memarg: MemoryArg } , //=> visit_i64_atomic_load16_u
|
||||
I64AtomicLoad32U { memarg: MemoryArg } , //=> visit_i64_atomic_load32_u
|
||||
I32AtomicStore { memarg: MemoryArg } , //=> visit_i32_atomic_store
|
||||
I64AtomicStore { memarg: MemoryArg } , //=> visit_i64_atomic_store
|
||||
I32AtomicStore8 { memarg: MemoryArg } , //=> visit_i32_atomic_store8
|
||||
I32AtomicStore16 { memarg: MemoryArg } , //=> visit_i32_atomic_store16
|
||||
I64AtomicStore8 { memarg: MemoryArg } , //=> visit_i64_atomic_store8
|
||||
I64AtomicStore16 { memarg: MemoryArg } , //=> visit_i64_atomic_store16
|
||||
I64AtomicStore32 { memarg: MemoryArg } , //=> visit_i64_atomic_store32
|
||||
I32AtomicRmwAdd { memarg: MemoryArg } , //=> visit_i32_atomic_rmw_add
|
||||
I64AtomicRmwAdd { memarg: MemoryArg } , //=> visit_i64_atomic_rmw_add
|
||||
I32AtomicRmw8AddU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw8_add_u
|
||||
I32AtomicRmw16AddU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw16_add_u
|
||||
I64AtomicRmw8AddU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw8_add_u
|
||||
I64AtomicRmw16AddU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw16_add_u
|
||||
I64AtomicRmw32AddU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw32_add_u
|
||||
I32AtomicRmwSub { memarg: MemoryArg } , //=> visit_i32_atomic_rmw_sub
|
||||
I64AtomicRmwSub { memarg: MemoryArg } , //=> visit_i64_atomic_rmw_sub
|
||||
I32AtomicRmw8SubU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw8_sub_u
|
||||
I32AtomicRmw16SubU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw16_sub_u
|
||||
I64AtomicRmw8SubU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw8_sub_u
|
||||
I64AtomicRmw16SubU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw16_sub_u
|
||||
I64AtomicRmw32SubU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw32_sub_u
|
||||
I32AtomicRmwAnd { memarg: MemoryArg } , //=> visit_i32_atomic_rmw_and
|
||||
I64AtomicRmwAnd { memarg: MemoryArg } , //=> visit_i64_atomic_rmw_and
|
||||
I32AtomicRmw8AndU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw8_and_u
|
||||
I32AtomicRmw16AndU { memarg: MemoryArg } , //=> visit_i32_atomic_rmw16_and_u
|
||||
I64AtomicRmw8AndU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw8_and_u
|
||||
I64AtomicRmw16AndU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw16_and_u
|
||||
I64AtomicRmw32AndU { memarg: MemoryArg } , //=> visit_i64_atomic_rmw32_and_u
|
||||
I32AtomicRmwOr { memarg: MemoryArg }, // => visit_i32_atomic_rmw_or
|
||||
I64AtomicRmwOr { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw_or
|
||||
I32AtomicRmw8OrU { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw8_or_u
|
||||
I32AtomicRmw16OrU { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw16_or_u
|
||||
I64AtomicRmw8OrU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw8_or_u
|
||||
I64AtomicRmw16OrU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw16_or_u
|
||||
I64AtomicRmw32OrU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw32_or_u
|
||||
I32AtomicRmwXor { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw_xor
|
||||
I64AtomicRmwXor { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw_xor
|
||||
I32AtomicRmw8XorU { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw8_xor_u
|
||||
I32AtomicRmw16XorU { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw16_xor_u
|
||||
I64AtomicRmw8XorU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw8_xor_u
|
||||
I64AtomicRmw16XorU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw16_xor_u
|
||||
I64AtomicRmw32XorU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw32_xor_u
|
||||
I32AtomicRmwXchg { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw_xchg
|
||||
I64AtomicRmwXchg { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw_xchg
|
||||
I32AtomicRmw8XchgU { memarg: MemoryArg },// => visit_i32_atomic_rmw8_xchg_u
|
||||
I32AtomicRmw16XchgU { memarg: MemoryArg },// => visit_i32_atomic_rmw16_xchg_u
|
||||
I64AtomicRmw8XchgU { memarg: MemoryArg },// => visit_i64_atomic_rmw8_xchg_u
|
||||
I64AtomicRmw16XchgU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw16_xchg_u
|
||||
I64AtomicRmw32XchgU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw32_xchg_u
|
||||
I32AtomicRmwCmpxchg { memarg: MemoryArg } ,//=> visit_i32_atomic_rmw_cmpxchg
|
||||
I64AtomicRmwCmpxchg { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw_cmpxchg
|
||||
I32AtomicRmw8CmpxchgU { memarg: MemoryArg },// => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
I32AtomicRmw16CmpxchgU { memarg: MemoryArg },// => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
I64AtomicRmw8CmpxchgU { memarg: MemoryArg },// => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
I64AtomicRmw16CmpxchgU { memarg: MemoryArg },// => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
I64AtomicRmw32CmpxchgU { memarg: MemoryArg } ,//=> visit_i64_atomic_rmw32_c
|
||||
}
|
||||
|
||||
#[test]
|
||||
|
|
@ -1297,6 +1364,129 @@ impl<'a, 'b> std::convert::TryFrom<&'b wasmparser::Operator<'a>> for Operator {
|
|||
&wasmparser::Operator::RefNull { hty } => Ok(Operator::RefNull {
|
||||
ty: wasmparser::RefType::new(true, hty).unwrap().into(),
|
||||
}),
|
||||
&wasmparser::Operator:: MemoryAtomicNotify { memarg } => Ok(Operator::MemoryAtomicNotify { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: MemoryAtomicWait32 { memarg } => Ok(Operator::MemoryAtomicWait32 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: MemoryAtomicWait64 { memarg } => Ok(Operator::MemoryAtomicWait64 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: AtomicFence => Ok(Operator::AtomicFence),
|
||||
&wasmparser::Operator:: I32AtomicLoad { memarg } => Ok(Operator::I32AtomicLoad { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicLoad { memarg } => Ok(Operator::I64AtomicLoad { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicLoad8U { memarg } => Ok(Operator::I32AtomicLoad8U { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicLoad16U { memarg } => Ok(Operator::I32AtomicLoad16U { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicLoad8U { memarg } => Ok(Operator::I64AtomicLoad8U { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicLoad16U { memarg } => Ok(Operator::I64AtomicLoad16U { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicLoad32U { memarg } => Ok(Operator::I64AtomicLoad32U { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicStore { memarg } => visit_i32_atomic_store
|
||||
// &wasmparser::Operator:: I64AtomicStore { memarg } => visit_i64_atomic_store
|
||||
// &wasmparser::Operator:: I32AtomicStore8 { memarg } => visit_i32_atomic_store8
|
||||
// &wasmparser::Operator:: I32AtomicStore16 { memarg } => visit_i32_atomic_store16
|
||||
// &wasmparser::Operator:: I64AtomicStore8 { memarg } => visit_i64_atomic_store8
|
||||
// &wasmparser::Operator:: I64AtomicStore16 { memarg } => visit_i64_atomic_store16
|
||||
// &wasmparser::Operator:: I64AtomicStore32 { memarg } => visit_i64_atomic_store32
|
||||
&wasmparser::Operator:: I32AtomicStore { memarg } => Ok(Operator::I32AtomicStore { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicStore { memarg } => Ok(Operator::I64AtomicStore { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicStore8 { memarg } => Ok(Operator::I32AtomicStore8 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicStore16 { memarg } => Ok(Operator::I32AtomicStore16 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicStore8 { memarg } => Ok(Operator::I64AtomicStore8 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicStore16 { memarg } => Ok(Operator::I64AtomicStore16 { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicStore32 { memarg } => Ok(Operator::I64AtomicStore32 { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwAdd { memarg } => visit_i32_atomic_rmw_add
|
||||
// &wasmparser::Operator:: I64AtomicRmwAdd { memarg } => visit_i64_atomic_rmw_add
|
||||
// &wasmparser::Operator:: I32AtomicRmw8AddU { memarg } => visit_i32_atomic_rmw8_add_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16AddU { memarg } => visit_i32_atomic_rmw16_add_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8AddU { memarg } => visit_i64_atomic_rmw8_add_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16AddU { memarg } => visit_i64_atomic_rmw16_add_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32AddU { memarg } => visit_i64_atomic_rmw32_add_u
|
||||
&wasmparser::Operator:: I32AtomicRmwAdd { memarg } => Ok(Operator::I32AtomicRmwAdd { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwAdd { memarg } => Ok(Operator::I64AtomicRmwAdd { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8AddU { memarg } => Ok(Operator::I32AtomicRmw8AddU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16AddU { memarg } => Ok(Operator::I32AtomicRmw16AddU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8AddU { memarg } => Ok(Operator::I64AtomicRmw8AddU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16AddU { memarg } => Ok(Operator::I64AtomicRmw16AddU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32AddU { memarg } => Ok(Operator::I64AtomicRmw32AddU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwSub { memarg } => visit_i32_atomic_rmw_sub
|
||||
// &wasmparser::Operator:: I64AtomicRmwSub { memarg } => visit_i64_atomic_rmw_sub
|
||||
// &wasmparser::Operator:: I32AtomicRmw8SubU { memarg } => visit_i32_atomic_rmw8_sub_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16SubU { memarg } => visit_i32_atomic_rmw16_sub_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8SubU { memarg } => visit_i64_atomic_rmw8_sub_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16SubU { memarg } => visit_i64_atomic_rmw16_sub_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32SubU { memarg } => visit_i64_atomic_rmw32_sub_u
|
||||
&wasmparser::Operator:: I32AtomicRmwSub { memarg } => Ok(Operator::I32AtomicRmwSub { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwSub { memarg } => Ok(Operator::I64AtomicRmwSub { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8SubU { memarg } => Ok(Operator::I32AtomicRmw8SubU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16SubU { memarg } => Ok(Operator::I32AtomicRmw16SubU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8SubU { memarg } => Ok(Operator::I64AtomicRmw8SubU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16SubU { memarg } => Ok(Operator::I64AtomicRmw16SubU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32SubU { memarg } => Ok(Operator::I64AtomicRmw32SubU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwAnd { memarg } => visit_i32_atomic_rmw_and
|
||||
// &wasmparser::Operator:: I64AtomicRmwAnd { memarg } => visit_i64_atomic_rmw_and
|
||||
// &wasmparser::Operator:: I32AtomicRmw8AndU { memarg } => visit_i32_atomic_rmw8_and_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16AndU { memarg } => visit_i32_atomic_rmw16_and_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8AndU { memarg } => visit_i64_atomic_rmw8_and_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16AndU { memarg } => visit_i64_atomic_rmw16_and_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32AndU { memarg } => visit_i64_atomic_rmw32_and_u
|
||||
&wasmparser::Operator:: I32AtomicRmwAnd { memarg } => Ok(Operator::I32AtomicRmwAnd { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwAnd { memarg } => Ok(Operator::I64AtomicRmwAnd { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8AndU { memarg } => Ok(Operator::I32AtomicRmw8AndU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16AndU { memarg } => Ok(Operator::I32AtomicRmw16AndU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8AndU { memarg } => Ok(Operator::I64AtomicRmw8AndU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16AndU { memarg } => Ok(Operator::I64AtomicRmw16AndU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32AndU { memarg } => Ok(Operator::I64AtomicRmw32AndU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwOr { memarg } => visit_i32_atomic_rmw_or
|
||||
// &wasmparser::Operator:: I64AtomicRmwOr { memarg } => visit_i64_atomic_rmw_or
|
||||
// &wasmparser::Operator:: I32AtomicRmw8OrU { memarg } => visit_i32_atomic_rmw8_or_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16OrU { memarg } => visit_i32_atomic_rmw16_or_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8OrU { memarg } => visit_i64_atomic_rmw8_or_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16OrU { memarg } => visit_i64_atomic_rmw16_or_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32OrU { memarg } => visit_i64_atomic_rmw32_or_u
|
||||
&wasmparser::Operator:: I32AtomicRmwOr { memarg } => Ok(Operator::I32AtomicRmwOr { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwOr { memarg } => Ok(Operator::I64AtomicRmwOr { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8OrU { memarg } => Ok(Operator::I32AtomicRmw8OrU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16OrU { memarg } => Ok(Operator::I32AtomicRmw16OrU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8OrU { memarg } => Ok(Operator::I64AtomicRmw8OrU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16OrU { memarg } => Ok(Operator::I64AtomicRmw16OrU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32OrU { memarg } => Ok(Operator::I64AtomicRmw32OrU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwXor { memarg } => visit_i32_atomic_rmw_xor
|
||||
// &wasmparser::Operator:: I64AtomicRmwXor { memarg } => visit_i64_atomic_rmw_xor
|
||||
// &wasmparser::Operator:: I32AtomicRmw8XorU { memarg } => visit_i32_atomic_rmw8_xor_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16XorU { memarg } => visit_i32_atomic_rmw16_xor_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8XorU { memarg } => visit_i64_atomic_rmw8_xor_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16XorU { memarg } => visit_i64_atomic_rmw16_xor_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32XorU { memarg } => visit_i64_atomic_rmw32_xor_u
|
||||
&wasmparser::Operator:: I32AtomicRmwXor { memarg } => Ok(Operator::I32AtomicRmwXor { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwXor { memarg } => Ok(Operator::I64AtomicRmwXor { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8XorU { memarg } => Ok(Operator::I32AtomicRmw8XorU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16XorU { memarg } => Ok(Operator::I32AtomicRmw16XorU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8XorU { memarg } => Ok(Operator::I64AtomicRmw8XorU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16XorU { memarg } => Ok(Operator::I64AtomicRmw16XorU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32XorU { memarg } => Ok(Operator::I64AtomicRmw32XorU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwXchg { memarg } => visit_i32_atomic_rmw_xchg
|
||||
// &wasmparser::Operator:: I64AtomicRmwXchg { memarg } => visit_i64_atomic_rmw_xchg
|
||||
// &wasmparser::Operator:: I32AtomicRmw8XchgU { memarg } => visit_i32_atomic_rmw8_xchg_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16XchgU { memarg } => visit_i32_atomic_rmw16_xchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8XchgU { memarg } => visit_i64_atomic_rmw8_xchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16XchgU { memarg } => visit_i64_atomic_rmw16_xchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32XchgU { memarg } => visit_i64_atomic_rmw32_xchg_u
|
||||
&wasmparser::Operator:: I32AtomicRmwXchg { memarg } => Ok(Operator::I32AtomicRmwXchg { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwXchg { memarg } => Ok(Operator::I64AtomicRmwXchg { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8XchgU { memarg } => Ok(Operator::I32AtomicRmw8XchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16XchgU { memarg } => Ok(Operator::I32AtomicRmw16XchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8XchgU { memarg } => Ok(Operator::I64AtomicRmw8XchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16XchgU { memarg } => Ok(Operator::I64AtomicRmw16XchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32XchgU { memarg } => Ok(Operator::I64AtomicRmw32XchgU { memarg: memarg.into() }),
|
||||
// &wasmparser::Operator:: I32AtomicRmwCmpxchg { memarg } => visit_i32_atomic_rmw_cmpxchg
|
||||
// &wasmparser::Operator:: I64AtomicRmwCmpxchg { memarg } => visit_i64_atomic_rmw_cmpxchg
|
||||
// &wasmparser::Operator:: I32AtomicRmw8CmpxchgU { memarg } => visit_i32_atomic_rmw8_cmpxchg_u
|
||||
// &wasmparser::Operator:: I32AtomicRmw16CmpxchgU { memarg } => visit_i32_atomic_rmw16_cmpxchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw8CmpxchgU { memarg } => visit_i64_atomic_rmw8_cmpxchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw16CmpxchgU { memarg } => visit_i64_atomic_rmw16_cmpxchg_u
|
||||
// &wasmparser::Operator:: I64AtomicRmw32CmpxchgU { memarg } => visit_i64_atomic_rmw32_cmpxchg_u
|
||||
&wasmparser::Operator:: I32AtomicRmwCmpxchg { memarg } => Ok(Operator::I32AtomicRmwCmpxchg { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmwCmpxchg { memarg } => Ok(Operator::I64AtomicRmwCmpxchg { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw8CmpxchgU { memarg } => Ok(Operator::I32AtomicRmw8CmpxchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I32AtomicRmw16CmpxchgU { memarg } => Ok(Operator::I32AtomicRmw16CmpxchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw8CmpxchgU { memarg } => Ok(Operator::I64AtomicRmw8CmpxchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw16CmpxchgU { memarg } => Ok(Operator::I64AtomicRmw16CmpxchgU { memarg: memarg.into() }),
|
||||
&wasmparser::Operator:: I64AtomicRmw32CmpxchgU { memarg } => Ok(Operator::I64AtomicRmw32CmpxchgU { memarg: memarg.into() }),
|
||||
_ => Err(()),
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -105,6 +105,7 @@ pub fn metafuse_all(m: &mut Module, cfg: &mut impl Cfg) {
|
|||
.rev()
|
||||
{
|
||||
let memory64 = mem.1.memory64;
|
||||
let shared = mem.1.shared;
|
||||
b.insert(
|
||||
mem.0,
|
||||
std::mem::replace(
|
||||
|
|
@ -114,6 +115,7 @@ pub fn metafuse_all(m: &mut Module, cfg: &mut impl Cfg) {
|
|||
maximum_pages: None,
|
||||
segments: vec![],
|
||||
memory64,
|
||||
shared
|
||||
},
|
||||
),
|
||||
);
|
||||
|
|
|
|||
Loading…
Reference in a new issue