From 3f9e7a560f40c29c1de6389f1f6371cde261adb7 Mon Sep 17 00:00:00 2001 From: Graham Kelly Date: Wed, 5 Jun 2024 14:30:46 -0400 Subject: [PATCH] fix --- src/op_traits.rs | 56 ++++++++++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/src/op_traits.rs b/src/op_traits.rs index 2fd7b3b..69060c1 100644 --- a/src/op_traits.rs +++ b/src/op_traits.rs @@ -2278,12 +2278,12 @@ pub fn memory_arg(o: &Operator) -> Option<&MemoryArg>{ Operator::F64Load { memory } => Some(memory), Operator::I32Load8S { memory } => Some(memory), Operator::I32Load8U { memory } => Some(memory), - Operator::I32LoadSome(memory)6S { memory } => Some(memory), - Operator::I32LoadSome(memory)6U { memory } => Some(memory), + Operator::I32Load16S { memory } => Some(memory), + Operator::I32Load16U { memory } => Some(memory), Operator::I64Load8S { memory } => Some(memory), Operator::I64Load8U { memory } => Some(memory), - Operator::I64LoadSome(memory)6S { memory } => Some(memory), - Operator::I64LoadSome(memory)6U { memory } => Some(memory), + Operator::I64Load16S { memory } => Some(memory), + Operator::I64Load16U { memory } => Some(memory), Operator::I64Load32S { memory } => Some(memory), Operator::I64Load32U { memory } => Some(memory), Operator::I32Store { memory } => Some(memory), @@ -2291,33 +2291,33 @@ pub fn memory_arg(o: &Operator) -> Option<&MemoryArg>{ Operator::F32Store { memory } => Some(memory), Operator::F64Store { memory } => Some(memory), Operator::I32Store8 { memory } => Some(memory), - Operator::I32StoreSome(memory)6 { memory } => Some(memory), + Operator::I32Store16 { memory } => Some(memory), Operator::I64Store8 { memory } => Some(memory), - Operator::I64StoreSome(memory)6 { memory } => Some(memory), + Operator::I64Store16 { memory } => Some(memory), Operator::I64Store32 { memory } => Some(memory), - Operator::VSome(memory)28Load { memory } => Some(memory), - Operator::VSome(memory)28Load8x8S { memory } => Some(memory), - Operator::VSome(memory)28Load8x8U { memory } => Some(memory), - Operator::VSome(memory)28LoadSome(memory)6x4S { memory } => Some(memory), - Operator::VSome(memory)28LoadSome(memory)6x4U { memory } => Some(memory), - Operator::VSome(memory)28Load32x2S { memory } => Some(memory), - Operator::VSome(memory)28Load32x2U { memory } => Some(memory), - Operator::VSome(memory)28Load8Splat { memory } => Some(memory), - Operator::VSome(memory)28LoadSome(memory)6Splat { memory } => Some(memory), - Operator::VSome(memory)28Load32Splat { memory } => Some(memory), - Operator::VSome(memory)28Load64Splat { memory } => Some(memory), - Operator::VSome(memory)28Load32Zero { memory } => Some(memory), - Operator::VSome(memory)28Load64Zero { memory } => Some(memory), - Operator::VSome(memory)28Store { memory } => Some(memory), - Operator::VSome(memory)28Load8Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28LoadSome(memory)6Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28Load32Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28Load64Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28Store8Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28StoreSome(memory)6Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28Store32Lane { memory, .. } => Some(memory), - Operator::VSome(memory)28Store64Lane { memory, .. } => Some(memory), + Operator::V128Load { memory } => Some(memory), + Operator::V128Load8x8S { memory } => Some(memory), + Operator::V128Load8x8U { memory } => Some(memory), + Operator::V128Load16x4S { memory } => Some(memory), + Operator::V128Load16x4U { memory } => Some(memory), + Operator::V128Load32x2S { memory } => Some(memory), + Operator::V128Load32x2U { memory } => Some(memory), + Operator::V128Load8Splat { memory } => Some(memory), + Operator::V128Load16Splat { memory } => Some(memory), + Operator::V128Load32Splat { memory } => Some(memory), + Operator::V128Load64Splat { memory } => Some(memory), + Operator::V128Load32Zero { memory } => Some(memory), + Operator::V128Load64Zero { memory } => Some(memory), + Operator::V128Store { memory } => Some(memory), + Operator::V128Load8Lane { memory, .. } => Some(memory), + Operator::V128Load16Lane { memory, .. } => Some(memory), + Operator::V128Load32Lane { memory, .. } => Some(memory), + Operator::V128Load64Lane { memory, .. } => Some(memory), + Operator::V128Store8Lane { memory, .. } => Some(memory), + Operator::V128Store16Lane { memory, .. } => Some(memory), + Operator::V128Store32Lane { memory, .. } => Some(memory), + Operator::V128Store64Lane { memory, .. } => Some(memory), _ => None } } \ No newline at end of file