Add support for Wasm-SIMD ops.
This commit is contained in:
Chris Fallin
parent
1878db1c1d
commit
cea6e7a403
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@ -514,6 +514,401 @@ impl<'a> WasmFuncBackend<'a> {
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Operator::MemoryGrow { mem } => {
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Operator::MemoryGrow { mem } => {
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Some(wasm_encoder::Instruction::MemoryGrow(mem.index() as u32))
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Some(wasm_encoder::Instruction::MemoryGrow(mem.index() as u32))
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}
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}
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Operator::V128Load { memory } => Some(wasm_encoder::Instruction::V128Load(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load8x8S { memory } => Some(wasm_encoder::Instruction::V128Load8x8S(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load8x8U { memory } => Some(wasm_encoder::Instruction::V128Load8x8U(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load16x4S { memory } => Some(wasm_encoder::Instruction::V128Load16x4S(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load16x4U { memory } => Some(wasm_encoder::Instruction::V128Load16x4U(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load32x2S { memory } => Some(wasm_encoder::Instruction::V128Load32x2S(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load32x2U { memory } => Some(wasm_encoder::Instruction::V128Load32x2U(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load8Splat { memory } => Some(wasm_encoder::Instruction::V128Load8Splat(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load16Splat { memory } => Some(
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wasm_encoder::Instruction::V128Load16Splat(wasm_encoder::MemArg::from(*memory)),
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),
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Operator::V128Load32Splat { memory } => Some(
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wasm_encoder::Instruction::V128Load32Splat(wasm_encoder::MemArg::from(*memory)),
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),
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Operator::V128Load64Splat { memory } => Some(
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wasm_encoder::Instruction::V128Load64Splat(wasm_encoder::MemArg::from(*memory)),
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),
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Operator::V128Load32Zero { memory } => Some(wasm_encoder::Instruction::V128Load32Zero(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load64Zero { memory } => Some(wasm_encoder::Instruction::V128Load64Zero(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Store { memory } => Some(wasm_encoder::Instruction::V128Store(
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wasm_encoder::MemArg::from(*memory),
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)),
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Operator::V128Load8Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Load8Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Load16Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Load16Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Load32Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Load32Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Load64Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Load64Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Store8Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Store8Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Store16Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Store16Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Store32Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Store32Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Store64Lane { memory, lane } => {
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Some(wasm_encoder::Instruction::V128Store64Lane {
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memarg: wasm_encoder::MemArg::from(*memory),
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lane: *lane,
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})
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}
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Operator::V128Const { value } => {
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Some(wasm_encoder::Instruction::V128Const(*value as i128))
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}
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Operator::I8x16Shuffle { lanes } => {
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Some(wasm_encoder::Instruction::I8x16Shuffle(lanes.clone()))
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}
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Operator::I8x16ExtractLaneS { lane } => {
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Some(wasm_encoder::Instruction::I8x16ExtractLaneS(*lane))
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}
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Operator::I8x16ExtractLaneU { lane } => {
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Some(wasm_encoder::Instruction::I8x16ExtractLaneU(*lane))
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}
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Operator::I8x16ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::I8x16ReplaceLane(*lane))
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}
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Operator::I16x8ExtractLaneS { lane } => {
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Some(wasm_encoder::Instruction::I16x8ExtractLaneS(*lane))
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}
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Operator::I16x8ExtractLaneU { lane } => {
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Some(wasm_encoder::Instruction::I16x8ExtractLaneU(*lane))
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}
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Operator::I16x8ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::I16x8ReplaceLane(*lane))
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}
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Operator::I32x4ExtractLane { lane } => {
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Some(wasm_encoder::Instruction::I32x4ExtractLane(*lane))
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}
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Operator::I32x4ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::I32x4ReplaceLane(*lane))
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}
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Operator::I64x2ExtractLane { lane } => {
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Some(wasm_encoder::Instruction::I64x2ExtractLane(*lane))
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}
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Operator::I64x2ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::I64x2ReplaceLane(*lane))
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}
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Operator::F32x4ExtractLane { lane } => {
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Some(wasm_encoder::Instruction::F32x4ExtractLane(*lane))
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}
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Operator::F32x4ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::F32x4ReplaceLane(*lane))
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}
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Operator::F64x2ExtractLane { lane } => {
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Some(wasm_encoder::Instruction::F64x2ExtractLane(*lane))
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}
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Operator::F64x2ReplaceLane { lane } => {
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Some(wasm_encoder::Instruction::F64x2ReplaceLane(*lane))
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}
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Operator::I8x16Swizzle => Some(wasm_encoder::Instruction::I8x16Swizzle),
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Operator::I8x16Splat => Some(wasm_encoder::Instruction::I8x16Splat),
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Operator::I16x8Splat => Some(wasm_encoder::Instruction::I16x8Splat),
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Operator::I32x4Splat => Some(wasm_encoder::Instruction::I32x4Splat),
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Operator::I64x2Splat => Some(wasm_encoder::Instruction::I64x2Splat),
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Operator::F32x4Splat => Some(wasm_encoder::Instruction::F32x4Splat),
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Operator::F64x2Splat => Some(wasm_encoder::Instruction::F64x2Splat),
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Operator::I8x16Eq => Some(wasm_encoder::Instruction::I8x16Eq),
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Operator::I8x16Ne => Some(wasm_encoder::Instruction::I8x16Ne),
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Operator::I8x16LtS => Some(wasm_encoder::Instruction::I8x16LtS),
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Operator::I8x16LtU => Some(wasm_encoder::Instruction::I8x16LtU),
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Operator::I8x16GtS => Some(wasm_encoder::Instruction::I8x16GtS),
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Operator::I8x16GtU => Some(wasm_encoder::Instruction::I8x16GtU),
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Operator::I8x16LeS => Some(wasm_encoder::Instruction::I8x16LeS),
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Operator::I8x16LeU => Some(wasm_encoder::Instruction::I8x16LeU),
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Operator::I8x16GeS => Some(wasm_encoder::Instruction::I8x16GeS),
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Operator::I8x16GeU => Some(wasm_encoder::Instruction::I8x16GeU),
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Operator::I16x8Eq => Some(wasm_encoder::Instruction::I16x8Eq),
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Operator::I16x8Ne => Some(wasm_encoder::Instruction::I16x8Ne),
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Operator::I16x8LtS => Some(wasm_encoder::Instruction::I16x8LtS),
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Operator::I16x8LtU => Some(wasm_encoder::Instruction::I16x8LtU),
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Operator::I16x8GtS => Some(wasm_encoder::Instruction::I16x8GtS),
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Operator::I16x8GtU => Some(wasm_encoder::Instruction::I16x8GtU),
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Operator::I16x8LeS => Some(wasm_encoder::Instruction::I16x8LeS),
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Operator::I16x8LeU => Some(wasm_encoder::Instruction::I16x8LeU),
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Operator::I16x8GeS => Some(wasm_encoder::Instruction::I16x8GeS),
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Operator::I16x8GeU => Some(wasm_encoder::Instruction::I16x8GeU),
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Operator::I32x4Eq => Some(wasm_encoder::Instruction::I32x4Eq),
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Operator::I32x4Ne => Some(wasm_encoder::Instruction::I32x4Ne),
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Operator::I32x4LtS => Some(wasm_encoder::Instruction::I32x4LtS),
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Operator::I32x4LtU => Some(wasm_encoder::Instruction::I32x4LtU),
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Operator::I32x4GtS => Some(wasm_encoder::Instruction::I32x4GtS),
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Operator::I32x4GtU => Some(wasm_encoder::Instruction::I32x4GtU),
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Operator::I32x4LeS => Some(wasm_encoder::Instruction::I32x4LeS),
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Operator::I32x4LeU => Some(wasm_encoder::Instruction::I32x4LeU),
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Operator::I32x4GeS => Some(wasm_encoder::Instruction::I32x4GeS),
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Operator::I32x4GeU => Some(wasm_encoder::Instruction::I32x4GeU),
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Operator::I64x2Eq => Some(wasm_encoder::Instruction::I64x2Eq),
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Operator::I64x2Ne => Some(wasm_encoder::Instruction::I64x2Ne),
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Operator::I64x2LtS => Some(wasm_encoder::Instruction::I64x2LtS),
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Operator::I64x2GtS => Some(wasm_encoder::Instruction::I64x2GtS),
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Operator::I64x2LeS => Some(wasm_encoder::Instruction::I64x2LeS),
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Operator::I64x2GeS => Some(wasm_encoder::Instruction::I64x2GeS),
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Operator::F32x4Eq => Some(wasm_encoder::Instruction::F32x4Eq),
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Operator::F32x4Ne => Some(wasm_encoder::Instruction::F32x4Ne),
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Operator::F32x4Lt => Some(wasm_encoder::Instruction::F32x4Lt),
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Operator::F32x4Gt => Some(wasm_encoder::Instruction::F32x4Gt),
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Operator::F32x4Le => Some(wasm_encoder::Instruction::F32x4Le),
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Operator::F32x4Ge => Some(wasm_encoder::Instruction::F32x4Ge),
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Operator::F64x2Eq => Some(wasm_encoder::Instruction::F64x2Eq),
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Operator::F64x2Ne => Some(wasm_encoder::Instruction::F64x2Ne),
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Operator::F64x2Lt => Some(wasm_encoder::Instruction::F64x2Lt),
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Operator::F64x2Gt => Some(wasm_encoder::Instruction::F64x2Gt),
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Operator::F64x2Le => Some(wasm_encoder::Instruction::F64x2Le),
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Operator::F64x2Ge => Some(wasm_encoder::Instruction::F64x2Ge),
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Operator::V128Not => Some(wasm_encoder::Instruction::V128Not),
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Operator::V128And => Some(wasm_encoder::Instruction::V128And),
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Operator::V128AndNot => Some(wasm_encoder::Instruction::V128AndNot),
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Operator::V128Or => Some(wasm_encoder::Instruction::V128Or),
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Operator::V128Xor => Some(wasm_encoder::Instruction::V128Xor),
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Operator::V128Bitselect => Some(wasm_encoder::Instruction::V128Bitselect),
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Operator::V128AnyTrue => Some(wasm_encoder::Instruction::V128AnyTrue),
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Operator::I8x16Abs => Some(wasm_encoder::Instruction::I8x16Abs),
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Operator::I8x16Neg => Some(wasm_encoder::Instruction::I8x16Neg),
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Operator::I8x16Popcnt => Some(wasm_encoder::Instruction::I8x16Popcnt),
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Operator::I8x16AllTrue => Some(wasm_encoder::Instruction::I8x16AllTrue),
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Operator::I8x16Bitmask => Some(wasm_encoder::Instruction::I8x16Bitmask),
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Operator::I8x16NarrowI16x8S => Some(wasm_encoder::Instruction::I8x16NarrowI16x8S),
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Operator::I8x16NarrowI16x8U => Some(wasm_encoder::Instruction::I8x16NarrowI16x8U),
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Operator::I8x16Shl => Some(wasm_encoder::Instruction::I8x16Shl),
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Operator::I8x16ShrS => Some(wasm_encoder::Instruction::I8x16ShrS),
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Operator::I8x16ShrU => Some(wasm_encoder::Instruction::I8x16ShrU),
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Operator::I8x16Add => Some(wasm_encoder::Instruction::I8x16Add),
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Operator::I8x16AddSatS => Some(wasm_encoder::Instruction::I8x16AddSatS),
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Operator::I8x16AddSatU => Some(wasm_encoder::Instruction::I8x16AddSatU),
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Operator::I8x16Sub => Some(wasm_encoder::Instruction::I8x16Sub),
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Operator::I8x16SubSatS => Some(wasm_encoder::Instruction::I8x16SubSatS),
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Operator::I8x16SubSatU => Some(wasm_encoder::Instruction::I8x16SubSatU),
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Operator::I8x16MinS => Some(wasm_encoder::Instruction::I8x16MinS),
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Operator::I8x16MinU => Some(wasm_encoder::Instruction::I8x16MinU),
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Operator::I8x16MaxS => Some(wasm_encoder::Instruction::I8x16MaxS),
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Operator::I8x16MaxU => Some(wasm_encoder::Instruction::I8x16MaxU),
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Operator::I8x16AvgrU => Some(wasm_encoder::Instruction::I8x16AvgrU),
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Operator::I16x8ExtAddPairwiseI8x16S => {
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Some(wasm_encoder::Instruction::I16x8ExtAddPairwiseI8x16S)
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}
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Operator::I16x8ExtAddPairwiseI8x16U => {
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Some(wasm_encoder::Instruction::I16x8ExtAddPairwiseI8x16U)
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}
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Operator::I16x8Abs => Some(wasm_encoder::Instruction::I16x8Abs),
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Operator::I16x8Neg => Some(wasm_encoder::Instruction::I16x8Neg),
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Operator::I16x8Q15MulrSatS => Some(wasm_encoder::Instruction::I16x8Q15MulrSatS),
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Operator::I16x8AllTrue => Some(wasm_encoder::Instruction::I16x8AllTrue),
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Operator::I16x8Bitmask => Some(wasm_encoder::Instruction::I16x8Bitmask),
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Operator::I16x8NarrowI32x4S => Some(wasm_encoder::Instruction::I16x8NarrowI32x4S),
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Operator::I16x8NarrowI32x4U => Some(wasm_encoder::Instruction::I16x8NarrowI32x4U),
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Operator::I16x8ExtendLowI8x16S => Some(wasm_encoder::Instruction::I16x8ExtendLowI8x16S),
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Operator::I16x8ExtendHighI8x16S => {
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Some(wasm_encoder::Instruction::I16x8ExtendHighI8x16S)
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}
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Operator::I16x8ExtendLowI8x16U => Some(wasm_encoder::Instruction::I16x8ExtendLowI8x16U),
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Operator::I16x8ExtendHighI8x16U => {
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Some(wasm_encoder::Instruction::I16x8ExtendHighI8x16U)
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}
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Operator::I16x8Shl => Some(wasm_encoder::Instruction::I16x8Shl),
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Operator::I16x8ShrS => Some(wasm_encoder::Instruction::I16x8ShrS),
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Operator::I16x8ShrU => Some(wasm_encoder::Instruction::I16x8ShrU),
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Operator::I16x8Add => Some(wasm_encoder::Instruction::I16x8Add),
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Operator::I16x8AddSatS => Some(wasm_encoder::Instruction::I16x8AddSatS),
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Operator::I16x8AddSatU => Some(wasm_encoder::Instruction::I16x8AddSatU),
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Operator::I16x8Sub => Some(wasm_encoder::Instruction::I16x8Sub),
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Operator::I16x8SubSatS => Some(wasm_encoder::Instruction::I16x8SubSatS),
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Operator::I16x8SubSatU => Some(wasm_encoder::Instruction::I16x8SubSatU),
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Operator::I16x8Mul => Some(wasm_encoder::Instruction::I16x8Mul),
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Operator::I16x8MinS => Some(wasm_encoder::Instruction::I16x8MinS),
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Operator::I16x8MinU => Some(wasm_encoder::Instruction::I16x8MinU),
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|
Operator::I16x8MaxS => Some(wasm_encoder::Instruction::I16x8MaxS),
|
||||||
|
Operator::I16x8MaxU => Some(wasm_encoder::Instruction::I16x8MaxU),
|
||||||
|
Operator::I16x8AvgrU => Some(wasm_encoder::Instruction::I16x8AvgrU),
|
||||||
|
Operator::I16x8ExtMulLowI8x16S => Some(wasm_encoder::Instruction::I16x8ExtMulLowI8x16S),
|
||||||
|
Operator::I16x8ExtMulHighI8x16S => {
|
||||||
|
Some(wasm_encoder::Instruction::I16x8ExtMulHighI8x16S)
|
||||||
|
}
|
||||||
|
Operator::I16x8ExtMulLowI8x16U => Some(wasm_encoder::Instruction::I16x8ExtMulLowI8x16U),
|
||||||
|
Operator::I16x8ExtMulHighI8x16U => {
|
||||||
|
Some(wasm_encoder::Instruction::I16x8ExtMulHighI8x16U)
|
||||||
|
}
|
||||||
|
|
||||||
|
Operator::I32x4ExtAddPairwiseI16x8S => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtAddPairwiseI16x8S)
|
||||||
|
}
|
||||||
|
Operator::I32x4ExtAddPairwiseI16x8U => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtAddPairwiseI16x8U)
|
||||||
|
}
|
||||||
|
Operator::I32x4Abs => Some(wasm_encoder::Instruction::I32x4Abs),
|
||||||
|
Operator::I32x4Neg => Some(wasm_encoder::Instruction::I32x4Neg),
|
||||||
|
Operator::I32x4AllTrue => Some(wasm_encoder::Instruction::I32x4AllTrue),
|
||||||
|
Operator::I32x4Bitmask => Some(wasm_encoder::Instruction::I32x4Bitmask),
|
||||||
|
Operator::I32x4ExtendLowI16x8S => Some(wasm_encoder::Instruction::I32x4ExtendLowI16x8S),
|
||||||
|
Operator::I32x4ExtendHighI16x8S => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtendHighI16x8S)
|
||||||
|
}
|
||||||
|
Operator::I32x4ExtendLowI16x8U => Some(wasm_encoder::Instruction::I32x4ExtendLowI16x8U),
|
||||||
|
Operator::I32x4ExtendHighI16x8U => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtendHighI16x8U)
|
||||||
|
}
|
||||||
|
Operator::I32x4Shl => Some(wasm_encoder::Instruction::I32x4Shl),
|
||||||
|
Operator::I32x4ShrS => Some(wasm_encoder::Instruction::I32x4ShrS),
|
||||||
|
Operator::I32x4ShrU => Some(wasm_encoder::Instruction::I32x4ShrU),
|
||||||
|
Operator::I32x4Add => Some(wasm_encoder::Instruction::I32x4Add),
|
||||||
|
Operator::I32x4Sub => Some(wasm_encoder::Instruction::I32x4Sub),
|
||||||
|
Operator::I32x4Mul => Some(wasm_encoder::Instruction::I32x4Mul),
|
||||||
|
Operator::I32x4MinS => Some(wasm_encoder::Instruction::I32x4MinS),
|
||||||
|
Operator::I32x4MinU => Some(wasm_encoder::Instruction::I32x4MinU),
|
||||||
|
Operator::I32x4MaxS => Some(wasm_encoder::Instruction::I32x4MaxS),
|
||||||
|
Operator::I32x4MaxU => Some(wasm_encoder::Instruction::I32x4MaxU),
|
||||||
|
Operator::I32x4DotI16x8S => Some(wasm_encoder::Instruction::I32x4DotI16x8S),
|
||||||
|
Operator::I32x4ExtMulLowI16x8S => Some(wasm_encoder::Instruction::I32x4ExtMulLowI16x8S),
|
||||||
|
Operator::I32x4ExtMulHighI16x8S => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtMulHighI16x8S)
|
||||||
|
}
|
||||||
|
Operator::I32x4ExtMulLowI16x8U => Some(wasm_encoder::Instruction::I32x4ExtMulLowI16x8U),
|
||||||
|
Operator::I32x4ExtMulHighI16x8U => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4ExtMulHighI16x8U)
|
||||||
|
}
|
||||||
|
|
||||||
|
Operator::I64x2Abs => Some(wasm_encoder::Instruction::I64x2Abs),
|
||||||
|
Operator::I64x2Neg => Some(wasm_encoder::Instruction::I64x2Neg),
|
||||||
|
Operator::I64x2AllTrue => Some(wasm_encoder::Instruction::I64x2AllTrue),
|
||||||
|
Operator::I64x2Bitmask => Some(wasm_encoder::Instruction::I64x2Bitmask),
|
||||||
|
Operator::I64x2ExtendLowI32x4S => Some(wasm_encoder::Instruction::I64x2ExtendLowI32x4S),
|
||||||
|
Operator::I64x2ExtendHighI32x4S => {
|
||||||
|
Some(wasm_encoder::Instruction::I64x2ExtendHighI32x4S)
|
||||||
|
}
|
||||||
|
Operator::I64x2ExtendLowI32x4U => Some(wasm_encoder::Instruction::I64x2ExtendLowI32x4U),
|
||||||
|
Operator::I64x2ExtendHighI32x4U => {
|
||||||
|
Some(wasm_encoder::Instruction::I64x2ExtendHighI32x4U)
|
||||||
|
}
|
||||||
|
Operator::I64x2Shl => Some(wasm_encoder::Instruction::I64x2Shl),
|
||||||
|
Operator::I64x2ShrS => Some(wasm_encoder::Instruction::I64x2ShrS),
|
||||||
|
Operator::I64x2ShrU => Some(wasm_encoder::Instruction::I64x2ShrU),
|
||||||
|
Operator::I64x2Add => Some(wasm_encoder::Instruction::I64x2Add),
|
||||||
|
Operator::I64x2Sub => Some(wasm_encoder::Instruction::I64x2Sub),
|
||||||
|
Operator::I64x2Mul => Some(wasm_encoder::Instruction::I64x2Mul),
|
||||||
|
Operator::I64x2ExtMulLowI32x4S => Some(wasm_encoder::Instruction::I64x2ExtMulLowI32x4S),
|
||||||
|
Operator::I64x2ExtMulHighI32x4S => {
|
||||||
|
Some(wasm_encoder::Instruction::I64x2ExtMulHighI32x4S)
|
||||||
|
}
|
||||||
|
Operator::I64x2ExtMulLowI32x4U => Some(wasm_encoder::Instruction::I64x2ExtMulLowI32x4U),
|
||||||
|
Operator::I64x2ExtMulHighI32x4U => {
|
||||||
|
Some(wasm_encoder::Instruction::I64x2ExtMulHighI32x4U)
|
||||||
|
}
|
||||||
|
|
||||||
|
Operator::F32x4Ceil => Some(wasm_encoder::Instruction::F32x4Ceil),
|
||||||
|
Operator::F32x4Floor => Some(wasm_encoder::Instruction::F32x4Floor),
|
||||||
|
Operator::F32x4Trunc => Some(wasm_encoder::Instruction::F32x4Trunc),
|
||||||
|
Operator::F32x4Nearest => Some(wasm_encoder::Instruction::F32x4Nearest),
|
||||||
|
Operator::F32x4Abs => Some(wasm_encoder::Instruction::F32x4Abs),
|
||||||
|
Operator::F32x4Neg => Some(wasm_encoder::Instruction::F32x4Neg),
|
||||||
|
Operator::F32x4Sqrt => Some(wasm_encoder::Instruction::F32x4Sqrt),
|
||||||
|
Operator::F32x4Add => Some(wasm_encoder::Instruction::F32x4Add),
|
||||||
|
Operator::F32x4Sub => Some(wasm_encoder::Instruction::F32x4Sub),
|
||||||
|
Operator::F32x4Mul => Some(wasm_encoder::Instruction::F32x4Mul),
|
||||||
|
Operator::F32x4Div => Some(wasm_encoder::Instruction::F32x4Div),
|
||||||
|
Operator::F32x4Min => Some(wasm_encoder::Instruction::F32x4Min),
|
||||||
|
Operator::F32x4Max => Some(wasm_encoder::Instruction::F32x4Max),
|
||||||
|
Operator::F32x4PMin => Some(wasm_encoder::Instruction::F32x4PMin),
|
||||||
|
Operator::F32x4PMax => Some(wasm_encoder::Instruction::F32x4PMax),
|
||||||
|
|
||||||
|
Operator::F64x2Ceil => Some(wasm_encoder::Instruction::F64x2Ceil),
|
||||||
|
Operator::F64x2Floor => Some(wasm_encoder::Instruction::F64x2Floor),
|
||||||
|
Operator::F64x2Trunc => Some(wasm_encoder::Instruction::F64x2Trunc),
|
||||||
|
Operator::F64x2Nearest => Some(wasm_encoder::Instruction::F64x2Nearest),
|
||||||
|
Operator::F64x2Abs => Some(wasm_encoder::Instruction::F64x2Abs),
|
||||||
|
Operator::F64x2Neg => Some(wasm_encoder::Instruction::F64x2Neg),
|
||||||
|
Operator::F64x2Sqrt => Some(wasm_encoder::Instruction::F64x2Sqrt),
|
||||||
|
Operator::F64x2Add => Some(wasm_encoder::Instruction::F64x2Add),
|
||||||
|
Operator::F64x2Sub => Some(wasm_encoder::Instruction::F64x2Sub),
|
||||||
|
Operator::F64x2Mul => Some(wasm_encoder::Instruction::F64x2Mul),
|
||||||
|
Operator::F64x2Div => Some(wasm_encoder::Instruction::F64x2Div),
|
||||||
|
Operator::F64x2Min => Some(wasm_encoder::Instruction::F64x2Min),
|
||||||
|
Operator::F64x2Max => Some(wasm_encoder::Instruction::F64x2Max),
|
||||||
|
Operator::F64x2PMin => Some(wasm_encoder::Instruction::F64x2PMin),
|
||||||
|
Operator::F64x2PMax => Some(wasm_encoder::Instruction::F64x2PMax),
|
||||||
|
|
||||||
|
Operator::I32x4TruncSatF32x4S => Some(wasm_encoder::Instruction::I32x4TruncSatF32x4S),
|
||||||
|
Operator::I32x4TruncSatF32x4U => Some(wasm_encoder::Instruction::I32x4TruncSatF32x4U),
|
||||||
|
|
||||||
|
Operator::F32x4ConvertI32x4S => Some(wasm_encoder::Instruction::F32x4ConvertI32x4S),
|
||||||
|
Operator::F32x4ConvertI32x4U => Some(wasm_encoder::Instruction::F32x4ConvertI32x4U),
|
||||||
|
Operator::I32x4TruncSatF64x2SZero => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4TruncSatF64x2SZero)
|
||||||
|
}
|
||||||
|
Operator::I32x4TruncSatF64x2UZero => {
|
||||||
|
Some(wasm_encoder::Instruction::I32x4TruncSatF64x2UZero)
|
||||||
|
}
|
||||||
|
Operator::F64x2ConvertLowI32x4S => {
|
||||||
|
Some(wasm_encoder::Instruction::F64x2ConvertLowI32x4S)
|
||||||
|
}
|
||||||
|
Operator::F64x2ConvertLowI32x4U => {
|
||||||
|
Some(wasm_encoder::Instruction::F64x2ConvertLowI32x4U)
|
||||||
|
}
|
||||||
|
Operator::F32x4DemoteF64x2Zero => Some(wasm_encoder::Instruction::F32x4DemoteF64x2Zero),
|
||||||
|
Operator::F64x2PromoteLowF32x4 => Some(wasm_encoder::Instruction::F64x2PromoteLowF32x4),
|
||||||
};
|
};
|
||||||
|
|
||||||
if let Some(inst) = inst {
|
if let Some(inst) = inst {
|
||||||
|
|
|
||||||
238
src/frontend.rs
238
src/frontend.rs
|
|
@ -1151,7 +1151,243 @@ impl<'a, 'b> FunctionBodyBuilder<'a, 'b> {
|
||||||
| wasmparser::Operator::TableGet { .. }
|
| wasmparser::Operator::TableGet { .. }
|
||||||
| wasmparser::Operator::TableSet { .. }
|
| wasmparser::Operator::TableSet { .. }
|
||||||
| wasmparser::Operator::TableGrow { .. }
|
| wasmparser::Operator::TableGrow { .. }
|
||||||
| wasmparser::Operator::TableSize { .. } => {
|
| wasmparser::Operator::TableSize { .. }
|
||||||
|
| wasmparser::Operator::V128Load { .. }
|
||||||
|
| wasmparser::Operator::V128Load8x8S { .. }
|
||||||
|
| wasmparser::Operator::V128Load8x8U { .. }
|
||||||
|
| wasmparser::Operator::V128Load16x4S { .. }
|
||||||
|
| wasmparser::Operator::V128Load16x4U { .. }
|
||||||
|
| wasmparser::Operator::V128Load32x2S { .. }
|
||||||
|
| wasmparser::Operator::V128Load32x2U { .. }
|
||||||
|
| wasmparser::Operator::V128Load8Splat { .. }
|
||||||
|
| wasmparser::Operator::V128Load16Splat { .. }
|
||||||
|
| wasmparser::Operator::V128Load32Splat { .. }
|
||||||
|
| wasmparser::Operator::V128Load64Splat { .. }
|
||||||
|
| wasmparser::Operator::V128Load32Zero { .. }
|
||||||
|
| wasmparser::Operator::V128Load64Zero { .. }
|
||||||
|
| wasmparser::Operator::V128Store { .. }
|
||||||
|
| wasmparser::Operator::V128Load8Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Load16Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Load32Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Load64Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Store8Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Store16Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Store32Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Store64Lane { .. }
|
||||||
|
| wasmparser::Operator::V128Const { .. }
|
||||||
|
| wasmparser::Operator::I8x16Shuffle { .. }
|
||||||
|
| wasmparser::Operator::I8x16ExtractLaneS { .. }
|
||||||
|
| wasmparser::Operator::I8x16ExtractLaneU { .. }
|
||||||
|
| wasmparser::Operator::I8x16ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::I16x8ExtractLaneS { .. }
|
||||||
|
| wasmparser::Operator::I16x8ExtractLaneU { .. }
|
||||||
|
| wasmparser::Operator::I16x8ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::I32x4ExtractLane { .. }
|
||||||
|
| wasmparser::Operator::I32x4ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::I64x2ExtractLane { .. }
|
||||||
|
| wasmparser::Operator::I64x2ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::F32x4ExtractLane { .. }
|
||||||
|
| wasmparser::Operator::F32x4ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::F64x2ExtractLane { .. }
|
||||||
|
| wasmparser::Operator::F64x2ReplaceLane { .. }
|
||||||
|
| wasmparser::Operator::I8x16Swizzle
|
||||||
|
| wasmparser::Operator::I8x16Splat
|
||||||
|
| wasmparser::Operator::I16x8Splat
|
||||||
|
| wasmparser::Operator::I32x4Splat
|
||||||
|
| wasmparser::Operator::I64x2Splat
|
||||||
|
| wasmparser::Operator::F32x4Splat
|
||||||
|
| wasmparser::Operator::F64x2Splat
|
||||||
|
| wasmparser::Operator::I8x16Eq
|
||||||
|
| wasmparser::Operator::I8x16Ne
|
||||||
|
| wasmparser::Operator::I8x16LtS
|
||||||
|
| wasmparser::Operator::I8x16LtU
|
||||||
|
| wasmparser::Operator::I8x16GtS
|
||||||
|
| wasmparser::Operator::I8x16GtU
|
||||||
|
| wasmparser::Operator::I8x16LeS
|
||||||
|
| wasmparser::Operator::I8x16LeU
|
||||||
|
| wasmparser::Operator::I8x16GeS
|
||||||
|
| wasmparser::Operator::I8x16GeU
|
||||||
|
| wasmparser::Operator::I16x8Eq
|
||||||
|
| wasmparser::Operator::I16x8Ne
|
||||||
|
| wasmparser::Operator::I16x8LtS
|
||||||
|
| wasmparser::Operator::I16x8LtU
|
||||||
|
| wasmparser::Operator::I16x8GtS
|
||||||
|
| wasmparser::Operator::I16x8GtU
|
||||||
|
| wasmparser::Operator::I16x8LeS
|
||||||
|
| wasmparser::Operator::I16x8LeU
|
||||||
|
| wasmparser::Operator::I16x8GeS
|
||||||
|
| wasmparser::Operator::I16x8GeU
|
||||||
|
| wasmparser::Operator::I32x4Eq
|
||||||
|
| wasmparser::Operator::I32x4Ne
|
||||||
|
| wasmparser::Operator::I32x4LtS
|
||||||
|
| wasmparser::Operator::I32x4LtU
|
||||||
|
| wasmparser::Operator::I32x4GtS
|
||||||
|
| wasmparser::Operator::I32x4GtU
|
||||||
|
| wasmparser::Operator::I32x4LeS
|
||||||
|
| wasmparser::Operator::I32x4LeU
|
||||||
|
| wasmparser::Operator::I32x4GeS
|
||||||
|
| wasmparser::Operator::I32x4GeU
|
||||||
|
| wasmparser::Operator::I64x2Eq
|
||||||
|
| wasmparser::Operator::I64x2Ne
|
||||||
|
| wasmparser::Operator::I64x2LtS
|
||||||
|
| wasmparser::Operator::I64x2GtS
|
||||||
|
| wasmparser::Operator::I64x2LeS
|
||||||
|
| wasmparser::Operator::I64x2GeS
|
||||||
|
| wasmparser::Operator::F32x4Eq
|
||||||
|
| wasmparser::Operator::F32x4Ne
|
||||||
|
| wasmparser::Operator::F32x4Lt
|
||||||
|
| wasmparser::Operator::F32x4Gt
|
||||||
|
| wasmparser::Operator::F32x4Le
|
||||||
|
| wasmparser::Operator::F32x4Ge
|
||||||
|
| wasmparser::Operator::F64x2Eq
|
||||||
|
| wasmparser::Operator::F64x2Ne
|
||||||
|
| wasmparser::Operator::F64x2Lt
|
||||||
|
| wasmparser::Operator::F64x2Gt
|
||||||
|
| wasmparser::Operator::F64x2Le
|
||||||
|
| wasmparser::Operator::F64x2Ge
|
||||||
|
| wasmparser::Operator::V128Not
|
||||||
|
| wasmparser::Operator::V128And
|
||||||
|
| wasmparser::Operator::V128AndNot
|
||||||
|
| wasmparser::Operator::V128Or
|
||||||
|
| wasmparser::Operator::V128Xor
|
||||||
|
| wasmparser::Operator::V128Bitselect
|
||||||
|
| wasmparser::Operator::V128AnyTrue
|
||||||
|
| wasmparser::Operator::I8x16Abs
|
||||||
|
| wasmparser::Operator::I8x16Neg
|
||||||
|
| wasmparser::Operator::I8x16Popcnt
|
||||||
|
| wasmparser::Operator::I8x16AllTrue
|
||||||
|
| wasmparser::Operator::I8x16Bitmask
|
||||||
|
| wasmparser::Operator::I8x16NarrowI16x8S
|
||||||
|
| wasmparser::Operator::I8x16NarrowI16x8U
|
||||||
|
| wasmparser::Operator::I8x16Shl
|
||||||
|
| wasmparser::Operator::I8x16ShrS
|
||||||
|
| wasmparser::Operator::I8x16ShrU
|
||||||
|
| wasmparser::Operator::I8x16Add
|
||||||
|
| wasmparser::Operator::I8x16AddSatS
|
||||||
|
| wasmparser::Operator::I8x16AddSatU
|
||||||
|
| wasmparser::Operator::I8x16Sub
|
||||||
|
| wasmparser::Operator::I8x16SubSatS
|
||||||
|
| wasmparser::Operator::I8x16SubSatU
|
||||||
|
| wasmparser::Operator::I8x16MinS
|
||||||
|
| wasmparser::Operator::I8x16MinU
|
||||||
|
| wasmparser::Operator::I8x16MaxS
|
||||||
|
| wasmparser::Operator::I8x16MaxU
|
||||||
|
| wasmparser::Operator::I8x16AvgrU
|
||||||
|
| wasmparser::Operator::I16x8ExtAddPairwiseI8x16S
|
||||||
|
| wasmparser::Operator::I16x8ExtAddPairwiseI8x16U
|
||||||
|
| wasmparser::Operator::I16x8Abs
|
||||||
|
| wasmparser::Operator::I16x8Neg
|
||||||
|
| wasmparser::Operator::I16x8Q15MulrSatS
|
||||||
|
| wasmparser::Operator::I16x8AllTrue
|
||||||
|
| wasmparser::Operator::I16x8Bitmask
|
||||||
|
| wasmparser::Operator::I16x8NarrowI32x4S
|
||||||
|
| wasmparser::Operator::I16x8NarrowI32x4U
|
||||||
|
| wasmparser::Operator::I16x8ExtendLowI8x16S
|
||||||
|
| wasmparser::Operator::I16x8ExtendHighI8x16S
|
||||||
|
| wasmparser::Operator::I16x8ExtendLowI8x16U
|
||||||
|
| wasmparser::Operator::I16x8ExtendHighI8x16U
|
||||||
|
| wasmparser::Operator::I16x8Shl
|
||||||
|
| wasmparser::Operator::I16x8ShrS
|
||||||
|
| wasmparser::Operator::I16x8ShrU
|
||||||
|
| wasmparser::Operator::I16x8Add
|
||||||
|
| wasmparser::Operator::I16x8AddSatS
|
||||||
|
| wasmparser::Operator::I16x8AddSatU
|
||||||
|
| wasmparser::Operator::I16x8Sub
|
||||||
|
| wasmparser::Operator::I16x8SubSatS
|
||||||
|
| wasmparser::Operator::I16x8SubSatU
|
||||||
|
| wasmparser::Operator::I16x8Mul
|
||||||
|
| wasmparser::Operator::I16x8MinS
|
||||||
|
| wasmparser::Operator::I16x8MinU
|
||||||
|
| wasmparser::Operator::I16x8MaxS
|
||||||
|
| wasmparser::Operator::I16x8MaxU
|
||||||
|
| wasmparser::Operator::I16x8AvgrU
|
||||||
|
| wasmparser::Operator::I16x8ExtMulLowI8x16S
|
||||||
|
| wasmparser::Operator::I16x8ExtMulHighI8x16S
|
||||||
|
| wasmparser::Operator::I16x8ExtMulLowI8x16U
|
||||||
|
| wasmparser::Operator::I16x8ExtMulHighI8x16U
|
||||||
|
| wasmparser::Operator::I32x4ExtAddPairwiseI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtAddPairwiseI16x8U
|
||||||
|
| wasmparser::Operator::I32x4Abs
|
||||||
|
| wasmparser::Operator::I32x4Neg
|
||||||
|
| wasmparser::Operator::I32x4AllTrue
|
||||||
|
| wasmparser::Operator::I32x4Bitmask
|
||||||
|
| wasmparser::Operator::I32x4ExtendLowI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtendHighI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtendLowI16x8U
|
||||||
|
| wasmparser::Operator::I32x4ExtendHighI16x8U
|
||||||
|
| wasmparser::Operator::I32x4Shl
|
||||||
|
| wasmparser::Operator::I32x4ShrS
|
||||||
|
| wasmparser::Operator::I32x4ShrU
|
||||||
|
| wasmparser::Operator::I32x4Add
|
||||||
|
| wasmparser::Operator::I32x4Sub
|
||||||
|
| wasmparser::Operator::I32x4Mul
|
||||||
|
| wasmparser::Operator::I32x4MinS
|
||||||
|
| wasmparser::Operator::I32x4MinU
|
||||||
|
| wasmparser::Operator::I32x4MaxS
|
||||||
|
| wasmparser::Operator::I32x4MaxU
|
||||||
|
| wasmparser::Operator::I32x4DotI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtMulLowI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtMulHighI16x8S
|
||||||
|
| wasmparser::Operator::I32x4ExtMulLowI16x8U
|
||||||
|
| wasmparser::Operator::I32x4ExtMulHighI16x8U
|
||||||
|
| wasmparser::Operator::I64x2Abs
|
||||||
|
| wasmparser::Operator::I64x2Neg
|
||||||
|
| wasmparser::Operator::I64x2AllTrue
|
||||||
|
| wasmparser::Operator::I64x2Bitmask
|
||||||
|
| wasmparser::Operator::I64x2ExtendLowI32x4S
|
||||||
|
| wasmparser::Operator::I64x2ExtendHighI32x4S
|
||||||
|
| wasmparser::Operator::I64x2ExtendLowI32x4U
|
||||||
|
| wasmparser::Operator::I64x2ExtendHighI32x4U
|
||||||
|
| wasmparser::Operator::I64x2Shl
|
||||||
|
| wasmparser::Operator::I64x2ShrS
|
||||||
|
| wasmparser::Operator::I64x2ShrU
|
||||||
|
| wasmparser::Operator::I64x2Add
|
||||||
|
| wasmparser::Operator::I64x2Sub
|
||||||
|
| wasmparser::Operator::I64x2Mul
|
||||||
|
| wasmparser::Operator::I64x2ExtMulLowI32x4S
|
||||||
|
| wasmparser::Operator::I64x2ExtMulHighI32x4S
|
||||||
|
| wasmparser::Operator::I64x2ExtMulLowI32x4U
|
||||||
|
| wasmparser::Operator::I64x2ExtMulHighI32x4U
|
||||||
|
| wasmparser::Operator::F32x4Ceil
|
||||||
|
| wasmparser::Operator::F32x4Floor
|
||||||
|
| wasmparser::Operator::F32x4Trunc
|
||||||
|
| wasmparser::Operator::F32x4Nearest
|
||||||
|
| wasmparser::Operator::F32x4Abs
|
||||||
|
| wasmparser::Operator::F32x4Neg
|
||||||
|
| wasmparser::Operator::F32x4Sqrt
|
||||||
|
| wasmparser::Operator::F32x4Add
|
||||||
|
| wasmparser::Operator::F32x4Sub
|
||||||
|
| wasmparser::Operator::F32x4Mul
|
||||||
|
| wasmparser::Operator::F32x4Div
|
||||||
|
| wasmparser::Operator::F32x4Min
|
||||||
|
| wasmparser::Operator::F32x4Max
|
||||||
|
| wasmparser::Operator::F32x4PMin
|
||||||
|
| wasmparser::Operator::F32x4PMax
|
||||||
|
| wasmparser::Operator::F64x2Ceil
|
||||||
|
| wasmparser::Operator::F64x2Floor
|
||||||
|
| wasmparser::Operator::F64x2Trunc
|
||||||
|
| wasmparser::Operator::F64x2Nearest
|
||||||
|
| wasmparser::Operator::F64x2Abs
|
||||||
|
| wasmparser::Operator::F64x2Neg
|
||||||
|
| wasmparser::Operator::F64x2Sqrt
|
||||||
|
| wasmparser::Operator::F64x2Add
|
||||||
|
| wasmparser::Operator::F64x2Sub
|
||||||
|
| wasmparser::Operator::F64x2Mul
|
||||||
|
| wasmparser::Operator::F64x2Div
|
||||||
|
| wasmparser::Operator::F64x2Min
|
||||||
|
| wasmparser::Operator::F64x2Max
|
||||||
|
| wasmparser::Operator::F64x2PMin
|
||||||
|
| wasmparser::Operator::F64x2PMax
|
||||||
|
| wasmparser::Operator::I32x4TruncSatF32x4S
|
||||||
|
| wasmparser::Operator::I32x4TruncSatF32x4U
|
||||||
|
| wasmparser::Operator::F32x4ConvertI32x4S
|
||||||
|
| wasmparser::Operator::F32x4ConvertI32x4U
|
||||||
|
| wasmparser::Operator::I32x4TruncSatF64x2SZero
|
||||||
|
| wasmparser::Operator::I32x4TruncSatF64x2UZero
|
||||||
|
| wasmparser::Operator::F64x2ConvertLowI32x4S
|
||||||
|
| wasmparser::Operator::F64x2ConvertLowI32x4U
|
||||||
|
| wasmparser::Operator::F32x4DemoteF64x2Zero
|
||||||
|
| wasmparser::Operator::F64x2PromoteLowF32x4 => {
|
||||||
self.emit(Operator::try_from(&op).unwrap(), loc)?
|
self.emit(Operator::try_from(&op).unwrap(), loc)?
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
1032
src/op_traits.rs
1032
src/op_traits.rs
File diff suppressed because it is too large
Load diff
691
src/ops.rs
691
src/ops.rs
|
|
@ -295,6 +295,341 @@ pub enum Operator {
|
||||||
MemoryGrow {
|
MemoryGrow {
|
||||||
mem: Memory,
|
mem: Memory,
|
||||||
},
|
},
|
||||||
|
|
||||||
|
V128Load {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load8x8S {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load8x8U {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load16x4S {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load16x4U {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load32x2S {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load32x2U {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load8Splat {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load16Splat {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load32Splat {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load64Splat {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load32Zero {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load64Zero {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Store {
|
||||||
|
memory: MemoryArg,
|
||||||
|
},
|
||||||
|
V128Load8Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Load16Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Load32Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Load64Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Store8Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Store16Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Store32Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
V128Store64Lane {
|
||||||
|
memory: MemoryArg,
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
|
||||||
|
V128Const {
|
||||||
|
value: u128,
|
||||||
|
},
|
||||||
|
|
||||||
|
I8x16Shuffle {
|
||||||
|
lanes: [u8; 16],
|
||||||
|
},
|
||||||
|
|
||||||
|
I8x16ExtractLaneS {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I8x16ExtractLaneU {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I8x16ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I16x8ExtractLaneS {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I16x8ExtractLaneU {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I16x8ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I32x4ExtractLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I32x4ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I64x2ExtractLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
I64x2ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
F32x4ExtractLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
F32x4ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
F64x2ExtractLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
F64x2ReplaceLane {
|
||||||
|
lane: u8,
|
||||||
|
},
|
||||||
|
|
||||||
|
I8x16Swizzle,
|
||||||
|
I8x16Splat,
|
||||||
|
I16x8Splat,
|
||||||
|
I32x4Splat,
|
||||||
|
I64x2Splat,
|
||||||
|
F32x4Splat,
|
||||||
|
F64x2Splat,
|
||||||
|
|
||||||
|
I8x16Eq,
|
||||||
|
I8x16Ne,
|
||||||
|
I8x16LtS,
|
||||||
|
I8x16LtU,
|
||||||
|
I8x16GtS,
|
||||||
|
I8x16GtU,
|
||||||
|
I8x16LeS,
|
||||||
|
I8x16LeU,
|
||||||
|
I8x16GeS,
|
||||||
|
I8x16GeU,
|
||||||
|
|
||||||
|
I16x8Eq,
|
||||||
|
I16x8Ne,
|
||||||
|
I16x8LtS,
|
||||||
|
I16x8LtU,
|
||||||
|
I16x8GtS,
|
||||||
|
I16x8GtU,
|
||||||
|
I16x8LeS,
|
||||||
|
I16x8LeU,
|
||||||
|
I16x8GeS,
|
||||||
|
I16x8GeU,
|
||||||
|
|
||||||
|
I32x4Eq,
|
||||||
|
I32x4Ne,
|
||||||
|
I32x4LtS,
|
||||||
|
I32x4LtU,
|
||||||
|
I32x4GtS,
|
||||||
|
I32x4GtU,
|
||||||
|
I32x4LeS,
|
||||||
|
I32x4LeU,
|
||||||
|
I32x4GeS,
|
||||||
|
I32x4GeU,
|
||||||
|
|
||||||
|
I64x2Eq,
|
||||||
|
I64x2Ne,
|
||||||
|
I64x2LtS,
|
||||||
|
I64x2GtS,
|
||||||
|
I64x2LeS,
|
||||||
|
I64x2GeS,
|
||||||
|
|
||||||
|
F32x4Eq,
|
||||||
|
F32x4Ne,
|
||||||
|
F32x4Lt,
|
||||||
|
F32x4Gt,
|
||||||
|
F32x4Le,
|
||||||
|
F32x4Ge,
|
||||||
|
|
||||||
|
F64x2Eq,
|
||||||
|
F64x2Ne,
|
||||||
|
F64x2Lt,
|
||||||
|
F64x2Gt,
|
||||||
|
F64x2Le,
|
||||||
|
F64x2Ge,
|
||||||
|
|
||||||
|
V128Not,
|
||||||
|
V128And,
|
||||||
|
V128AndNot,
|
||||||
|
V128Or,
|
||||||
|
V128Xor,
|
||||||
|
V128Bitselect,
|
||||||
|
V128AnyTrue,
|
||||||
|
|
||||||
|
I8x16Abs,
|
||||||
|
I8x16Neg,
|
||||||
|
I8x16Popcnt,
|
||||||
|
I8x16AllTrue,
|
||||||
|
I8x16Bitmask,
|
||||||
|
I8x16NarrowI16x8S,
|
||||||
|
I8x16NarrowI16x8U,
|
||||||
|
I8x16Shl,
|
||||||
|
I8x16ShrS,
|
||||||
|
I8x16ShrU,
|
||||||
|
I8x16Add,
|
||||||
|
I8x16AddSatS,
|
||||||
|
I8x16AddSatU,
|
||||||
|
I8x16Sub,
|
||||||
|
I8x16SubSatS,
|
||||||
|
I8x16SubSatU,
|
||||||
|
I8x16MinS,
|
||||||
|
I8x16MinU,
|
||||||
|
I8x16MaxS,
|
||||||
|
I8x16MaxU,
|
||||||
|
I8x16AvgrU,
|
||||||
|
|
||||||
|
I16x8ExtAddPairwiseI8x16S,
|
||||||
|
I16x8ExtAddPairwiseI8x16U,
|
||||||
|
I16x8Abs,
|
||||||
|
I16x8Neg,
|
||||||
|
I16x8Q15MulrSatS,
|
||||||
|
I16x8AllTrue,
|
||||||
|
I16x8Bitmask,
|
||||||
|
I16x8NarrowI32x4S,
|
||||||
|
I16x8NarrowI32x4U,
|
||||||
|
I16x8ExtendLowI8x16S,
|
||||||
|
I16x8ExtendHighI8x16S,
|
||||||
|
I16x8ExtendLowI8x16U,
|
||||||
|
I16x8ExtendHighI8x16U,
|
||||||
|
I16x8Shl,
|
||||||
|
I16x8ShrS,
|
||||||
|
I16x8ShrU,
|
||||||
|
I16x8Add,
|
||||||
|
I16x8AddSatS,
|
||||||
|
I16x8AddSatU,
|
||||||
|
I16x8Sub,
|
||||||
|
I16x8SubSatS,
|
||||||
|
I16x8SubSatU,
|
||||||
|
I16x8Mul,
|
||||||
|
I16x8MinS,
|
||||||
|
I16x8MinU,
|
||||||
|
I16x8MaxS,
|
||||||
|
I16x8MaxU,
|
||||||
|
I16x8AvgrU,
|
||||||
|
I16x8ExtMulLowI8x16S,
|
||||||
|
I16x8ExtMulHighI8x16S,
|
||||||
|
I16x8ExtMulLowI8x16U,
|
||||||
|
I16x8ExtMulHighI8x16U,
|
||||||
|
I32x4ExtAddPairwiseI16x8S,
|
||||||
|
I32x4ExtAddPairwiseI16x8U,
|
||||||
|
|
||||||
|
I32x4Abs,
|
||||||
|
I32x4Neg,
|
||||||
|
I32x4AllTrue,
|
||||||
|
I32x4Bitmask,
|
||||||
|
I32x4ExtendLowI16x8S,
|
||||||
|
I32x4ExtendHighI16x8S,
|
||||||
|
I32x4ExtendLowI16x8U,
|
||||||
|
I32x4ExtendHighI16x8U,
|
||||||
|
I32x4Shl,
|
||||||
|
I32x4ShrS,
|
||||||
|
I32x4ShrU,
|
||||||
|
I32x4Add,
|
||||||
|
I32x4Sub,
|
||||||
|
I32x4Mul,
|
||||||
|
I32x4MinS,
|
||||||
|
I32x4MinU,
|
||||||
|
I32x4MaxS,
|
||||||
|
I32x4MaxU,
|
||||||
|
I32x4DotI16x8S,
|
||||||
|
I32x4ExtMulLowI16x8S,
|
||||||
|
I32x4ExtMulHighI16x8S,
|
||||||
|
I32x4ExtMulLowI16x8U,
|
||||||
|
I32x4ExtMulHighI16x8U,
|
||||||
|
I64x2Abs,
|
||||||
|
I64x2Neg,
|
||||||
|
I64x2AllTrue,
|
||||||
|
I64x2Bitmask,
|
||||||
|
I64x2ExtendLowI32x4S,
|
||||||
|
I64x2ExtendHighI32x4S,
|
||||||
|
I64x2ExtendLowI32x4U,
|
||||||
|
I64x2ExtendHighI32x4U,
|
||||||
|
I64x2Shl,
|
||||||
|
I64x2ShrS,
|
||||||
|
I64x2ShrU,
|
||||||
|
I64x2Add,
|
||||||
|
I64x2Sub,
|
||||||
|
I64x2Mul,
|
||||||
|
I64x2ExtMulLowI32x4S,
|
||||||
|
I64x2ExtMulHighI32x4S,
|
||||||
|
I64x2ExtMulLowI32x4U,
|
||||||
|
I64x2ExtMulHighI32x4U,
|
||||||
|
F32x4Ceil,
|
||||||
|
F32x4Floor,
|
||||||
|
F32x4Trunc,
|
||||||
|
F32x4Nearest,
|
||||||
|
F32x4Abs,
|
||||||
|
F32x4Neg,
|
||||||
|
F32x4Sqrt,
|
||||||
|
F32x4Add,
|
||||||
|
F32x4Sub,
|
||||||
|
F32x4Mul,
|
||||||
|
F32x4Div,
|
||||||
|
F32x4Min,
|
||||||
|
F32x4Max,
|
||||||
|
F32x4PMin,
|
||||||
|
F32x4PMax,
|
||||||
|
F64x2Ceil,
|
||||||
|
F64x2Floor,
|
||||||
|
F64x2Trunc,
|
||||||
|
F64x2Nearest,
|
||||||
|
F64x2Abs,
|
||||||
|
F64x2Neg,
|
||||||
|
F64x2Sqrt,
|
||||||
|
F64x2Add,
|
||||||
|
F64x2Sub,
|
||||||
|
F64x2Mul,
|
||||||
|
F64x2Div,
|
||||||
|
F64x2Min,
|
||||||
|
F64x2Max,
|
||||||
|
F64x2PMin,
|
||||||
|
F64x2PMax,
|
||||||
|
I32x4TruncSatF32x4S,
|
||||||
|
I32x4TruncSatF32x4U,
|
||||||
|
F32x4ConvertI32x4S,
|
||||||
|
F32x4ConvertI32x4U,
|
||||||
|
I32x4TruncSatF64x2SZero,
|
||||||
|
I32x4TruncSatF64x2UZero,
|
||||||
|
F64x2ConvertLowI32x4S,
|
||||||
|
F64x2ConvertLowI32x4U,
|
||||||
|
F32x4DemoteF64x2Zero,
|
||||||
|
F64x2PromoteLowF32x4,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
|
|
@ -568,6 +903,362 @@ impl<'a, 'b> std::convert::TryFrom<&'b wasmparser::Operator<'a>> for Operator {
|
||||||
&wasmparser::Operator::MemoryGrow { mem, .. } => Ok(Operator::MemoryGrow {
|
&wasmparser::Operator::MemoryGrow { mem, .. } => Ok(Operator::MemoryGrow {
|
||||||
mem: Memory::from(mem),
|
mem: Memory::from(mem),
|
||||||
}),
|
}),
|
||||||
|
|
||||||
|
&wasmparser::Operator::V128Load { memarg } => Ok(Operator::V128Load {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load8x8S { memarg } => Ok(Operator::V128Load8x8S {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load8x8U { memarg } => Ok(Operator::V128Load8x8U {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load16x4S { memarg } => Ok(Operator::V128Load16x4S {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load16x4U { memarg } => Ok(Operator::V128Load16x4U {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load32x2S { memarg } => Ok(Operator::V128Load32x2S {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load32x2U { memarg } => Ok(Operator::V128Load32x2U {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load8Splat { memarg } => Ok(Operator::V128Load8Splat {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load16Splat { memarg } => Ok(Operator::V128Load16Splat {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load32Splat { memarg } => Ok(Operator::V128Load32Splat {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load64Splat { memarg } => Ok(Operator::V128Load64Splat {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load32Zero { memarg } => Ok(Operator::V128Load32Zero {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load64Zero { memarg } => Ok(Operator::V128Load64Zero {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Store { memarg } => Ok(Operator::V128Store {
|
||||||
|
memory: memarg.into(),
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load8Lane { memarg, lane } => Ok(Operator::V128Load8Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
}),
|
||||||
|
&wasmparser::Operator::V128Load16Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Load16Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Load32Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Load32Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Load64Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Load64Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Store8Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Store8Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Store16Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Store16Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Store32Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Store32Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::V128Store64Lane { memarg, lane } => {
|
||||||
|
Ok(Operator::V128Store64Lane {
|
||||||
|
memory: memarg.into(),
|
||||||
|
lane,
|
||||||
|
})
|
||||||
|
}
|
||||||
|
|
||||||
|
&wasmparser::Operator::V128Const { value } => Ok(Operator::V128Const {
|
||||||
|
value: value.i128() as u128,
|
||||||
|
}),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I8x16Shuffle { lanes } => Ok(Operator::I8x16Shuffle { lanes }),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I8x16ExtractLaneS { lane } => {
|
||||||
|
Ok(Operator::I8x16ExtractLaneS { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I8x16ExtractLaneU { lane } => {
|
||||||
|
Ok(Operator::I8x16ExtractLaneU { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I8x16ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::I8x16ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I16x8ExtractLaneS { lane } => {
|
||||||
|
Ok(Operator::I16x8ExtractLaneS { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I16x8ExtractLaneU { lane } => {
|
||||||
|
Ok(Operator::I16x8ExtractLaneU { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I16x8ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::I16x8ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I32x4ExtractLane { lane } => {
|
||||||
|
Ok(Operator::I32x4ExtractLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I32x4ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::I32x4ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I64x2ExtractLane { lane } => {
|
||||||
|
Ok(Operator::I64x2ExtractLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I64x2ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::I64x2ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::F32x4ExtractLane { lane } => {
|
||||||
|
Ok(Operator::F32x4ExtractLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::F32x4ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::F32x4ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::F64x2ExtractLane { lane } => {
|
||||||
|
Ok(Operator::F64x2ExtractLane { lane })
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::F64x2ReplaceLane { lane } => {
|
||||||
|
Ok(Operator::F64x2ReplaceLane { lane })
|
||||||
|
}
|
||||||
|
|
||||||
|
&wasmparser::Operator::I8x16Swizzle => Ok(Operator::I8x16Swizzle),
|
||||||
|
&wasmparser::Operator::I8x16Splat => Ok(Operator::I8x16Splat),
|
||||||
|
&wasmparser::Operator::I16x8Splat => Ok(Operator::I16x8Splat),
|
||||||
|
&wasmparser::Operator::I32x4Splat => Ok(Operator::I32x4Splat),
|
||||||
|
&wasmparser::Operator::I64x2Splat => Ok(Operator::I64x2Splat),
|
||||||
|
&wasmparser::Operator::F32x4Splat => Ok(Operator::F32x4Splat),
|
||||||
|
&wasmparser::Operator::F64x2Splat => Ok(Operator::F64x2Splat),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I8x16Eq => Ok(Operator::I8x16Eq),
|
||||||
|
&wasmparser::Operator::I8x16Ne => Ok(Operator::I8x16Ne),
|
||||||
|
&wasmparser::Operator::I8x16LtS => Ok(Operator::I8x16LtS),
|
||||||
|
&wasmparser::Operator::I8x16LtU => Ok(Operator::I8x16LtU),
|
||||||
|
&wasmparser::Operator::I8x16GtS => Ok(Operator::I8x16GtS),
|
||||||
|
&wasmparser::Operator::I8x16GtU => Ok(Operator::I8x16GtU),
|
||||||
|
&wasmparser::Operator::I8x16LeS => Ok(Operator::I8x16LeS),
|
||||||
|
&wasmparser::Operator::I8x16LeU => Ok(Operator::I8x16LeU),
|
||||||
|
&wasmparser::Operator::I8x16GeS => Ok(Operator::I8x16GeS),
|
||||||
|
&wasmparser::Operator::I8x16GeU => Ok(Operator::I8x16GeU),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I16x8Eq => Ok(Operator::I16x8Eq),
|
||||||
|
&wasmparser::Operator::I16x8Ne => Ok(Operator::I16x8Ne),
|
||||||
|
&wasmparser::Operator::I16x8LtS => Ok(Operator::I16x8LtS),
|
||||||
|
&wasmparser::Operator::I16x8LtU => Ok(Operator::I16x8LtU),
|
||||||
|
&wasmparser::Operator::I16x8GtS => Ok(Operator::I16x8GtS),
|
||||||
|
&wasmparser::Operator::I16x8GtU => Ok(Operator::I16x8GtU),
|
||||||
|
&wasmparser::Operator::I16x8LeS => Ok(Operator::I16x8LeS),
|
||||||
|
&wasmparser::Operator::I16x8LeU => Ok(Operator::I16x8LeU),
|
||||||
|
&wasmparser::Operator::I16x8GeS => Ok(Operator::I16x8GeS),
|
||||||
|
&wasmparser::Operator::I16x8GeU => Ok(Operator::I16x8GeU),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I32x4Eq => Ok(Operator::I32x4Eq),
|
||||||
|
&wasmparser::Operator::I32x4Ne => Ok(Operator::I32x4Ne),
|
||||||
|
&wasmparser::Operator::I32x4LtS => Ok(Operator::I32x4LtS),
|
||||||
|
&wasmparser::Operator::I32x4LtU => Ok(Operator::I32x4LtU),
|
||||||
|
&wasmparser::Operator::I32x4GtS => Ok(Operator::I32x4GtS),
|
||||||
|
&wasmparser::Operator::I32x4GtU => Ok(Operator::I32x4GtU),
|
||||||
|
&wasmparser::Operator::I32x4LeS => Ok(Operator::I32x4LeS),
|
||||||
|
&wasmparser::Operator::I32x4LeU => Ok(Operator::I32x4LeU),
|
||||||
|
&wasmparser::Operator::I32x4GeS => Ok(Operator::I32x4GeS),
|
||||||
|
&wasmparser::Operator::I32x4GeU => Ok(Operator::I32x4GeU),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I64x2Eq => Ok(Operator::I64x2Eq),
|
||||||
|
&wasmparser::Operator::I64x2Ne => Ok(Operator::I64x2Ne),
|
||||||
|
&wasmparser::Operator::I64x2LtS => Ok(Operator::I64x2LtS),
|
||||||
|
&wasmparser::Operator::I64x2GtS => Ok(Operator::I64x2GtS),
|
||||||
|
&wasmparser::Operator::I64x2LeS => Ok(Operator::I64x2LeS),
|
||||||
|
&wasmparser::Operator::I64x2GeS => Ok(Operator::I64x2GeS),
|
||||||
|
|
||||||
|
&wasmparser::Operator::F32x4Eq => Ok(Operator::F32x4Eq),
|
||||||
|
&wasmparser::Operator::F32x4Ne => Ok(Operator::F32x4Ne),
|
||||||
|
&wasmparser::Operator::F32x4Lt => Ok(Operator::F32x4Lt),
|
||||||
|
&wasmparser::Operator::F32x4Gt => Ok(Operator::F32x4Gt),
|
||||||
|
&wasmparser::Operator::F32x4Le => Ok(Operator::F32x4Le),
|
||||||
|
&wasmparser::Operator::F32x4Ge => Ok(Operator::F32x4Ge),
|
||||||
|
|
||||||
|
&wasmparser::Operator::F64x2Eq => Ok(Operator::F64x2Eq),
|
||||||
|
&wasmparser::Operator::F64x2Ne => Ok(Operator::F64x2Ne),
|
||||||
|
&wasmparser::Operator::F64x2Lt => Ok(Operator::F64x2Lt),
|
||||||
|
&wasmparser::Operator::F64x2Gt => Ok(Operator::F64x2Gt),
|
||||||
|
&wasmparser::Operator::F64x2Le => Ok(Operator::F64x2Le),
|
||||||
|
&wasmparser::Operator::F64x2Ge => Ok(Operator::F64x2Ge),
|
||||||
|
|
||||||
|
&wasmparser::Operator::V128Not => Ok(Operator::V128Not),
|
||||||
|
&wasmparser::Operator::V128And => Ok(Operator::V128And),
|
||||||
|
&wasmparser::Operator::V128AndNot => Ok(Operator::V128AndNot),
|
||||||
|
&wasmparser::Operator::V128Or => Ok(Operator::V128Or),
|
||||||
|
&wasmparser::Operator::V128Xor => Ok(Operator::V128Xor),
|
||||||
|
&wasmparser::Operator::V128Bitselect => Ok(Operator::V128Bitselect),
|
||||||
|
&wasmparser::Operator::V128AnyTrue => Ok(Operator::V128AnyTrue),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I8x16Abs => Ok(Operator::I8x16Abs),
|
||||||
|
&wasmparser::Operator::I8x16Neg => Ok(Operator::I8x16Neg),
|
||||||
|
&wasmparser::Operator::I8x16Popcnt => Ok(Operator::I8x16Popcnt),
|
||||||
|
&wasmparser::Operator::I8x16AllTrue => Ok(Operator::I8x16AllTrue),
|
||||||
|
&wasmparser::Operator::I8x16Bitmask => Ok(Operator::I8x16Bitmask),
|
||||||
|
&wasmparser::Operator::I8x16NarrowI16x8S => Ok(Operator::I8x16NarrowI16x8S),
|
||||||
|
&wasmparser::Operator::I8x16NarrowI16x8U => Ok(Operator::I8x16NarrowI16x8U),
|
||||||
|
&wasmparser::Operator::I8x16Shl => Ok(Operator::I8x16Shl),
|
||||||
|
&wasmparser::Operator::I8x16ShrS => Ok(Operator::I8x16ShrS),
|
||||||
|
&wasmparser::Operator::I8x16ShrU => Ok(Operator::I8x16ShrU),
|
||||||
|
&wasmparser::Operator::I8x16Add => Ok(Operator::I8x16Add),
|
||||||
|
&wasmparser::Operator::I8x16AddSatS => Ok(Operator::I8x16AddSatS),
|
||||||
|
&wasmparser::Operator::I8x16AddSatU => Ok(Operator::I8x16AddSatU),
|
||||||
|
&wasmparser::Operator::I8x16Sub => Ok(Operator::I8x16Sub),
|
||||||
|
&wasmparser::Operator::I8x16SubSatS => Ok(Operator::I8x16SubSatS),
|
||||||
|
&wasmparser::Operator::I8x16SubSatU => Ok(Operator::I8x16SubSatU),
|
||||||
|
&wasmparser::Operator::I8x16MinS => Ok(Operator::I8x16MinS),
|
||||||
|
&wasmparser::Operator::I8x16MinU => Ok(Operator::I8x16MinU),
|
||||||
|
&wasmparser::Operator::I8x16MaxS => Ok(Operator::I8x16MaxS),
|
||||||
|
&wasmparser::Operator::I8x16MaxU => Ok(Operator::I8x16MaxU),
|
||||||
|
&wasmparser::Operator::I8x16AvgrU => Ok(Operator::I8x16AvgrU),
|
||||||
|
|
||||||
|
&wasmparser::Operator::I16x8ExtAddPairwiseI8x16S => {
|
||||||
|
Ok(Operator::I16x8ExtAddPairwiseI8x16S)
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I16x8ExtAddPairwiseI8x16U => {
|
||||||
|
Ok(Operator::I16x8ExtAddPairwiseI8x16U)
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I16x8Abs => Ok(Operator::I16x8Abs),
|
||||||
|
&wasmparser::Operator::I16x8Neg => Ok(Operator::I16x8Neg),
|
||||||
|
&wasmparser::Operator::I16x8Q15MulrSatS => Ok(Operator::I16x8Q15MulrSatS),
|
||||||
|
&wasmparser::Operator::I16x8AllTrue => Ok(Operator::I16x8AllTrue),
|
||||||
|
&wasmparser::Operator::I16x8Bitmask => Ok(Operator::I16x8Bitmask),
|
||||||
|
&wasmparser::Operator::I16x8NarrowI32x4S => Ok(Operator::I16x8NarrowI32x4S),
|
||||||
|
&wasmparser::Operator::I16x8NarrowI32x4U => Ok(Operator::I16x8NarrowI32x4U),
|
||||||
|
&wasmparser::Operator::I16x8ExtendLowI8x16S => Ok(Operator::I16x8ExtendLowI8x16S),
|
||||||
|
&wasmparser::Operator::I16x8ExtendHighI8x16S => Ok(Operator::I16x8ExtendHighI8x16S),
|
||||||
|
&wasmparser::Operator::I16x8ExtendLowI8x16U => Ok(Operator::I16x8ExtendLowI8x16U),
|
||||||
|
&wasmparser::Operator::I16x8ExtendHighI8x16U => Ok(Operator::I16x8ExtendHighI8x16U),
|
||||||
|
&wasmparser::Operator::I16x8Shl => Ok(Operator::I16x8Shl),
|
||||||
|
&wasmparser::Operator::I16x8ShrS => Ok(Operator::I16x8ShrS),
|
||||||
|
&wasmparser::Operator::I16x8ShrU => Ok(Operator::I16x8ShrU),
|
||||||
|
&wasmparser::Operator::I16x8Add => Ok(Operator::I16x8Add),
|
||||||
|
&wasmparser::Operator::I16x8AddSatS => Ok(Operator::I16x8AddSatS),
|
||||||
|
&wasmparser::Operator::I16x8AddSatU => Ok(Operator::I16x8AddSatU),
|
||||||
|
&wasmparser::Operator::I16x8Sub => Ok(Operator::I16x8Sub),
|
||||||
|
&wasmparser::Operator::I16x8SubSatS => Ok(Operator::I16x8SubSatS),
|
||||||
|
&wasmparser::Operator::I16x8SubSatU => Ok(Operator::I16x8SubSatU),
|
||||||
|
&wasmparser::Operator::I16x8Mul => Ok(Operator::I16x8Mul),
|
||||||
|
&wasmparser::Operator::I16x8MinS => Ok(Operator::I16x8MinS),
|
||||||
|
&wasmparser::Operator::I16x8MinU => Ok(Operator::I16x8MinU),
|
||||||
|
&wasmparser::Operator::I16x8MaxS => Ok(Operator::I16x8MaxS),
|
||||||
|
&wasmparser::Operator::I16x8MaxU => Ok(Operator::I16x8MaxU),
|
||||||
|
&wasmparser::Operator::I16x8AvgrU => Ok(Operator::I16x8AvgrU),
|
||||||
|
&wasmparser::Operator::I16x8ExtMulLowI8x16S => Ok(Operator::I16x8ExtMulLowI8x16S),
|
||||||
|
&wasmparser::Operator::I16x8ExtMulHighI8x16S => Ok(Operator::I16x8ExtMulHighI8x16S),
|
||||||
|
&wasmparser::Operator::I16x8ExtMulLowI8x16U => Ok(Operator::I16x8ExtMulLowI8x16U),
|
||||||
|
&wasmparser::Operator::I16x8ExtMulHighI8x16U => Ok(Operator::I16x8ExtMulHighI8x16U),
|
||||||
|
&wasmparser::Operator::I32x4ExtAddPairwiseI16x8S => {
|
||||||
|
Ok(Operator::I32x4ExtAddPairwiseI16x8S)
|
||||||
|
}
|
||||||
|
&wasmparser::Operator::I32x4ExtAddPairwiseI16x8U => {
|
||||||
|
Ok(Operator::I32x4ExtAddPairwiseI16x8U)
|
||||||
|
}
|
||||||
|
|
||||||
|
&wasmparser::Operator::I32x4Abs => Ok(Operator::I32x4Abs),
|
||||||
|
&wasmparser::Operator::I32x4Neg => Ok(Operator::I32x4Neg),
|
||||||
|
&wasmparser::Operator::I32x4AllTrue => Ok(Operator::I32x4AllTrue),
|
||||||
|
&wasmparser::Operator::I32x4Bitmask => Ok(Operator::I32x4Bitmask),
|
||||||
|
&wasmparser::Operator::I32x4ExtendLowI16x8S => Ok(Operator::I32x4ExtendLowI16x8S),
|
||||||
|
&wasmparser::Operator::I32x4ExtendHighI16x8S => Ok(Operator::I32x4ExtendHighI16x8S),
|
||||||
|
&wasmparser::Operator::I32x4ExtendLowI16x8U => Ok(Operator::I32x4ExtendLowI16x8U),
|
||||||
|
&wasmparser::Operator::I32x4ExtendHighI16x8U => Ok(Operator::I32x4ExtendHighI16x8U),
|
||||||
|
&wasmparser::Operator::I32x4Shl => Ok(Operator::I32x4Shl),
|
||||||
|
&wasmparser::Operator::I32x4ShrS => Ok(Operator::I32x4ShrS),
|
||||||
|
&wasmparser::Operator::I32x4ShrU => Ok(Operator::I32x4ShrU),
|
||||||
|
&wasmparser::Operator::I32x4Add => Ok(Operator::I32x4Add),
|
||||||
|
&wasmparser::Operator::I32x4Sub => Ok(Operator::I32x4Sub),
|
||||||
|
&wasmparser::Operator::I32x4Mul => Ok(Operator::I32x4Mul),
|
||||||
|
&wasmparser::Operator::I32x4MinS => Ok(Operator::I32x4MinS),
|
||||||
|
&wasmparser::Operator::I32x4MinU => Ok(Operator::I32x4MinU),
|
||||||
|
&wasmparser::Operator::I32x4MaxS => Ok(Operator::I32x4MaxS),
|
||||||
|
&wasmparser::Operator::I32x4MaxU => Ok(Operator::I32x4MaxU),
|
||||||
|
&wasmparser::Operator::I32x4DotI16x8S => Ok(Operator::I32x4DotI16x8S),
|
||||||
|
&wasmparser::Operator::I32x4ExtMulLowI16x8S => Ok(Operator::I32x4ExtMulLowI16x8S),
|
||||||
|
&wasmparser::Operator::I32x4ExtMulHighI16x8S => Ok(Operator::I32x4ExtMulHighI16x8S),
|
||||||
|
&wasmparser::Operator::I32x4ExtMulLowI16x8U => Ok(Operator::I32x4ExtMulLowI16x8U),
|
||||||
|
&wasmparser::Operator::I32x4ExtMulHighI16x8U => Ok(Operator::I32x4ExtMulHighI16x8U),
|
||||||
|
&wasmparser::Operator::I64x2Abs => Ok(Operator::I64x2Abs),
|
||||||
|
&wasmparser::Operator::I64x2Neg => Ok(Operator::I64x2Neg),
|
||||||
|
&wasmparser::Operator::I64x2AllTrue => Ok(Operator::I64x2AllTrue),
|
||||||
|
&wasmparser::Operator::I64x2Bitmask => Ok(Operator::I64x2Bitmask),
|
||||||
|
&wasmparser::Operator::I64x2ExtendLowI32x4S => Ok(Operator::I64x2ExtendLowI32x4S),
|
||||||
|
&wasmparser::Operator::I64x2ExtendHighI32x4S => Ok(Operator::I64x2ExtendHighI32x4S),
|
||||||
|
&wasmparser::Operator::I64x2ExtendLowI32x4U => Ok(Operator::I64x2ExtendLowI32x4U),
|
||||||
|
&wasmparser::Operator::I64x2ExtendHighI32x4U => Ok(Operator::I64x2ExtendHighI32x4U),
|
||||||
|
&wasmparser::Operator::I64x2Shl => Ok(Operator::I64x2Shl),
|
||||||
|
&wasmparser::Operator::I64x2ShrS => Ok(Operator::I64x2ShrS),
|
||||||
|
&wasmparser::Operator::I64x2ShrU => Ok(Operator::I64x2ShrU),
|
||||||
|
&wasmparser::Operator::I64x2Add => Ok(Operator::I64x2Add),
|
||||||
|
&wasmparser::Operator::I64x2Sub => Ok(Operator::I64x2Sub),
|
||||||
|
&wasmparser::Operator::I64x2Mul => Ok(Operator::I64x2Mul),
|
||||||
|
&wasmparser::Operator::I64x2ExtMulLowI32x4S => Ok(Operator::I64x2ExtMulLowI32x4S),
|
||||||
|
&wasmparser::Operator::I64x2ExtMulHighI32x4S => Ok(Operator::I64x2ExtMulHighI32x4S),
|
||||||
|
&wasmparser::Operator::I64x2ExtMulLowI32x4U => Ok(Operator::I64x2ExtMulLowI32x4U),
|
||||||
|
&wasmparser::Operator::I64x2ExtMulHighI32x4U => Ok(Operator::I64x2ExtMulHighI32x4U),
|
||||||
|
&wasmparser::Operator::F32x4Ceil => Ok(Operator::F32x4Ceil),
|
||||||
|
&wasmparser::Operator::F32x4Floor => Ok(Operator::F32x4Floor),
|
||||||
|
&wasmparser::Operator::F32x4Trunc => Ok(Operator::F32x4Trunc),
|
||||||
|
&wasmparser::Operator::F32x4Nearest => Ok(Operator::F32x4Nearest),
|
||||||
|
&wasmparser::Operator::F32x4Abs => Ok(Operator::F32x4Abs),
|
||||||
|
&wasmparser::Operator::F32x4Neg => Ok(Operator::F32x4Neg),
|
||||||
|
&wasmparser::Operator::F32x4Sqrt => Ok(Operator::F32x4Sqrt),
|
||||||
|
&wasmparser::Operator::F32x4Add => Ok(Operator::F32x4Add),
|
||||||
|
&wasmparser::Operator::F32x4Sub => Ok(Operator::F32x4Sub),
|
||||||
|
&wasmparser::Operator::F32x4Mul => Ok(Operator::F32x4Mul),
|
||||||
|
&wasmparser::Operator::F32x4Div => Ok(Operator::F32x4Div),
|
||||||
|
&wasmparser::Operator::F32x4Min => Ok(Operator::F32x4Min),
|
||||||
|
&wasmparser::Operator::F32x4Max => Ok(Operator::F32x4Max),
|
||||||
|
&wasmparser::Operator::F32x4PMin => Ok(Operator::F32x4PMin),
|
||||||
|
&wasmparser::Operator::F32x4PMax => Ok(Operator::F32x4PMax),
|
||||||
|
&wasmparser::Operator::F64x2Ceil => Ok(Operator::F64x2Ceil),
|
||||||
|
&wasmparser::Operator::F64x2Floor => Ok(Operator::F64x2Floor),
|
||||||
|
&wasmparser::Operator::F64x2Trunc => Ok(Operator::F64x2Trunc),
|
||||||
|
&wasmparser::Operator::F64x2Nearest => Ok(Operator::F64x2Nearest),
|
||||||
|
&wasmparser::Operator::F64x2Abs => Ok(Operator::F64x2Abs),
|
||||||
|
&wasmparser::Operator::F64x2Neg => Ok(Operator::F64x2Neg),
|
||||||
|
&wasmparser::Operator::F64x2Sqrt => Ok(Operator::F64x2Sqrt),
|
||||||
|
&wasmparser::Operator::F64x2Add => Ok(Operator::F64x2Add),
|
||||||
|
&wasmparser::Operator::F64x2Sub => Ok(Operator::F64x2Sub),
|
||||||
|
&wasmparser::Operator::F64x2Mul => Ok(Operator::F64x2Mul),
|
||||||
|
&wasmparser::Operator::F64x2Div => Ok(Operator::F64x2Div),
|
||||||
|
&wasmparser::Operator::F64x2Min => Ok(Operator::F64x2Min),
|
||||||
|
&wasmparser::Operator::F64x2Max => Ok(Operator::F64x2Max),
|
||||||
|
&wasmparser::Operator::F64x2PMin => Ok(Operator::F64x2PMin),
|
||||||
|
&wasmparser::Operator::F64x2PMax => Ok(Operator::F64x2PMax),
|
||||||
|
&wasmparser::Operator::I32x4TruncSatF32x4S => Ok(Operator::I32x4TruncSatF32x4S),
|
||||||
|
&wasmparser::Operator::I32x4TruncSatF32x4U => Ok(Operator::I32x4TruncSatF32x4U),
|
||||||
|
&wasmparser::Operator::F32x4ConvertI32x4S => Ok(Operator::F32x4ConvertI32x4S),
|
||||||
|
&wasmparser::Operator::F32x4ConvertI32x4U => Ok(Operator::F32x4ConvertI32x4U),
|
||||||
|
&wasmparser::Operator::I32x4TruncSatF64x2SZero => Ok(Operator::I32x4TruncSatF64x2SZero),
|
||||||
|
&wasmparser::Operator::I32x4TruncSatF64x2UZero => Ok(Operator::I32x4TruncSatF64x2UZero),
|
||||||
|
&wasmparser::Operator::F64x2ConvertLowI32x4S => Ok(Operator::F64x2ConvertLowI32x4S),
|
||||||
|
&wasmparser::Operator::F64x2ConvertLowI32x4U => Ok(Operator::F64x2ConvertLowI32x4U),
|
||||||
|
&wasmparser::Operator::F32x4DemoteF64x2Zero => Ok(Operator::F32x4DemoteF64x2Zero),
|
||||||
|
&wasmparser::Operator::F64x2PromoteLowF32x4 => Ok(Operator::F64x2PromoteLowF32x4),
|
||||||
|
|
||||||
_ => Err(()),
|
_ => Err(()),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
22
wasm_tests/test-simd.wat
Normal file
22
wasm_tests/test-simd.wat
Normal file
|
|
@ -0,0 +1,22 @@
|
||||||
|
(module
|
||||||
|
(memory 1 1)
|
||||||
|
(func (export "pack") (param i64 i64) (result v128)
|
||||||
|
v128.const i64x2 0 0
|
||||||
|
local.get 0
|
||||||
|
i64x2.replace_lane 0
|
||||||
|
local.get 1
|
||||||
|
i64x2.replace_lane 1
|
||||||
|
return)
|
||||||
|
(func (export "unpack") (param v128) (result i64 i64)
|
||||||
|
local.get 0
|
||||||
|
i64x2.extract_lane 0
|
||||||
|
local.get 0
|
||||||
|
i64x2.extract_lane 1
|
||||||
|
return)
|
||||||
|
(func (export "load") (param i32) (result v128)
|
||||||
|
local.get 0
|
||||||
|
v128.load)
|
||||||
|
(func (export "store") (param i32 v128)
|
||||||
|
local.get 0
|
||||||
|
local.get 1
|
||||||
|
v128.store))
|
||||||
Loading…
Reference in a new issue