2024-09-14 03:51:57 -05:00
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pci := @use("../../../libraries/pci/src/lib.hb");
|
|
|
|
.{PCIAddress} := pci
|
|
|
|
|
2024-09-17 10:02:43 -05:00
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|
|
FIFO := struct {
|
|
|
|
reserved_size: u32,
|
|
|
|
using_bounce_buffer: u8,
|
|
|
|
bounce_buffer: [u8; 1024 * 1024],
|
|
|
|
next_fence: u32,
|
|
|
|
}
|
|
|
|
new_fifo := fn(): FIFO {
|
|
|
|
bounce_buffer := @as([u8; 1024 * 1024], idk)
|
|
|
|
return FIFO.(0, 0, bounce_buffer, 0)
|
|
|
|
}
|
|
|
|
|
|
|
|
IRQ := struct {
|
|
|
|
pending: u32,
|
|
|
|
switchContext: u32,
|
|
|
|
//IntrContext oldContext;
|
|
|
|
//IntrContext newContext;
|
|
|
|
count: u32,
|
|
|
|
}
|
|
|
|
|
|
|
|
new_irq := fn(): IRQ {
|
|
|
|
return IRQ.(0, 0, 0)
|
|
|
|
}
|
|
|
|
|
2024-09-14 03:51:57 -05:00
|
|
|
SVGADevice := struct {
|
|
|
|
pciAddr: PCIAddress,
|
|
|
|
ioBase: u32,
|
|
|
|
fifoMem: ^u32,
|
|
|
|
fbMem: ^u8,
|
|
|
|
fifoSize: int,
|
|
|
|
fbSize: int,
|
|
|
|
vramSize: int,
|
|
|
|
deviceVersionId: int,
|
|
|
|
capabilities: int,
|
|
|
|
width: int,
|
|
|
|
height: int,
|
|
|
|
bpp: int,
|
|
|
|
pitch: int,
|
2024-09-17 10:02:43 -05:00
|
|
|
fifo: FIFO,
|
|
|
|
irq: IRQ,
|
2024-09-14 03:51:57 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
svga_device := fn(): SVGADevice {
|
|
|
|
pci_addr := PCIAddress.(0, 0, 0)
|
2024-09-17 10:02:43 -05:00
|
|
|
fifo := new_fifo()
|
|
|
|
irq := new_irq()
|
|
|
|
return SVGADevice.(pci_addr, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, fifo, irq)
|
|
|
|
}
|