Sync to latest Metalkit source. Includes Kurt's fix for PCI_GetBARAddr().
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@ -207,13 +207,18 @@ PCI_SetBAR(const PCIAddress *addr, int index, uint32 value)
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* PCI_GetBARAddr --
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*
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* Get the current address set in one of the device's Base Address Registers.
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* (We mask off the lower 2 bits, which hold memory type flags.)
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* We mask off the lower bits that are not part of the address. IO bars are
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* 4 byte aligned so we mask lower 2 bits, and memory bars are 16-byte aligned
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* so we mask the lower 4 bits.
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*/
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fastcall uint32
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PCI_GetBARAddr(const PCIAddress *addr, int index)
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{
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return PCI_ConfigRead32(addr, offsetof(PCIConfigSpace, BAR[index])) & ~3;
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uint32 bar = PCI_ConfigRead32(addr, offsetof(PCIConfigSpace, BAR[index]));
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uint32 mask = (bar & PCI_CONF_BAR_IO) ? 0x3 : 0xf;
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return bar & ~mask;
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}
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@ -76,6 +76,11 @@ typedef struct PCIScanState {
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PCIAddress addr;
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} PCIScanState;
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// BAR bits
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#define PCI_CONF_BAR_IO 0x01
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#define PCI_CONF_BAR_64BIT 0x04
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#define PCI_CONF_BAR_PREFETCH 0x08
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fastcall uint32 PCI_ConfigRead32(const PCIAddress *addr, uint16 offset);
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fastcall uint16 PCI_ConfigRead16(const PCIAddress *addr, uint16 offset);
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fastcall uint8 PCI_ConfigRead8(const PCIAddress *addr, uint16 offset);
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@ -56,8 +56,6 @@ VBE_Init()
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/* Let the BIOS know we support VBE2 */
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cInfo->signature = SIGNATURE_VBE2;
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Console_WriteString("Foo\n");
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/* "Get SuperVGA Information" command */
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reg.ax = 0x4f00;
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reg.di = PTR_32_TO_NEAR(cInfo, 0);
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@ -65,7 +63,6 @@ VBE_Init()
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if (reg.ax != 0x004F) {
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return FALSE;
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}
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Console_WriteString("Bar\n");
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/*
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* Make a copy of the VBEControllerInfo struct itself, and of the
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